source: trunk/modules/vci_mem_cache/include/soclib/mem_cache.h @ 568

Last change on this file since 568 was 489, checked in by alain, 11 years ago

Implement both the SYNC and INVAL configuration commands.
Uses the TRT to transmit the cache line to XRAM in cPUT transactions.
Improve the debug.

File size: 1.4 KB
Line 
1/*
2 * SOCLIB_LGPL_HEADER_BEGIN
3 *
4 * This file is part of SoCLib, GNU LGPLv2.1.
5 *
6 * SoCLib is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; version 2.1 of the License.
9 *
10 * SoCLib is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with SoCLib; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 * SOCLIB_LGPL_HEADER_END
21 *
22 * Copyright (c) UPMC, Lip6, Asim
23 *         alain greiner
24 *
25 * Maintainers: alain
26 */
27#ifndef MEM_CACHE_REGS_H
28#define MEM_CACHE_REGS_H
29
30enum SoclibMemCacheConfigRegs
31{
32    MEMC_LOCK,
33    MEMC_ADDR_LO,
34    MEMC_ADDR_HI,
35    MEMC_BUF_LENGTH,
36    MEMC_CMD_TYPE
37};
38
39enum SoclibMemCacheConfigCmd
40{
41    MEMC_CMD_NOP,
42    MEMC_CMD_INVAL,
43    MEMC_CMD_SYNC
44};
45
46#endif /* MEM_CACHE_REGS_H */
47
48// Local Variables:
49// tab-width: 4
50// c-basic-offset: 4
51// c-file-offsets:((innamespace . 0)(inline-open . 0))
52// indent-tabs-mode: nil
53// End:
54
55// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
56
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