source: trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp@ 175

Last change on this file since 175 was 175, checked in by kane, 15 years ago

vci_cc_xcache_wrapper_v4 : suppress one state (CC_UPDATE)
  • Property svn:executable set to *
File size: 21.8 KB
Line 
1#include <systemc>
2#include <sys/time.h>
3#include <iostream>
4#include <sstream>
5#include <cstdlib>
6#include <cstdarg>
7#include <stdint.h>
8#include <fstream>
9
10#include "mapping_table.h"
11#include "mips32.h"
12#include "vci_simhelper.h"
13#include "vci_simple_ram.h"
14#include "vci_multi_tty.h"
15#include "vci_xicu.h"
16#include "vci_simple_ring_fast.h"
17#include "vci_mem_cache_v4.h"
18#include "vci_cc_xcache_wrapper_v4.h"
19#include "alloc_elems.h"
20
21#include "iss/gdbserver.h"
22
23#include "segmentation.h"
24
25//===========================================
26// Define before include
27//===========================================
28
29// Parameters
30// * Platforms
31# define PARAM_VCI 4,8,32,1,1,1,8,4,4,1
32
33# define USE_OLD_XCACHE 0
34# define NB_PROC_MIN 1
35# define NB_PROC_MAX 15
36// fifo_depth
37# define PARAM_RING_P 2
38# define PARAM_RING_C 2
39# define PARAM_RING_X 2
40// pti , hwi , wti, irq
41# define PARAM_XICU nb_proc*nb_cpu_by_cache, nb_proc*nb_cpu_by_cache, 0 , nb_proc*nb_cpu_by_cache
42//#define PARAM_XICU nb_proc, nb_proc, 0 , nb_proc
43
44// * Debug
45# define DEBUG_TOP 0
46# define SOCVIEW 0
47# define STOP_SIMULATION_NB_FRZ_CYCLES 100000
48
49// * Simulation
50# define CONFIG_DEFAULT "configuration/default.cfg"
51# define NCYCLES_DEFAULT 0
52# define SOFT_DEFAULT "soft/bin.soft"
53//===========================================
54
55void usage (char * funcname)
56{
57 std::cout << funcname << " [option] " << std::endl;
58 std::cout << " * -NCYCLES int : number of simulated cycle, if 0 then no stop condition." << std::endl;
59 std::cout << " default : " << NCYCLES_DEFAULT << " cycle(s)" << std::endl;
60 std::cout << " * -CFG string : configuration file" << std::endl;
61 std::cout << " - nb_proc," << std::endl;
62 std::cout << " - nb_cpu_by_cache, nb_dcache," << std::endl;
63 std::cout << " - iways, isets, iwords," << std::endl;
64 std::cout << " - dways, dsets, dwords," << std::endl;
65 std::cout << " - wnwords, wnlines, " << std::endl;
66 std::cout << " - memc_nways, memc_nsets, memc_words, memc_heap_size." << std::endl;
67 std::cout << " default : \"" << CONFIG_DEFAULT << "\"" << std::endl;
68 std::cout << " * -SOFT string : software executed by this platform." << std::endl;
69 std::cout << " default : \"" << SOFT_DEFAULT << "\"" << std::endl;
70
71 exit(1);
72}
73
74int _main(int argc, char *argv[])
75{
76 int ncycles = NCYCLES_DEFAULT;
77 char * config = CONFIG_DEFAULT;
78 char * soft = SOFT_DEFAULT;
79
80 if (argc > 1)
81 {
82 for( int n=1 ; n<argc ; n=n+2 )
83 {
84 if( (strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc) )
85 {
86 ncycles = atoi(argv[n+1]);
87 }
88 else if( (strcmp(argv[n],"-CFG") == 0) && (n+1<argc) )
89 {
90 // strcpy(config, argv[n+1]);
91 config = argv[n+1];
92 }
93 else if( (strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) )
94 {
95 // strcpy(soft, argv[n+1]);
96 soft = argv[n+1];
97 }
98 else
99 {
100 usage(argv[0]);
101 }
102 }
103 }
104
105 if (ncycles == 0)
106 ncycles = -1;
107
108 uint32_t nb_proc;
109 uint32_t nb_cpu_by_cache;
110 uint32_t nb_dcache;
111 uint32_t iways, isets, iwords;
112 uint32_t dways, dsets, dwords;
113 uint32_t wnwords, wnlines;
114 uint32_t memc_nways, memc_nsets, memc_words, memc_heap_size;
115
116 std::ifstream inFile;
117 const char * filename = config;
118
119 inFile.open(filename);
120
121 if (!inFile)
122 {
123 std::cout << "Can't open file : \"" << filename << "\"." << std::endl;
124 usage(argv[0]);
125 }
126
127 std::string str;
128 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
129 nb_proc =std::atoi(str.c_str());
130 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
131 nb_cpu_by_cache =std::atoi(str.c_str());
132 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
133 nb_dcache =std::atoi(str.c_str());
134 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
135 iways =std::atoi(str.c_str());
136 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
137 isets =std::atoi(str.c_str());
138 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
139 iwords =std::atoi(str.c_str());
140 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
141 dways =std::atoi(str.c_str());
142 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
143 dsets =std::atoi(str.c_str());
144 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
145 dwords =std::atoi(str.c_str());
146 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
147 wnwords =std::atoi(str.c_str());
148 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
149 wnlines =std::atoi(str.c_str());
150 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
151 memc_nways =std::atoi(str.c_str());
152 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
153 memc_nsets =std::atoi(str.c_str());
154 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
155 memc_words =std::atoi(str.c_str());
156 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
157 memc_heap_size =std::atoi(str.c_str());
158
159 if (((nb_proc*nb_cpu_by_cache)<NB_PROC_MIN) or
160 ((nb_proc*nb_cpu_by_cache)>NB_PROC_MAX))
161 {
162 std::cout << "Parameters nb_proc is out of bound." << std::endl;
163 usage(argv[0]);
164 }
165
166 std::cout << " * Parameters : " << std::endl;
167 std::cout << " * nb_proc : " << nb_proc << std::endl;
168 std::cout << " * nb_cpu_by_cache : " << nb_cpu_by_cache << std::endl;
169 std::cout << " * nb_dcache : " << nb_dcache << std::endl;
170 std::cout << " * iways : " << iways << std::endl;
171 std::cout << " * isets : " << isets << std::endl;
172 std::cout << " * iwords : " << iwords << std::endl;
173 std::cout << " * dways : " << dways << std::endl;
174 std::cout << " * dsets : " << dsets << std::endl;
175 std::cout << " * dwords : " << dwords << std::endl;
176 std::cout << " * wnwords : " << wnwords << std::endl;
177 std::cout << " * wnlines : " << wnlines << std::endl;
178 std::cout << " * memc_nways : " << memc_nways << std::endl;
179 std::cout << " * memc_nsets : " << memc_nsets << std::endl;
180 std::cout << " * memc_words : " << memc_words << std::endl;
181 std::cout << " * memc_heap_size : " << memc_heap_size << std::endl;
182 std::cout << " * Simulation : " << std::endl;
183 std::cout << " * ncycles : " << ncycles << std::endl;
184 std::cout << " * soft : " << soft << std::endl;
185
186 using namespace sc_core;
187 // Avoid repeating these everywhere
188 using soclib::common::IntTab;
189 using soclib::common::Segment;
190
191 // Define VCI parameters
192 typedef soclib::caba::VciParams<PARAM_VCI> vci_param;
193 typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss;
194 // Mapping table
195
196 soclib::common::MappingTable maptabp(32, IntTab(8), IntTab(8), 0x00300000); // size, level_addr_bits, level_id_bits, cacheability_mask
197
198 maptabp.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(2), true));
199 maptabp.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(2), true));
200
201 maptabp.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(1), false));
202 maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(2), true));
203 maptabp.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(2), false, true, IntTab(0)));
204 maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(2), true));
205 //maptabp.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(2), false));
206 //maptabp.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(2), true));
207 maptabp.add(Segment("xicu" , XICU_BASE , XICU_SIZE , IntTab(3), false));
208 maptabp.add(Segment("simhelper", SIMHELPER_BASE, SIMHELPER_SIZE, IntTab(4), false));
209
210 std::cout << maptabp << std::endl;
211
212 soclib::common::MappingTable maptabc(32, IntTab(8), IntTab(8), 0x00300000);
213 // for (uint32_t i=0; i<nb_proc; ++i)
214 // for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
215 // {
216 // std::ostringstream str;
217 // str << "c_proc_" << i << "_" << j;
218 // maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+(i*nb_cpu_by_cache+j)*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i)));
219 // }
220 for (uint32_t i=0; i<nb_proc; ++i)
221 {
222 std::ostringstream str;
223 str << "c_proc_" << i;
224 maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+i*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i)));
225 }
226 maptabc.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(nb_proc), false, false));
227 maptabc.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(nb_proc), false, false));
228 // maptabc.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(nb_proc), false, false));
229 maptabc.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(nb_proc), false, false));
230 maptabc.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(nb_proc), false, false));
231 maptabc.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(nb_proc), false, false));
232 //maptabc.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(nb_proc), false, false));
233
234 std::cout << maptabc << std::endl;
235
236 soclib::common::MappingTable maptabx(32, IntTab(8), IntTab(8), 0x00300000);
237 maptabx.add(Segment("xram" , MC_M_BASE , MC_M_SIZE , IntTab(0), false));
238 // maptabx.add(Segment("uram" , MC_U_BASE , MC_U_SIZE , IntTab(0), false));
239 maptabx.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0), false));
240 maptabx.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), false));
241 maptabx.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), false));
242 // maptabx.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(0), false));
243
244 std::cout << maptabx << std::endl;
245
246 // Signals
247 sc_clock signal_clk("clk");
248 sc_signal<bool> signal_resetn("resetn");
249
250 sc_signal<bool> *** signal_proc_it = soclib::common::alloc_elems<sc_signal<bool> >("proc_it", nb_proc, nb_cpu_by_cache, 6);
251
252 soclib::caba::VciSignals<vci_param> * signal_vci_ini_rw_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_rw_proc", nb_proc);
253 soclib::caba::VciSignals<vci_param> * signal_vci_ini_c_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_c_proc" , nb_proc);
254 soclib::caba::VciSignals<vci_param> * signal_vci_tgt_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_tgt_proc" , nb_proc);
255
256 soclib::caba::VciSignals<vci_param> signal_vci_tgt_tty("vci_tgt_tty");
257
258 soclib::caba::VciSignals<vci_param> signal_vci_tgt_simhelper("signal_vci_tgt_simhelper");
259
260 soclib::caba::VciSignals<vci_param> signal_vci_tgt_rom("vci_tgt_rom");
261
262 soclib::caba::VciSignals<vci_param> signal_vci_tgt_xram("vci_tgt_xram");
263
264 soclib::caba::VciSignals<vci_param> signal_vci_tgt_xicu("vci_tgt_xicu");
265
266 soclib::caba::VciSignals<vci_param> signal_vci_ixr_memc("vci_ixr_memc");
267 soclib::caba::VciSignals<vci_param> signal_vci_ini_memc("vci_ini_memc");
268 soclib::caba::VciSignals<vci_param> signal_vci_tgt_memc("vci_tgt_memc");
269 soclib::caba::VciSignals<vci_param> signal_vci_tgt_cleanup_memc("vci_tgt_cleanup_memc");
270
271 sc_signal<bool> ** signal_tty_irq = soclib::common::alloc_elems<sc_signal<bool> >("signal_tty_irq", nb_proc, nb_cpu_by_cache);
272
273 soclib::common::Loader loader(soft);
274
275 soclib::common::GdbServer<soclib::common::Mips32ElIss>::set_loader(loader);
276
277 soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > * proc [nb_proc];
278 for (uint32_t i=0; i<nb_proc; ++i)
279 {
280 uint32_t num_cpu = i*nb_cpu_by_cache;
281
282 std::ostringstream str;
283 str << "proc_" << num_cpu;
284
285 proc[i] = new soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > (str.str().c_str(), num_cpu, maptabp, maptabc, IntTab(i),IntTab(i),IntTab(i)
286#if USE_OLD_XCACHE
287 ,iways, isets, iwords
288 ,dways, dsets, dwords
289#else
290 ,nb_cpu_by_cache
291 ,nb_dcache
292 ,iways*nb_cpu_by_cache, isets, iwords
293 ,dways*nb_cpu_by_cache, dsets, dwords
294 ,wnwords, wnlines*nb_cpu_by_cache
295#endif
296 );
297
298#if not USE_OLD_XCACHE
299 proc[i]->stop_simulation(STOP_SIMULATION_NB_FRZ_CYCLES);
300#endif
301 }
302
303 soclib::caba::VciSimpleRam<vci_param>
304 rom ("rom", IntTab(0), maptabp, loader);
305
306 soclib::caba::VciSimpleRam<vci_param>
307 xram("xram", IntTab(0), maptabx, loader);
308
309 // x_init c_init p_tgt c_tgt
310 soclib::caba::VciMemCacheV4<vci_param>
311 memc("memc",maptabp,maptabc,maptabx,IntTab(0),IntTab(nb_proc),IntTab(2),IntTab(nb_proc), memc_nways, memc_nsets, memc_words, memc_heap_size);
312
313 std::vector<std::string> tty_name;
314 for (uint32_t i=0; i<nb_proc*nb_cpu_by_cache; ++i)
315 {
316 std::ostringstream str;
317 str << "tty_" << i;
318
319 tty_name.push_back(str.str());
320 }
321
322 soclib::caba::VciMultiTty<vci_param>
323 tty("tty",IntTab(1),maptabp,tty_name);
324
325 soclib::caba::VciXicu<vci_param>
326 xicu("xicu", maptabp, IntTab(3), PARAM_XICU);
327
328 // soclib::caba::VciTimer<vci_param>
329 // timer("timer", IntTab(3), maptabp, nb_proc);
330
331 soclib::caba::VciSimhelper<vci_param>
332 simhelper("simhelper", IntTab(4), maptabp);
333
334 // initiatior | target
335 // interconnect_p : proc | rom, tty, memc, xicu, simhelper
336 // interconnect_c : proc, memc | proc, memc
337 // interconnect_x : memc | xram
338
339 soclib::caba::VciSimpleRingFast<vci_param,40,33>
340 interconnect_p("interconnect_p",maptabp, IntTab(), PARAM_RING_P,nb_proc , 5 );
341
342 soclib::caba::VciSimpleRingFast<vci_param,40,33>
343 interconnect_c("interconnect_c",maptabc, IntTab(), PARAM_RING_C,nb_proc+1, nb_proc+1);
344
345 soclib::caba::VciSimpleRingFast<vci_param,40,33>
346 interconnect_x("interconnect_x",maptabx, IntTab(), PARAM_RING_X,1 , 1 );
347
348 // Net-List
349 for (uint32_t i=0; i<nb_proc; ++i)
350 {
351 proc[i]->p_clk(signal_clk);
352 proc[i]->p_resetn(signal_resetn);
353 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
354 {
355 proc[i]->p_irq[j][0](signal_proc_it[i][j][0]);
356 proc[i]->p_irq[j][1](signal_proc_it[i][j][1]);
357 proc[i]->p_irq[j][2](signal_proc_it[i][j][2]);
358 proc[i]->p_irq[j][3](signal_proc_it[i][j][3]);
359 proc[i]->p_irq[j][4](signal_proc_it[i][j][4]);
360 proc[i]->p_irq[j][5](signal_proc_it[i][j][5]);
361 }
362 proc[i]->p_vci_ini_rw(signal_vci_ini_rw_proc[i]);
363 proc[i]->p_vci_ini_c(signal_vci_ini_c_proc[i]);
364 proc[i]->p_vci_tgt(signal_vci_tgt_proc[i]);
365 }
366
367 rom.p_clk(signal_clk);
368 rom.p_resetn(signal_resetn);
369 rom.p_vci(signal_vci_tgt_rom);
370
371 tty.p_clk(signal_clk);
372 tty.p_resetn(signal_resetn);
373 tty.p_vci(signal_vci_tgt_tty);
374 for (uint32_t i=0; i<nb_proc; ++i)
375 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
376 tty.p_irq[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]);
377
378 xicu.p_clk(signal_clk);
379 xicu.p_resetn(signal_resetn);
380 xicu.p_vci(signal_vci_tgt_xicu);
381 for (uint32_t i=0; i<nb_proc; ++i)
382 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
383 {
384 xicu.p_hwi[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]);
385 xicu.p_irq[i*nb_cpu_by_cache+j](signal_proc_it[i][j][0]);
386 }
387
388 simhelper.p_clk(signal_clk);
389 simhelper.p_resetn(signal_resetn);
390 simhelper.p_vci(signal_vci_tgt_simhelper);
391
392 memc.p_clk(signal_clk);
393 memc.p_resetn(signal_resetn);
394 memc.p_vci_tgt(signal_vci_tgt_memc);
395 memc.p_vci_tgt_cleanup(signal_vci_tgt_cleanup_memc);
396 memc.p_vci_ini(signal_vci_ini_memc);
397 memc.p_vci_ixr(signal_vci_ixr_memc);
398
399 xram.p_clk(signal_clk);
400 xram.p_resetn(signal_resetn);
401 xram.p_vci(signal_vci_tgt_xram);
402
403 interconnect_p.p_clk(signal_clk);
404 interconnect_p.p_resetn(signal_resetn);
405
406 for (uint32_t i=0; i<nb_proc; ++i)
407 interconnect_p.p_to_initiator[i](signal_vci_ini_rw_proc[i]);
408
409 interconnect_p.p_to_target[0](signal_vci_tgt_rom);
410 interconnect_p.p_to_target[1](signal_vci_tgt_tty);
411 interconnect_p.p_to_target[2](signal_vci_tgt_memc);
412 interconnect_p.p_to_target[3](signal_vci_tgt_xicu);
413 interconnect_p.p_to_target[4](signal_vci_tgt_simhelper);
414
415 interconnect_c.p_clk(signal_clk);
416 interconnect_c.p_resetn(signal_resetn);
417
418 for (uint32_t i=0; i<nb_proc; ++i)
419 interconnect_c.p_to_initiator[i](signal_vci_ini_c_proc[i]);
420 interconnect_c.p_to_initiator[nb_proc](signal_vci_ini_memc);
421
422 for (uint32_t i=0; i<nb_proc; ++i)
423 interconnect_c.p_to_target[i](signal_vci_tgt_proc[i]);
424 interconnect_c.p_to_target[nb_proc](signal_vci_tgt_cleanup_memc);
425
426 interconnect_x.p_clk(signal_clk);
427 interconnect_x.p_resetn(signal_resetn);
428
429 interconnect_x.p_to_initiator[0](signal_vci_ixr_memc);
430
431 interconnect_x.p_to_target[0](signal_vci_tgt_xram);
432
433 sc_start(sc_core::sc_time(0, SC_NS));
434 signal_resetn = false;
435 sc_start(sc_core::sc_time(1, SC_NS));
436 signal_resetn = true;
437
438#if SOCVIEW
439 debug();
440#elif DEBUG_TOP
441
442 uint32_t num_cycle=0;
443 while(1)
444 {
445 std::cout << std::endl
446 << std::dec << "===== [ cycle " << num_cycle << " ]======" << std::endl
447 << std::endl;
448
449 sc_start(sc_core::sc_time(1, SC_NS));
450
451 // for (uint32_t i=0; i<nb_proc; ++i)
452 // proc[i]->print_trace(1);
453 num_cycle ++;
454 }
455#else
456 if (ncycles==-1)
457 sc_start();
458 else
459 sc_start(sc_core::sc_time(ncycles, SC_NS));
460
461 // sc_start(sc_core::sc_time(1013000, SC_NS));
462 // uint32_t num_cycle=1013000 ;
463
464 // for (uint32_t i=0; i<600; ++i)
465 // {
466 // std::cout << std::endl
467 // << std::dec << "===== [ cycle " << num_cycle << " ]======" << std::endl
468 // << std::endl;
469 // sc_start(sc_core::sc_time(1, SC_NS));
470 // interconnect_p.print_trace();
471 // num_cycle ++;
472 // }
473
474 // std::cout << "Hit ENTER to end simulation" << std::endl;
475 // char buf[1];
476 // std::cin.getline(buf,1);
477#endif
478 for (uint32_t i=0; i<nb_proc; ++i)
479 proc[i]->print_cpi();
480 for (uint32_t i=0; i<nb_proc; ++i)
481 proc[i]->print_stats();
482
483 soclib::common::dealloc_elems<sc_signal<bool> >(signal_tty_irq , nb_proc, nb_cpu_by_cache);
484 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_tgt_proc , nb_proc);
485 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_c_proc , nb_proc);
486 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_rw_proc , nb_proc);
487 soclib::common::dealloc_elems<sc_signal<bool> >(signal_proc_it , nb_proc, nb_cpu_by_cache, 6);
488
489 for (uint32_t i=0; i<nb_proc; ++i)
490 delete proc[i];
491
492 return EXIT_SUCCESS;
493}
494
495int sc_main (int argc, char *argv[])
496{
497 try {
498 return _main(argc, argv);
499 } catch (std::exception &e) {
500 std::cout << e.what() << std::endl;
501 } catch (...) {
502 std::cout << "Unknown exception occured" << std::endl;
503 throw;
504 }
505 return 1;
506}
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