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arch.py @ 1048

Last change on this file since 1048 was 1029, checked in by cfuguet, 9 years ago

Support the cluster 0 to be the IO cluster.

Update the arch.py to allow the execution of new revisions of the Giet-VM.

Property svn:executable set to *

File size: 19.8 KB

Rev	Line
[793]	1	#!/usr/bin/env python
	2
[803]	3	from math import log, ceil
[793]	4	from mapping import *
	5
	6	###############################################################################
[803]	7	# file : arch.py (for the tsar_generic_leti architecture)
[793]	8	# date : may 2014
	9	# author : Alain Greiner
	10	###############################################################################
[803]	11	# This file contains a mapping generator for the "tsar_generic_leti" platform.
[793]	12	# This includes both the hardware architecture (clusters, processors,
[937]	13	# peripherals, physical space segmentation) and the mapping of all boot
	14	# and kernel objects (global vsegs).
[793]	15	#
[967]	16	# This platform includes 6 external peripherals controllers located
	17	# in cluster[x_size-1][y_size-1]: TTY, IOC, FBF, NIC, CMA, PIC.
	18	# It does not use the IOB component.
[937]	19	# It does not use an external ROM, as the preloader code is (pre)loaded
	20	# at address 0x0, in the physical memory of cluster[0][0].
	21	# It can use an - optional - RAMDISK located in cluster[0][0].
[967]	22	# The upper row (y = y_size-1) does not contain processors or memory.
[937]	23	#
[967]	24	# The "constructor" parameters (defined in Makefile) are:
	25	# - x_size : number of clusters in a row
	26	# - y_size : number of clusters in a column
	27	# - nb_procs : number of processors per cluster
	28	# - nb_ttys : number of TTY channels
[820]	29	# - fbf_width : frame_buffer width = frame_buffer heigth
[967]	30	# - ioc_type : can be 'BDV','HBA','SDC','RDK'
	31	#
	32	# The others hardware parameters (defined below) are:
[793]	33	# - nb_nics : number of NIC channels
[937]	34	# - nb_cmas : number of CMA channels
[967]	35	# - x_io : cluster_io x coordinate
	36	# - y_io : cluster_io y coordinate
	37	# - x_width : number of bits for x coordinate
	38	# - y_width : number of bits for y coordinate
	39	# - paddr_width : number of bits for physical address
[793]	40	# - irq_per_proc : number of input IRQs per processor
[937]	41	# - use_ramdisk : use a RAMDISK when True
[967]	42	# - peri_increment : address increment for replicated vsegs
[820]	43	#
[937]	44	# Regarding the boot and kernel vsegs mapping :
	45	# - We use one big physical page (2 Mbytes) for the preloader and the four
	46	# boot vsegs, all allocated in cluster[0,0].
	47	# - We use the 16 next big pages in cluster[0][0] to implement the RAMDISK.
	48	# - We use one big page per cluster for the replicated kernel code vsegs.
	49	# - We use one big page in cluster[0][0] for the kernel data vseg.
	50	# - We use one big page per cluster for the distributed kernel heap vsegs.
	51	# - We use one big page per cluster for the distributed ptab vsegs.
	52	# - We use small physical pages (4 Kbytes) per cluster for the schedulers.
	53	# - We use one big page for each external peripheral in IO cluster,
	54	# - We use one small page per cluster for each internal peripheral.
	55	###############################################################################
[793]	56
	57	########################
[820]	58	def arch( x_size = 2,
	59	y_size = 2,
[937]	60	nb_procs = 4,
	61	nb_ttys = 1,
[967]	62	fbf_width = 128,
[1029]	63	ioc_type = 'HBA',
	64	mwr_type = 'CPY'):
[793]	65
	66	### define architecture constants
	67
[937]	68	nb_nics = 1
	69	nb_cmas = 2
[1029]	70	x_io = 0
	71	y_io = 0
[820]	72	x_width = 4
	73	y_width = 4
[967]	74	p_width = 2 # LETI constraint
[820]	75	paddr_width = 40
[967]	76	irq_per_proc = 4 # NetBSD constraint
	77	peri_increment = 0x10000
	78	reset_address = 0x00000000 # LETI constraint
[793]	79
	80	### parameters checking
	81
[960]	82	assert( nb_procs <= 4 )
[793]	83
[937]	84	assert( x_size <= (1 << x_width) )
[793]	85
[967]	86	assert( (y_size > 1) and (y_size <= (1 << y_width)) )
[793]	87
[967]	88	assert( ioc_type in [ 'BDV' , 'HBA' , 'SDC' , 'RDK' ] )
	89
[937]	90	### define type and name
[793]	91
[967]	92	platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs )
	93	platform_name += '_%d_%d_%s' % ( fbf_width , nb_ttys , ioc_type )
[793]	94
[937]	95	### define physical segments replicated in all clusters
	96	### the base address is extended by the cluster_xy (8 bits)
[793]	97
[937]	98	ram_base = 0x00000000
[793]	99	ram_size = 0x4000000 # 64 Mbytes
	100
[937]	101	xcu_base = 0xF0000000
[793]	102	xcu_size = 0x1000 # 4 Kbytes
	103
[937]	104	mmc_base = 0xF1000000
[793]	105	mmc_size = 0x1000 # 4 Kbytes
	106
[820]	107	### define physical segments for external peripherals
	108	## These segments are only defined in cluster_io
	109
[967]	110	ioc_base = 0xF2000000
	111	ioc_size = 0x1000 # 4kbytes
[793]	112
[944]	113	tty_base = 0xF4000000
[793]	114	tty_size = 0x4000 # 16 Kbytes
	115
[944]	116	nic_base = 0xF7000000
[793]	117	nic_size = 0x80000 # 512 kbytes
	118
[944]	119	cma_base = 0xF8000000
[793]	120	cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics
	121
[944]	122	pic_base = 0xF9000000
[937]	123	pic_size = 0x1000 # 4 Kbytes
	124
[944]	125	fbf_base = 0xF3000000
[793]	126	fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes
	127
	128
[819]	129	### define preloader & bootloader vsegs base addresses and sizes
[820]	130	### We want to pack these 5 vsegs in the same big page
	131	### => boot cost is one BPP in cluster[0][0]
[803]	132
[967]	133	preloader_vbase = reset_address # ident
[803]	134	preloader_size = 0x00010000 # 64 Kbytes
	135
	136	boot_mapping_vbase = 0x00010000 # ident
[793]	137	boot_mapping_size = 0x00080000 # 512 Kbytes
	138
[803]	139	boot_code_vbase = 0x00090000 # ident
[793]	140	boot_code_size = 0x00040000 # 256 Kbytes
	141
[803]	142	boot_data_vbase = 0x000D0000 # ident
[939]	143	boot_data_size = 0x000B0000 # 704 Kbytes
[793]	144
[939]	145	boot_stack_vbase = 0x00180000 # ident
	146	boot_stack_size = 0x00080000 # 512 Kbytes
[793]	147
[937]	148	### define ramdisk vseg / must be identity mapping in cluster[0][0]
[1029]	149	### occupies 16 BPP after the boot
	150	ramdisk_vbase = 0x02000000
[937]	151	ramdisk_size = 0x02000000 # 32 Mbytes
	152
[793]	153	### define kernel vsegs base addresses and sizes
[937]	154	### code, init, ptab, heap & sched vsegs are replicated in all clusters.
[820]	155	### data & uncdata vsegs are only mapped in cluster[0][0].
	156
[793]	157	kernel_code_vbase = 0x80000000
[937]	158	kernel_code_size = 0x00100000 # 1 Mbytes per cluster
[793]	159
[1029]	160	kernel_init_vbase = 0x88000000
[937]	161	kernel_init_size = 0x00100000 # 1 Mbytes per cluster
[793]	162
[937]	163	kernel_data_vbase = 0x90000000
	164	kernel_data_size = 0x00200000 # 2 Mbytes in cluster[0][0]
[793]	165
[937]	166	kernel_ptab_vbase = 0xE0000000
[825]	167	kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster
	168
[937]	169	kernel_heap_vbase = 0xD0000000
	170	kernel_heap_size = 0x00200000 # 2 Mbytes per cluster
	171
	172	kernel_sched_vbase = 0xA0000000
	173	kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per proc per cluster
	174
	175	#####################
[793]	176	### create mapping
[937]	177	#####################
[793]	178
	179	mapping = Mapping( name = platform_name,
	180	x_size = x_size,
	181	y_size = y_size,
[819]	182	nprocs = nb_procs,
[793]	183	x_width = x_width,
	184	y_width = y_width,
[803]	185	p_width = p_width,
[793]	186	paddr_width = paddr_width,
	187	coherence = True,
	188	irq_per_proc = irq_per_proc,
[967]	189	use_ramdisk = (ioc_type == 'RDK'),
[793]	190	x_io = x_io,
	191	y_io = y_io,
	192	peri_increment = peri_increment,
	193	reset_address = reset_address,
	194	ram_base = ram_base,
	195	ram_size = ram_size )
	196
[937]	197	###########################
	198	### Hardware Description
	199	###########################
[793]	200
[937]	201	for x in xrange( x_size ):
	202	for y in xrange( y_size ):
	203	cluster_xy = (x << y_width) + y;
	204	offset = cluster_xy << (paddr_width - x_width - y_width)
	205
	206	### components replicated in all clusters but the upper row
	207	if ( y < (y_size - 1) ):
[793]	208
[937]	209	ram = mapping.addRam( 'RAM', base = ram_base + offset,
	210	size = ram_size )
[793]	211
[937]	212	mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset,
	213	size = mmc_size, ptype = 'MMC' )
[793]	214
[937]	215	xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset,
	216	size = xcu_size, ptype = 'XCU',
[954]	217	channels = nb_procs * irq_per_proc,
[960]	218	arg0 = 16, arg1 = 16, arg2 = 16 )
[793]	219
[1029]	220	mapping.addIrq( xcu, index = 8 , src = mmc, isrtype = 'ISR_MMC' )
[793]	221
[1029]	222	if ( x==0 ) and ( y==0 ):
	223	tty = mapping.addPeriph( 'TTY', base = tty_base + offset, size = tty_size,
	224	ptype = 'TTY', channels = nb_ttys )
	225
	226	mapping.addIrq( xcu, index = 10, src = tty,
	227	isrtype = 'ISR_TTY_RX', channel = 0 )
	228
[937]	229	for p in xrange ( nb_procs ):
	230	mapping.addProc( x, y, p )
[793]	231
[1029]	232	### peripherals in external cluster_io
	233	if ( x_io!=0 ) and ( y_io!=0 ) and ( x==( x_size-1 ) ) and ( y==( y_size-1 ) ) :
[793]	234
[967]	235	if ( ioc_type != 'RDK' ):
	236	ioc = mapping.addPeriph( 'IOC', base = ioc_base + offset, size = ioc_size,
	237	ptype = 'IOC', subtype = ioc_type )
[826]	238
[944]	239	tty = mapping.addPeriph( 'TTY', base = tty_base + offset, size = tty_size,
[937]	240	ptype = 'TTY', channels = nb_ttys )
[793]	241
[944]	242	nic = mapping.addPeriph( 'NIC', base = nic_base + offset, size = nic_size,
[937]	243	ptype = 'NIC', channels = nb_nics )
[793]	244
[944]	245	cma = mapping.addPeriph( 'CMA', base = cma_base + offset, size = cma_size,
[937]	246	ptype = 'CMA', channels = nb_cmas )
[793]	247
[944]	248	fbf = mapping.addPeriph( 'FBF', base = fbf_base + offset, size = fbf_size,
[954]	249	ptype = 'FBF', arg0 = fbf_width, arg1 = fbf_width )
[793]	250
[944]	251	pic = mapping.addPeriph( 'PIC', base = pic_base + offset, size = pic_size,
[937]	252	ptype = 'PIC', channels = 32 )
[793]	253
[975]	254	mapping.addIrq( pic, index = 0, src = nic,
	255	isrtype = 'ISR_NIC_RX', channel = 0 )
	256	mapping.addIrq( pic, index = 1, src = nic,
	257	isrtype = 'ISR_NIC_RX', channel = 1 )
	258	mapping.addIrq( pic, index = 2, src = nic,
	259	isrtype = 'ISR_NIC_TX', channel = 0 )
	260	mapping.addIrq( pic, index = 3, src = nic,
	261	isrtype = 'ISR_NIC_TX', channel = 1 )
	262	mapping.addIrq( pic, index = 4, src = cma,
	263	isrtype = 'ISR_CMA', channel = 0 )
	264	mapping.addIrq( pic, index = 5, src = cma,
	265	isrtype = 'ISR_CMA', channel = 1 )
	266	mapping.addIrq( pic, index = 6, src = cma,
	267	isrtype = 'ISR_CMA', channel = 2 )
	268	mapping.addIrq( pic, index = 7, src = cma,
	269	isrtype = 'ISR_CMA', channel = 3 )
[793]	270
[1029]	271	if ( ioc_type != 'RDK' ):
	272	if ( ioc_type == 'BDV' ): isr_type = 'ISR_BDV'
	273	elif ( ioc_type == 'HBA' ): isr_type = 'ISR_HBA'
	274	elif ( ioc_type == 'SDC' ): isr_type = 'ISR_SDC'
[793]	275
[975]	276	mapping.addIrq( pic, index = 8, src = ioc,
	277	isrtype = isr_type, channel = 0 )
[793]	278
[975]	279	mapping.addIrq( pic, index = 16, src = tty,
	280	isrtype = 'ISR_TTY_RX', channel = 0 )
	281	mapping.addIrq( pic, index = 17, src = tty,
	282	isrtype = 'ISR_TTY_RX', channel = 1 )
	283	mapping.addIrq( pic, index = 18, src = tty,
	284	isrtype = 'ISR_TTY_RX', channel = 2 )
	285	mapping.addIrq( pic, index = 19, src = tty,
	286	isrtype = 'ISR_TTY_RX', channel = 3 )
	287	mapping.addIrq( pic, index = 20, src = tty,
	288	isrtype = 'ISR_TTY_RX', channel = 4 )
	289	mapping.addIrq( pic, index = 21, src = tty,
	290	isrtype = 'ISR_TTY_RX', channel = 5 )
	291	mapping.addIrq( pic, index = 22, src = tty,
	292	isrtype = 'ISR_TTY_RX', channel = 6 )
	293	mapping.addIrq( pic, index = 23, src = tty,
	294	isrtype = 'ISR_TTY_RX', channel = 7 )
[937]	295
	296	###################################
	297	### boot & kernel vsegs mapping
	298	###################################
	299
	300	### global vsegs for preloader & boot_loader are mapped in cluster[0][0]
[820]	301	### => same flags CXW_ / identity mapping / non local / big page
[793]	302
[820]	303	mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size,
[819]	304	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	305	identity = True, local = False, big = True )
	306
[793]	307	mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size,
[819]	308	'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM',
	309	identity = True, local = False, big = True )
[793]	310
	311	mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size,
	312	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
[819]	313	identity = True, local = False, big = True )
[793]	314
	315	mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size,
[819]	316	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	317	identity = True, local = False, big = True )
[793]	318
	319	mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size,
[819]	320	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	321	identity = True, local = False, big = True )
[793]	322
[937]	323	### global vseg for RAM-DISK in cluster[0][0]
	324	### identity mapping / non local / big pages
[967]	325	if (ioc_type == 'RDK'):
[937]	326	mapping.addGlobal( 'seg_ramdisk', ramdisk_vbase, ramdisk_size,
	327	'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	328	identity = True, local = True, big = True )
	329
[1029]	330	### global vseg kernel_data: non local / big page
	331	### Only mapped in cluster[0][0]
	332	mapping.addGlobal( 'seg_kernel_data',
	333	kernel_data_vbase, kernel_data_size,
	334	'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
	335	binpath = 'bin/kernel/kernel.elf',
	336	local = False, big = True )
	337
[820]	338	### global vsegs kernel_code, kernel_init : local / big page
[937]	339	### replicated in all clusters containing processors
	340	### same content => same name / same vbase
[819]	341	for x in xrange( x_size ):
[937]	342	for y in xrange( y_size - 1 ):
	343	mapping.addGlobal( 'seg_kernel_code',
	344	kernel_code_vbase, kernel_code_size,
[820]	345	'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
[1029]	346	binpath = 'bin/kernel/kernel.elf',
[819]	347	local = True, big = True )
[793]	348
[937]	349	mapping.addGlobal( 'seg_kernel_init',
	350	kernel_init_vbase, kernel_init_size,
[820]	351	'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
[1029]	352	binpath = 'bin/kernel/kernel.elf',
[819]	353	local = True, big = True )
[793]	354
[937]	355	### Global vsegs kernel_ptab_x_y: non local / big page
	356	### replicated in all clusters containing processors
	357	### different content => name & vbase indexed by (x,y)
[820]	358	for x in xrange( x_size ):
[937]	359	for y in xrange( y_size - 1 ):
	360	offset = ((x << y_width) + y) * kernel_ptab_size
	361	mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y),
	362	kernel_ptab_vbase + offset, kernel_ptab_size,
[820]	363	'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM',
	364	local = False, big = True )
	365
[1029]	366	### global vsegs kernel_sched : non local / small pages
	367	### allocated in all clusters containing processors
	368	### different content => name & vbase indexed by (x,y)
	369	for x in xrange( x_size ):
	370	for y in xrange( y_size - 1 ):
	371	offset = ((x << y_width) + y) * kernel_ptab_size
	372	mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y),
	373	kernel_sched_vbase + offset , kernel_sched_size,
	374	'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM',
	375	local = False, big = False )
	376
[937]	377	### global vsegs kernel_heap_x_y : non local / big pages
	378	### distributed in all clusters containing processors
	379	### different content => name & vbase indexed by (x,y)
	380	for x in xrange( x_size ):
	381	for y in xrange( y_size - 1 ):
	382	offset = ((x << y_width) + y) * kernel_heap_size
	383	mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y),
	384	kernel_heap_vbase + offset , kernel_heap_size,
	385	'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
	386	local = False, big = True )
	387
[820]	388	### global vsegs for external peripherals: non local / big page
[937]	389	### only mapped in cluster_io
[1029]	390	if ioc_type != 'RDK':
	391	mapping.addGlobal( 'seg_ioc', ioc_base, ioc_size,
	392	'__W_', vtype = 'PERI', x = x_io, y = y_io,
	393	pseg = 'IOC', local = False, big = True )
[820]	394
[944]	395	mapping.addGlobal( 'seg_tty', tty_base, tty_size,
[1029]	396	'__W_', vtype = 'PERI', x = x_io, y = y_io,
	397	pseg = 'TTY', local = False, big = True )
[820]	398
[1029]	399	if ( x_io!=0 ) and ( y_io!=0 ) :
	400	mapping.addGlobal( 'seg_nic', nic_base, nic_size,
	401	'__W_', vtype = 'PERI', x = x_size-1, y = y_size-1,
	402	pseg = 'NIC', local = False, big = True )
[937]	403
[1029]	404	mapping.addGlobal( 'seg_cma', cma_base, cma_size,
	405	'__W_', vtype = 'PERI', x = x_size-1, y = y_size-1,
	406	pseg = 'CMA', local = False, big = True )
[937]	407
[1029]	408	mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size,
	409	'__W_', vtype = 'PERI', x = x_size-1, y = y_size-1,
	410	pseg = 'FBF', local = False, big = True )
[937]	411
[1029]	412	mapping.addGlobal( 'seg_pic', pic_base, pic_size,
	413	'__W_', vtype = 'PERI', x = x_size-1, y = y_size-1,
	414	pseg = 'PIC', local = False, big = True )
[937]	415
[820]	416	### global vsegs for internal peripherals : non local / small pages
[937]	417	### allocated in all clusters containing processors
	418	### name and vbase indexed by (x,y)
[820]	419	for x in xrange( x_size ):
[937]	420	for y in xrange( y_size - 1 ):
[820]	421	offset = ((x << y_width) + y) * peri_increment
	422
[937]	423	mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y),
	424	xcu_base + offset, xcu_size,
[820]	425	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU',
	426	local = False, big = False )
	427
[937]	428	mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y),
	429	mmc_base + offset, mmc_size,
[820]	430	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC',
	431	local = False, big = False )
	432
[793]	433	return mapping
	434
[937]	435	########################## platform test #############################################
[793]	436
	437	if __name__ == '__main__':
	438
	439	mapping = arch( x_size = 2,
	440	y_size = 2,
	441	nb_procs = 2 )
	442
	443	# print mapping.netbsd_dts()
	444
	445	print mapping.xml()
	446
	447	# print mapping.giet_vsegs()
	448
	449
	450	# Local Variables:
	451	# tab-width: 4;
	452	# c-basic-offset: 4;
	453	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	454	# indent-tabs-mode: nil;
	455	# End:
	456	#
	457	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	458

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source: trunk/platforms/tsar_generic_leti/arch.py @ 1048

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