Changeset 937 for trunk/platforms/tsar_generic_leti/arch.py
- Timestamp:
- Feb 1, 2015, 5:06:41 PM (10 years ago)
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trunk/platforms/tsar_generic_leti/arch.py
r870 r937 11 11 # This file contains a mapping generator for the "tsar_generic_leti" platform. 12 12 # This includes both the hardware architecture (clusters, processors, 13 # peripherals, physical space segmentation) and the mapping of all kernel 14 # objects (global vsegs). 15 # 16 # The "constructor" parameters are: 17 # - x_size : number of clusters in a row 18 # - y_size : number of clusters in a column 19 # - nb_procs : number of processors per cluster 13 # peripherals, physical space segmentation) and the mapping of all boot 14 # and kernel objects (global vsegs). 15 # 16 # The x_size & y_size parameters define the total number of clusters. 17 # The upper row (y = y_size-1) does not contain processors or memory. 18 # 19 # It does not use the IOB component: 20 # The external peripherals are located in cluster[x_size-1][y_size-1]. 21 # 22 # It does not use an external ROM, as the preloader code is (pre)loaded 23 # at address 0x0, in the physical memory of cluster[0][0]. 24 # 25 # It can use an - optional - RAMDISK located in cluster[0][0]. 26 # 27 # The others hardware parameters are: 20 28 # - fbf_width : frame_buffer width = frame_buffer heigth 21 #22 # The "hidden" parameters (defined below) are:23 29 # - nb_ttys : number of TTY channels 24 30 # - nb_nics : number of NIC channels 25 # - x_io : cluster_io x coordinate 26 # - y_io : cluster_io y coordinate 27 # - x_width : number of bits for x coordinate 28 # - y_width : number of bits for y coordinate 29 # - paddr_width : number of bits for physical address 31 # - nb_cmas : number of CMA channels 30 32 # - irq_per_proc : number of input IRQs per processor 31 # - use_ramdisk : use a ramdiskwhen True33 # - use_ramdisk : use a RAMDISK when True 32 34 # - peri_increment : address increment for replicated peripherals 33 35 # 34 # Regarding physical memory allocation, there is one allocator per cluster: 35 # - We use only one big physical page (2 Mbytes) for the five boot vsegs, 36 # allocated in cluster[0,0], identity mapping. 37 # - We use one big page per cluster for the kernel vsegs. 38 # The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters. 39 # The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0]. 40 # - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers. 41 # - We use one big page for each external peripheral in IO cluster, 42 # - We use one small page per cluster for each internal peripheral. 43 ################################################################################### 36 # Regarding the boot and kernel vsegs mapping : 37 # - We use one big physical page (2 Mbytes) for the preloader and the four 38 # boot vsegs, all allocated in cluster[0,0]. 39 # - We use the 16 next big pages in cluster[0][0] to implement the RAMDISK. 40 # - We use one big page per cluster for the replicated kernel code vsegs. 41 # - We use one big page in cluster[0][0] for the kernel data vseg. 42 # - We use one big page per cluster for the distributed kernel heap vsegs. 43 # - We use one big page per cluster for the distributed ptab vsegs. 44 # - We use small physical pages (4 Kbytes) per cluster for the schedulers. 45 # - We use one big page for each external peripheral in IO cluster, 46 # - We use one small page per cluster for each internal peripheral. 47 ############################################################################### 44 48 45 49 ######################## 46 50 def arch( x_size = 2, 47 51 y_size = 2, 48 nb_procs = 2, 52 nb_procs = 4, 53 nb_ttys = 1, 49 54 fbf_width = 128 ): 50 55 51 56 ### define architecture constants 52 57 53 nb_ ttys = 154 nb_ nics = 255 x_io = 056 y_io = 058 nb_nics = 1 59 nb_cmas = 2 60 x_io = x_size - 1 61 y_io = y_size - 1 57 62 x_width = 4 58 63 y_width = 4 … … 60 65 paddr_width = 40 61 66 irq_per_proc = 4 62 use_ramdisk = True 63 peri_increment = 0x10000 # distributed peripherals vbase address increment 64 sched_increment = 0x10000 # distributed schedulers vbase address increment 65 ptab_increment = 0x200000 # distributed page tables vbase address increment 66 reset_address = 0x00000000 67 use_ramdisk = False 68 peri_increment = 0x10000 # distributed peripherals vbase increment 69 reset_address = 0x00000000 # wired preloader pbase address 67 70 68 71 ### parameters checking … … 70 73 assert( nb_procs <= (1 << p_width) ) 71 74 72 assert( (x_size >= 1) and (x_size <= 16) ) 73 74 assert( (y_size >= 1) and (y_size <= 16) ) 75 76 assert( nb_ttys == 1 ) 77 78 assert( ((x_io == 0) and (y_io == 0)) or 79 ((x_io == x_size-1) and (y_io == y_size-1)) ) 80 81 platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs ) 82 83 ### define physical segments 84 ### These segments are replicated in all clusters 85 86 ram_base = 0x0000000000 75 assert( x_size <= (1 << x_width) ) 76 77 assert( y_size <= (1 << y_width) ) 78 79 ### define type and name 80 81 platform_type = 'tsar_leti' 82 platform_name = '%s_%d_%d_%d' % (platform_type, x_size, y_size, nb_procs ) 83 84 ### define physical segments replicated in all clusters 85 ### the base address is extended by the cluster_xy (8 bits) 86 87 ram_base = 0x00000000 87 88 ram_size = 0x4000000 # 64 Mbytes 88 89 89 xcu_base = 0x 00F000000090 xcu_base = 0xF0000000 90 91 xcu_size = 0x1000 # 4 Kbytes 91 92 92 mmc_base = 0x 00E000000093 mmc_base = 0xF1000000 93 94 mmc_size = 0x1000 # 4 Kbytes 94 95 … … 96 97 ## These segments are only defined in cluster_io 97 98 98 offset_io= ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width)99 100 bdv_base = 0x 00F2000000 + offset_io99 cluster_xy = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width) 100 101 bdv_base = 0xF2000000 + cluster_xy 101 102 bdv_size = 0x1000 # 4kbytes 102 103 103 tty_base = 0x 00F4000000 + offset_io104 tty_base = 0xF4000000 + cluster_xy 104 105 tty_size = 0x4000 # 16 Kbytes 105 106 106 nic_base = 0x 00F7000000 + offset_io107 nic_base = 0xF7000000 + cluster_xy 107 108 nic_size = 0x80000 # 512 kbytes 108 109 109 cma_base = 0x 00F8000000 + offset_io110 cma_base = 0xF8000000 + cluster_xy 110 111 cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics 111 112 112 fbf_base = 0x00F3000000 + offset_io 113 pic_base = 0xF9000000 + cluster_xy 114 pic_size = 0x1000 # 4 Kbytes 115 116 fbf_base = 0xF3000000 + cluster_xy 113 117 fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes 114 118 115 pic_base = 0x00F9000000 + offset_io116 pic_size = 0x1000 # 4 Kbytes117 118 rdk_base = 0x02000000119 rdk_size = 0x02000000 # 32 Mbytes120 119 121 120 ### define preloader & bootloader vsegs base addresses and sizes … … 133 132 134 133 boot_data_vbase = 0x000D0000 # ident 135 boot_data_size = 0x00080000 # 512 Kbytes 136 137 boot_stack_vbase = 0x00150000 # ident 138 boot_stack_size = 0x00050000 # 320 Kbytes 134 boot_data_size = 0x000C0000 # 768 Kbytes 135 136 boot_stack_vbase = 0x00190000 # ident 137 boot_stack_size = 0x00070000 # 448 Kbytes 138 139 ### define ramdisk vseg / must be identity mapping in cluster[0][0] 140 ### occupies 15 BPP after the boot 141 ramdisk_vbase = 0x00200000 142 ramdisk_size = 0x02000000 # 32 Mbytes 139 143 140 144 ### define kernel vsegs base addresses and sizes 141 ### code, init, ptab & sched vsegs are replicated in all clusters.145 ### code, init, ptab, heap & sched vsegs are replicated in all clusters. 142 146 ### data & uncdata vsegs are only mapped in cluster[0][0]. 143 ### - We pack code, init, data vsegs in the same BIG page.144 ### - We use another BIG page for the ptab vseg.145 ### - We use 2*nb_procs SMALL pages for the sched vseg.146 ### - we use one SMALL page for uncdata147 ### => kernel cost is 2 BPPs and (2*n + 1) SPPs per cluster.148 147 149 148 kernel_code_vbase = 0x80000000 150 kernel_code_size = 0x00080000 # 512 Kbytes per cluster 151 152 kernel_init_vbase = 0x80080000 153 kernel_init_size = 0x00080000 # 512 Kbytes per cluster 154 155 kernel_data_vbase = 0x80100000 156 kernel_data_size = 0x00100000 # 1 Mbytes in cluster[0][0] 157 158 kernel_uncdata_vbase = 0x80200000 159 kernel_uncdata_size = 0x00001000 # 4 Kbytes 160 161 kernel_sched_vbase = 0x80400000 # distributed in all clusters 162 kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per processor 163 164 kernel_ptab_vbase = 0xC0000000 149 kernel_code_size = 0x00100000 # 1 Mbytes per cluster 150 151 kernel_init_vbase = 0x80100000 152 kernel_init_size = 0x00100000 # 1 Mbytes per cluster 153 154 kernel_data_vbase = 0x90000000 155 kernel_data_size = 0x00200000 # 2 Mbytes in cluster[0][0] 156 157 kernel_uncdata_vbase = 0x90200000 158 kernel_uncdata_size = 0x00001000 # 4 Kbytes in cluster[0][0] 159 160 kernel_ptab_vbase = 0xE0000000 165 161 kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster 166 162 163 kernel_heap_vbase = 0xD0000000 164 kernel_heap_size = 0x00200000 # 2 Mbytes per cluster 165 166 kernel_sched_vbase = 0xA0000000 167 kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per proc per cluster 168 169 ##################### 167 170 ### create mapping 171 ##################### 168 172 169 173 mapping = Mapping( name = platform_name, 174 p_type = platform_type, 170 175 x_size = x_size, 171 176 y_size = y_size, … … 185 190 ram_size = ram_size ) 186 191 187 ### external peripherals (accessible in cluster[0,0] only for this mapping) 188 189 bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' ) 190 191 tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) 192 193 if x_io != 0 or y_io != 0: 194 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) 195 cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) 196 fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) 197 pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) 198 199 mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) 200 mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) 201 mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) 202 mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) 203 mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) 204 mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) 205 mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) 206 mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) 207 mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) 208 mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) 209 210 mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', 211 vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', 212 local = False, big = True ) 213 214 mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', 215 vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', 216 local = False, big = True ) 217 218 mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', 219 vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', 220 local = False, big = True ) 221 222 mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', 223 vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', 224 local = False, big = True ) 225 226 ### hardware components replicated in all clusters 192 ########################### 193 ### Hardware Description 194 ########################### 227 195 228 196 for x in xrange( x_size ): … … 230 198 cluster_xy = (x << y_width) + y; 231 199 offset = cluster_xy << (paddr_width - x_width - y_width) 232 233 ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) 234 235 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, 236 ptype = 'MMC' ) 237 238 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, 239 ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) 240 241 # IRQs replicated in all clusters 242 mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' ) 243 244 # IRQ in IO cluster (0,0) 245 if x == 0 and y == 0: 246 mapping.addIrq( xcu, index = 9 , isrtype = 'ISR_BDV' ) 247 mapping.addIrq( xcu, index = 10, isrtype = 'ISR_TTY_RX' ) 248 249 # processors 250 for p in xrange ( nb_procs ): 251 mapping.addProc( x, y, p ) 252 253 ### global vsegs for preloader & boot_loader 200 201 ### components replicated in all clusters but the upper row 202 if ( y < (y_size - 1) ): 203 204 ram = mapping.addRam( 'RAM', base = ram_base + offset, 205 size = ram_size ) 206 207 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, 208 size = mmc_size, ptype = 'MMC' ) 209 210 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, 211 size = xcu_size, ptype = 'XCU', 212 channels = nb_procs * irq_per_proc, arg = 16 ) 213 214 mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' ) 215 216 for p in xrange ( nb_procs ): 217 mapping.addProc( x, y, p ) 218 219 ### external peripherals in cluster_io 220 if ( (x==x_io) and (y==y_io) ): 221 222 bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, 223 ptype = 'IOC', subtype = 'BDV' ) 224 225 tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, 226 ptype = 'TTY', channels = nb_ttys ) 227 228 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, 229 ptype = 'NIC', channels = nb_nics ) 230 231 cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, 232 ptype = 'CMA', channels = nb_cmas ) 233 234 fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, 235 ptype = 'FBF', arg = fbf_width ) 236 237 pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, 238 ptype = 'PIC', channels = 32 ) 239 240 mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) 241 mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) 242 243 mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) 244 mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) 245 246 mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) 247 mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) 248 mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) 249 mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) 250 251 mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) 252 253 mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) 254 mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 ) 255 mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 ) 256 mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 ) 257 mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 ) 258 mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 ) 259 mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 ) 260 mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 ) 261 262 ################################### 263 ### boot & kernel vsegs mapping 264 ################################### 265 266 ### global vsegs for preloader & boot_loader are mapped in cluster[0][0] 254 267 ### we want to pack those 5 vsegs in the same big page 255 268 ### => same flags CXW_ / identity mapping / non local / big page … … 275 288 identity = True, local = False, big = True ) 276 289 290 ### global vseg for RAM-DISK in cluster[0][0] 291 ### identity mapping / non local / big pages 292 if use_ramdisk: 293 294 mapping.addGlobal( 'seg_ramdisk', ramdisk_vbase, ramdisk_size, 295 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', 296 identity = True, local = True, big = True ) 297 277 298 ### global vsegs kernel_code, kernel_init : local / big page 278 ### replicated in all clusters with the same name (same vbase) 279 for x in xrange( x_size ): 280 for y in xrange( y_size ): 281 mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, 299 ### replicated in all clusters containing processors 300 ### same content => same name / same vbase 301 for x in xrange( x_size ): 302 for y in xrange( y_size - 1 ): 303 304 mapping.addGlobal( 'seg_kernel_code', 305 kernel_code_vbase, kernel_code_size, 282 306 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', 283 307 binpath = 'build/kernel/kernel.elf', 284 308 local = True, big = True ) 285 309 286 mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, 310 mapping.addGlobal( 'seg_kernel_init', 311 kernel_init_vbase, kernel_init_size, 287 312 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', 288 313 binpath = 'build/kernel/kernel.elf', … … 291 316 ### global vseg kernel_data: non local / big page 292 317 ### Only mapped in cluster[0][0] 293 mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, 294 'CXW_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', 295 binpath = 'build/kernel/kernel.elf', 318 mapping.addGlobal( 'seg_kernel_data', 319 kernel_data_vbase, kernel_data_size, 320 'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', 321 binpath = 'build/kernel/kernel.elf', 296 322 local = False, big = True ) 297 323 298 324 ### global vseg kernel_uncdata: non local / small page 299 325 ### Only mapped in cluster[0][0] 300 mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, 326 mapping.addGlobal( 'seg_kernel_uncdata', 327 kernel_uncdata_vbase, kernel_uncdata_size, 301 328 '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', 302 binpath = 'build/kernel/kernel.elf', 329 binpath = 'build/kernel/kernel.elf', 303 330 local = False, big = False ) 304 331 305 for x in xrange( x_size ):306 for y in xrange( y_size ):307 cluster_xy = (x << y_width) + y;308 309 ### Global vsegs kernel_ptab_x_y: non local / big pages310 ### replicated in all clusters with name indexed by (x,y)311 ### as vbase address is incremented by (cluster_xy * vseg_increment) 312 offset = cluster_xy * ptab_increment313 mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y),kernel_ptab_vbase + offset, kernel_ptab_size,332 ### Global vsegs kernel_ptab_x_y: non local / big page 333 ### replicated in all clusters containing processors 334 ### different content => name & vbase indexed by (x,y) 335 for x in xrange( x_size ): 336 for y in xrange( y_size - 1 ): 337 offset = ((x << y_width) + y) * kernel_ptab_size 338 339 mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), 340 kernel_ptab_vbase + offset, kernel_ptab_size, 314 341 'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', 315 342 local = False, big = True ) 316 343 317 ### global vsegs kernel_sched : non local / small pages 318 ### allocated in all clusters with name indexed by (x,y) 319 ### as vbase address is incremented by (cluster_xy * vseg_increment) 320 offset = cluster_xy * sched_increment 321 mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset, kernel_sched_size, 344 ### global vsegs kernel_sched : non local / small pages 345 ### allocated in all clusters containing processors 346 ### different content => name & vbase indexed by (x,y) 347 for x in xrange( x_size ): 348 for y in xrange( y_size - 1 ): 349 offset = ((x << y_width) + y) * kernel_ptab_size 350 351 mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), 352 kernel_sched_vbase + offset , kernel_sched_size, 322 353 'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM', 323 354 local = False, big = False ) 324 355 325 ### global vseg for ram disk 326 if use_ramdisk: 327 mapping.addGlobal( 'seg_rdk', rdk_base, rdk_size, '__W_', 328 vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', 329 identity = True, local = False, big = True ) 356 ### global vsegs kernel_heap_x_y : non local / big pages 357 ### distributed in all clusters containing processors 358 ### different content => name & vbase indexed by (x,y) 359 for x in xrange( x_size ): 360 for y in xrange( y_size - 1 ): 361 offset = ((x << y_width) + y) * kernel_heap_size 362 363 mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), 364 kernel_heap_vbase + offset , kernel_heap_size, 365 'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM', 366 local = False, big = True ) 330 367 331 368 ### global vsegs for external peripherals: non local / big page 332 mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', 333 vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', 334 local = False, big = True ) 335 336 mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', 337 vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', 369 ### only mapped in cluster_io 370 mapping.addGlobal( 'seg_bdv', 371 bdv_base, bdv_size, 372 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'BDV', 373 local = False, big = True ) 374 375 mapping.addGlobal( 'seg_tty', 376 tty_base, tty_size, 377 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'TTY', 378 local = False, big = True ) 379 380 mapping.addGlobal( 'seg_nic', 381 nic_base, nic_size, 382 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'NIC', 383 local = False, big = True ) 384 385 mapping.addGlobal( 'seg_cma', 386 cma_base, cma_size, 387 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'CMA', 388 local = False, big = True ) 389 390 mapping.addGlobal( 'seg_fbf', 391 fbf_base, fbf_size, 392 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'FBF', 393 local = False, big = True ) 394 395 mapping.addGlobal( 'seg_pic', 396 pic_base, pic_size, 397 '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'PIC', 338 398 local = False, big = True ) 339 399 340 400 ### global vsegs for internal peripherals : non local / small pages 341 ### allocated in all clusters with name indexed by (x,y)342 ### as vbase address is incremented by (cluster_xy * vseg_increment)343 for x in xrange( x_size ): 344 for y in xrange( y_size ):401 ### allocated in all clusters containing processors 402 ### name and vbase indexed by (x,y) 403 for x in xrange( x_size ): 404 for y in xrange( y_size - 1 ): 345 405 offset = ((x << y_width) + y) * peri_increment 346 406 347 mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size, 407 mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), 408 xcu_base + offset, xcu_size, 348 409 '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU', 349 410 local = False, big = False ) 350 411 351 mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), mmc_base + offset, mmc_size, 412 mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), 413 mmc_base + offset, mmc_size, 352 414 '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC', 353 415 local = False, big = False ) 354 416 355 ### return mapping ###356 357 417 return mapping 358 418 359 ########################## ####### platform test #######################################################419 ########################## platform test ############################################# 360 420 361 421 if __name__ == '__main__':
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