Context Navigation

source: trunk/platforms/tsar_generic_leti/arch.py @ 978

Last change on this file since 978 was 975, checked in by cfuguet, 10 years ago

Update arch.py scripts to support the new mapping.py version

In this new version, the addIrq() function takes as a supplementary argument the instance of the interrupt generating peripheral.

Property svn:executable set to *

File size: 19.3 KB

Rev	Line
[793]	1	#!/usr/bin/env python
	2
[803]	3	from math import log, ceil
[793]	4	from mapping import *
	5
	6	###############################################################################
[803]	7	# file : arch.py (for the tsar_generic_leti architecture)
[793]	8	# date : may 2014
	9	# author : Alain Greiner
	10	###############################################################################
[803]	11	# This file contains a mapping generator for the "tsar_generic_leti" platform.
[793]	12	# This includes both the hardware architecture (clusters, processors,
[937]	13	# peripherals, physical space segmentation) and the mapping of all boot
	14	# and kernel objects (global vsegs).
[793]	15	#
[967]	16	# This platform includes 6 external peripherals controllers located
	17	# in cluster[x_size-1][y_size-1]: TTY, IOC, FBF, NIC, CMA, PIC.
	18	# It does not use the IOB component.
[937]	19	# It does not use an external ROM, as the preloader code is (pre)loaded
	20	# at address 0x0, in the physical memory of cluster[0][0].
	21	# It can use an - optional - RAMDISK located in cluster[0][0].
[967]	22	# The upper row (y = y_size-1) does not contain processors or memory.
[937]	23	#
[967]	24	# The "constructor" parameters (defined in Makefile) are:
	25	# - x_size : number of clusters in a row
	26	# - y_size : number of clusters in a column
	27	# - nb_procs : number of processors per cluster
	28	# - nb_ttys : number of TTY channels
[820]	29	# - fbf_width : frame_buffer width = frame_buffer heigth
[967]	30	# - ioc_type : can be 'BDV','HBA','SDC','RDK'
	31	#
	32	# The others hardware parameters (defined below) are:
[793]	33	# - nb_nics : number of NIC channels
[937]	34	# - nb_cmas : number of CMA channels
[967]	35	# - x_io : cluster_io x coordinate
	36	# - y_io : cluster_io y coordinate
	37	# - x_width : number of bits for x coordinate
	38	# - y_width : number of bits for y coordinate
	39	# - paddr_width : number of bits for physical address
[793]	40	# - irq_per_proc : number of input IRQs per processor
[937]	41	# - use_ramdisk : use a RAMDISK when True
[967]	42	# - peri_increment : address increment for replicated vsegs
[820]	43	#
[937]	44	# Regarding the boot and kernel vsegs mapping :
	45	# - We use one big physical page (2 Mbytes) for the preloader and the four
	46	# boot vsegs, all allocated in cluster[0,0].
	47	# - We use the 16 next big pages in cluster[0][0] to implement the RAMDISK.
	48	# - We use one big page per cluster for the replicated kernel code vsegs.
	49	# - We use one big page in cluster[0][0] for the kernel data vseg.
	50	# - We use one big page per cluster for the distributed kernel heap vsegs.
	51	# - We use one big page per cluster for the distributed ptab vsegs.
	52	# - We use small physical pages (4 Kbytes) per cluster for the schedulers.
	53	# - We use one big page for each external peripheral in IO cluster,
	54	# - We use one small page per cluster for each internal peripheral.
	55	###############################################################################
[793]	56
	57	########################
[820]	58	def arch( x_size = 2,
	59	y_size = 2,
[937]	60	nb_procs = 4,
	61	nb_ttys = 1,
[967]	62	fbf_width = 128,
	63	ioc_type = 'HBA' ):
[793]	64
	65	### define architecture constants
	66
[937]	67	nb_nics = 1
	68	nb_cmas = 2
[967]	69	x_io = x_size - 1 # LETI constraint
	70	y_io = y_size - 1 # LETI constraint
[820]	71	x_width = 4
	72	y_width = 4
[967]	73	p_width = 2 # LETI constraint
[820]	74	paddr_width = 40
[967]	75	irq_per_proc = 4 # NetBSD constraint
	76	peri_increment = 0x10000
	77	reset_address = 0x00000000 # LETI constraint
[793]	78
	79	### parameters checking
	80
[960]	81	assert( nb_procs <= 4 )
[793]	82
[937]	83	assert( x_size <= (1 << x_width) )
[793]	84
[967]	85	assert( (y_size > 1) and (y_size <= (1 << y_width)) )
[793]	86
[967]	87	assert( ioc_type in [ 'BDV' , 'HBA' , 'SDC' , 'RDK' ] )
	88
[937]	89	### define type and name
[793]	90
[967]	91	platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs )
	92	platform_name += '_%d_%d_%s' % ( fbf_width , nb_ttys , ioc_type )
[793]	93
[937]	94	### define physical segments replicated in all clusters
	95	### the base address is extended by the cluster_xy (8 bits)
[793]	96
[937]	97	ram_base = 0x00000000
[793]	98	ram_size = 0x4000000 # 64 Mbytes
	99
[937]	100	xcu_base = 0xF0000000
[793]	101	xcu_size = 0x1000 # 4 Kbytes
	102
[937]	103	mmc_base = 0xF1000000
[793]	104	mmc_size = 0x1000 # 4 Kbytes
	105
[820]	106	### define physical segments for external peripherals
	107	## These segments are only defined in cluster_io
	108
[967]	109	ioc_base = 0xF2000000
	110	ioc_size = 0x1000 # 4kbytes
[793]	111
[944]	112	tty_base = 0xF4000000
[793]	113	tty_size = 0x4000 # 16 Kbytes
	114
[944]	115	nic_base = 0xF7000000
[793]	116	nic_size = 0x80000 # 512 kbytes
	117
[944]	118	cma_base = 0xF8000000
[793]	119	cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics
	120
[944]	121	pic_base = 0xF9000000
[937]	122	pic_size = 0x1000 # 4 Kbytes
	123
[944]	124	fbf_base = 0xF3000000
[793]	125	fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes
	126
	127
[819]	128	### define preloader & bootloader vsegs base addresses and sizes
[820]	129	### We want to pack these 5 vsegs in the same big page
	130	### => boot cost is one BPP in cluster[0][0]
[803]	131
[967]	132	preloader_vbase = reset_address # ident
[803]	133	preloader_size = 0x00010000 # 64 Kbytes
	134
	135	boot_mapping_vbase = 0x00010000 # ident
[793]	136	boot_mapping_size = 0x00080000 # 512 Kbytes
	137
[803]	138	boot_code_vbase = 0x00090000 # ident
[793]	139	boot_code_size = 0x00040000 # 256 Kbytes
	140
[803]	141	boot_data_vbase = 0x000D0000 # ident
[939]	142	boot_data_size = 0x000B0000 # 704 Kbytes
[793]	143
[939]	144	boot_stack_vbase = 0x00180000 # ident
	145	boot_stack_size = 0x00080000 # 512 Kbytes
[793]	146
[937]	147	### define ramdisk vseg / must be identity mapping in cluster[0][0]
	148	### occupies 15 BPP after the boot
	149	ramdisk_vbase = 0x00200000
	150	ramdisk_size = 0x02000000 # 32 Mbytes
	151
[793]	152	### define kernel vsegs base addresses and sizes
[937]	153	### code, init, ptab, heap & sched vsegs are replicated in all clusters.
[820]	154	### data & uncdata vsegs are only mapped in cluster[0][0].
	155
[793]	156	kernel_code_vbase = 0x80000000
[937]	157	kernel_code_size = 0x00100000 # 1 Mbytes per cluster
[793]	158
[937]	159	kernel_init_vbase = 0x80100000
	160	kernel_init_size = 0x00100000 # 1 Mbytes per cluster
[793]	161
[937]	162	kernel_data_vbase = 0x90000000
	163	kernel_data_size = 0x00200000 # 2 Mbytes in cluster[0][0]
[793]	164
[937]	165	kernel_ptab_vbase = 0xE0000000
[825]	166	kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster
	167
[937]	168	kernel_heap_vbase = 0xD0000000
	169	kernel_heap_size = 0x00200000 # 2 Mbytes per cluster
	170
	171	kernel_sched_vbase = 0xA0000000
	172	kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per proc per cluster
	173
	174	#####################
[793]	175	### create mapping
[937]	176	#####################
[793]	177
	178	mapping = Mapping( name = platform_name,
	179	x_size = x_size,
	180	y_size = y_size,
[819]	181	nprocs = nb_procs,
[793]	182	x_width = x_width,
	183	y_width = y_width,
[803]	184	p_width = p_width,
[793]	185	paddr_width = paddr_width,
	186	coherence = True,
	187	irq_per_proc = irq_per_proc,
[967]	188	use_ramdisk = (ioc_type == 'RDK'),
[793]	189	x_io = x_io,
	190	y_io = y_io,
	191	peri_increment = peri_increment,
	192	reset_address = reset_address,
	193	ram_base = ram_base,
	194	ram_size = ram_size )
	195
[937]	196	###########################
	197	### Hardware Description
	198	###########################
[793]	199
[937]	200	for x in xrange( x_size ):
	201	for y in xrange( y_size ):
	202	cluster_xy = (x << y_width) + y;
	203	offset = cluster_xy << (paddr_width - x_width - y_width)
	204
	205	### components replicated in all clusters but the upper row
	206	if ( y < (y_size - 1) ):
[793]	207
[937]	208	ram = mapping.addRam( 'RAM', base = ram_base + offset,
	209	size = ram_size )
[793]	210
[937]	211	mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset,
	212	size = mmc_size, ptype = 'MMC' )
[793]	213
[937]	214	xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset,
	215	size = xcu_size, ptype = 'XCU',
[954]	216	channels = nb_procs * irq_per_proc,
[960]	217	arg0 = 16, arg1 = 16, arg2 = 16 )
[793]	218
[975]	219	mapping.addIrq( xcu, index = 8, src = mmc, isrtype = 'ISR_MMC' )
[793]	220
[937]	221	for p in xrange ( nb_procs ):
	222	mapping.addProc( x, y, p )
[793]	223
[937]	224	### external peripherals in cluster_io
	225	if ( (x==x_io) and (y==y_io) ):
[793]	226
[967]	227	if ( ioc_type != 'RDK' ):
	228	ioc = mapping.addPeriph( 'IOC', base = ioc_base + offset, size = ioc_size,
	229	ptype = 'IOC', subtype = ioc_type )
[826]	230
[944]	231	tty = mapping.addPeriph( 'TTY', base = tty_base + offset, size = tty_size,
[937]	232	ptype = 'TTY', channels = nb_ttys )
[793]	233
[944]	234	nic = mapping.addPeriph( 'NIC', base = nic_base + offset, size = nic_size,
[937]	235	ptype = 'NIC', channels = nb_nics )
[793]	236
[944]	237	cma = mapping.addPeriph( 'CMA', base = cma_base + offset, size = cma_size,
[937]	238	ptype = 'CMA', channels = nb_cmas )
[793]	239
[944]	240	fbf = mapping.addPeriph( 'FBF', base = fbf_base + offset, size = fbf_size,
[954]	241	ptype = 'FBF', arg0 = fbf_width, arg1 = fbf_width )
[793]	242
[944]	243	pic = mapping.addPeriph( 'PIC', base = pic_base + offset, size = pic_size,
[937]	244	ptype = 'PIC', channels = 32 )
[793]	245
[975]	246	mapping.addIrq( pic, index = 0, src = nic,
	247	isrtype = 'ISR_NIC_RX', channel = 0 )
	248	mapping.addIrq( pic, index = 1, src = nic,
	249	isrtype = 'ISR_NIC_RX', channel = 1 )
	250	mapping.addIrq( pic, index = 2, src = nic,
	251	isrtype = 'ISR_NIC_TX', channel = 0 )
	252	mapping.addIrq( pic, index = 3, src = nic,
	253	isrtype = 'ISR_NIC_TX', channel = 1 )
	254	mapping.addIrq( pic, index = 4, src = cma,
	255	isrtype = 'ISR_CMA', channel = 0 )
	256	mapping.addIrq( pic, index = 5, src = cma,
	257	isrtype = 'ISR_CMA', channel = 1 )
	258	mapping.addIrq( pic, index = 6, src = cma,
	259	isrtype = 'ISR_CMA', channel = 2 )
	260	mapping.addIrq( pic, index = 7, src = cma,
	261	isrtype = 'ISR_CMA', channel = 3 )
[793]	262
[975]	263	if ( ioc_type == 'BDV' ): isr_type = 'ISR_BDV'
	264	elif ( ioc_type == 'HBA' ): isr_type = 'ISR_HBA'
	265	elif ( ioc_type == 'SDC' ): isr_type = 'ISR_SDC'
[793]	266
[975]	267	if ( ioc_type != 'RDK' ):
	268	mapping.addIrq( pic, index = 8, src = ioc,
	269	isrtype = isr_type, channel = 0 )
[793]	270
[975]	271	mapping.addIrq( pic, index = 16, src = tty,
	272	isrtype = 'ISR_TTY_RX', channel = 0 )
	273	mapping.addIrq( pic, index = 17, src = tty,
	274	isrtype = 'ISR_TTY_RX', channel = 1 )
	275	mapping.addIrq( pic, index = 18, src = tty,
	276	isrtype = 'ISR_TTY_RX', channel = 2 )
	277	mapping.addIrq( pic, index = 19, src = tty,
	278	isrtype = 'ISR_TTY_RX', channel = 3 )
	279	mapping.addIrq( pic, index = 20, src = tty,
	280	isrtype = 'ISR_TTY_RX', channel = 4 )
	281	mapping.addIrq( pic, index = 21, src = tty,
	282	isrtype = 'ISR_TTY_RX', channel = 5 )
	283	mapping.addIrq( pic, index = 22, src = tty,
	284	isrtype = 'ISR_TTY_RX', channel = 6 )
	285	mapping.addIrq( pic, index = 23, src = tty,
	286	isrtype = 'ISR_TTY_RX', channel = 7 )
[937]	287
	288	###################################
	289	### boot & kernel vsegs mapping
	290	###################################
	291
	292	### global vsegs for preloader & boot_loader are mapped in cluster[0][0]
[820]	293	### => same flags CXW_ / identity mapping / non local / big page
[793]	294
[820]	295	mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size,
[819]	296	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	297	identity = True, local = False, big = True )
	298
[793]	299	mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size,
[819]	300	'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM',
	301	identity = True, local = False, big = True )
[793]	302
	303	mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size,
	304	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
[819]	305	identity = True, local = False, big = True )
[793]	306
	307	mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size,
[819]	308	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	309	identity = True, local = False, big = True )
[793]	310
	311	mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size,
[819]	312	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	313	identity = True, local = False, big = True )
[793]	314
[937]	315	### global vseg for RAM-DISK in cluster[0][0]
	316	### identity mapping / non local / big pages
[967]	317	if (ioc_type == 'RDK'):
[937]	318
	319	mapping.addGlobal( 'seg_ramdisk', ramdisk_vbase, ramdisk_size,
	320	'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	321	identity = True, local = True, big = True )
	322
[820]	323	### global vsegs kernel_code, kernel_init : local / big page
[937]	324	### replicated in all clusters containing processors
	325	### same content => same name / same vbase
[819]	326	for x in xrange( x_size ):
[937]	327	for y in xrange( y_size - 1 ):
	328
	329	mapping.addGlobal( 'seg_kernel_code',
	330	kernel_code_vbase, kernel_code_size,
[820]	331	'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
	332	binpath = 'build/kernel/kernel.elf',
[819]	333	local = True, big = True )
[793]	334
[937]	335	mapping.addGlobal( 'seg_kernel_init',
	336	kernel_init_vbase, kernel_init_size,
[820]	337	'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
[819]	338	binpath = 'build/kernel/kernel.elf',
	339	local = True, big = True )
[793]	340
[820]	341	### global vseg kernel_data: non local / big page
	342	### Only mapped in cluster[0][0]
[937]	343	mapping.addGlobal( 'seg_kernel_data',
	344	kernel_data_vbase, kernel_data_size,
	345	'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
	346	binpath = 'build/kernel/kernel.elf',
[825]	347	local = False, big = True )
[793]	348
[937]	349	### Global vsegs kernel_ptab_x_y: non local / big page
	350	### replicated in all clusters containing processors
	351	### different content => name & vbase indexed by (x,y)
[820]	352	for x in xrange( x_size ):
[937]	353	for y in xrange( y_size - 1 ):
	354	offset = ((x << y_width) + y) * kernel_ptab_size
[820]	355
[937]	356	mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y),
	357	kernel_ptab_vbase + offset, kernel_ptab_size,
[820]	358	'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM',
	359	local = False, big = True )
	360
[937]	361	### global vsegs kernel_heap_x_y : non local / big pages
	362	### distributed in all clusters containing processors
	363	### different content => name & vbase indexed by (x,y)
	364	for x in xrange( x_size ):
	365	for y in xrange( y_size - 1 ):
	366	offset = ((x << y_width) + y) * kernel_heap_size
[820]	367
[937]	368	mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y),
	369	kernel_heap_vbase + offset , kernel_heap_size,
	370	'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
	371	local = False, big = True )
	372
[820]	373	### global vsegs for external peripherals: non local / big page
[937]	374	### only mapped in cluster_io
[967]	375	mapping.addGlobal( 'seg_ioc', ioc_base, ioc_size,
	376	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'IOC',
[820]	377	local = False, big = True )
	378
[944]	379	mapping.addGlobal( 'seg_tty', tty_base, tty_size,
[937]	380	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'TTY',
[820]	381	local = False, big = True )
	382
[944]	383	mapping.addGlobal( 'seg_nic', nic_base, nic_size,
[937]	384	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'NIC',
	385	local = False, big = True )
	386
[944]	387	mapping.addGlobal( 'seg_cma', cma_base, cma_size,
[937]	388	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'CMA',
	389	local = False, big = True )
	390
[944]	391	mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size,
[937]	392	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'FBF',
	393	local = False, big = True )
	394
[944]	395	mapping.addGlobal( 'seg_pic', pic_base, pic_size,
[937]	396	'__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'PIC',
	397	local = False, big = True )
	398
[820]	399	### global vsegs for internal peripherals : non local / small pages
[937]	400	### allocated in all clusters containing processors
	401	### name and vbase indexed by (x,y)
[820]	402	for x in xrange( x_size ):
[937]	403	for y in xrange( y_size - 1 ):
[820]	404	offset = ((x << y_width) + y) * peri_increment
	405
[937]	406	mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y),
	407	xcu_base + offset, xcu_size,
[820]	408	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU',
	409	local = False, big = False )
	410
[937]	411	mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y),
	412	mmc_base + offset, mmc_size,
[820]	413	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC',
	414	local = False, big = False )
	415
[939]	416	### global vsegs kernel_sched : non local / small pages
	417	### allocated in all clusters containing processors
	418	### different content => name & vbase indexed by (x,y)
	419	for x in xrange( x_size ):
	420	for y in xrange( y_size - 1 ):
	421	offset = ((x << y_width) + y) * kernel_ptab_size
	422
	423	mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y),
	424	kernel_sched_vbase + offset , kernel_sched_size,
	425	'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM',
	426	local = False, big = False )
	427
[793]	428	return mapping
	429
[937]	430	########################## platform test #############################################
[793]	431
	432	if __name__ == '__main__':
	433
	434	mapping = arch( x_size = 2,
	435	y_size = 2,
	436	nb_procs = 2 )
	437
	438	# print mapping.netbsd_dts()
	439
	440	print mapping.xml()
	441
	442	# print mapping.giet_vsegs()
	443
	444
	445	# Local Variables:
	446	# tab-width: 4;
	447	# c-basic-offset: 4;
	448	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	449	# indent-tabs-mode: nil;
	450	# End:
	451	#
	452	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	453

Note: See TracBrowser for help on using the repository browser.

Download in other formats:

Project-Id-Version: Trac 0.12
Report-Msgid-Bugs-To: trac-dev@googlegroups.com
POT-Creation-Date: 2018-07-07 16:55+0000
PO-Revision-Date: 2010-07-19 23:05+0200
Last-Translator: Jeroen Ruigrok van der Werven <asmodai@in-nomine.org>
Language: en_US
Language-Team: en_US <trac-dev@googlegroups.com>
Plural-Forms: nplurals=2; plural=(n != 1)
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
Generated-By: Babel 2.8.0