[621] | 1 | ///////////////////////////////////////////////////////////////////////// |
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[967] | 2 | // File: top.cpp (for tsar_generic_leti platform) |
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[792] | 3 | // Author: Alain Greiner |
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[621] | 4 | // Copyright: UPMC/LIP6 |
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[937] | 5 | // Date : february 2013 / updated january 2015 |
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[621] | 6 | // This program is released under the GNU public license |
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| 7 | ///////////////////////////////////////////////////////////////////////// |
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[681] | 8 | // This file define a generic TSAR architecture, fully compatible |
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| 9 | // with the VLSI Hardware prototype developped by CEA-LETI and LIP6 |
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| 10 | // in the framework of the SHARP project. |
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[792] | 11 | // |
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[621] | 12 | // The processor is a MIPS32 processor wrapped in a GDB server |
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[967] | 13 | // (this is defined in the tsar_leti_cluster). |
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[792] | 14 | // |
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[937] | 15 | // The main hardware parameters are the mesh size (X_SIZE & Y_SIZE), |
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| 16 | // and the number of processors per cluster (NB_PROCS_MAX). |
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| 17 | // The NB_PROCS_MAX parameter cannot be larger than 4. |
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[967] | 18 | // Others parameters are the frame buffer size, the disk controller type |
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| 19 | // (BDV or HBA), the number of TTY channels, the number of NIC channels, |
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| 20 | // and the number of CMA channels. |
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[621] | 21 | // |
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[937] | 22 | // All external peripherals are located in cluster[X_SIZE-1][Y_SIZE-1], |
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| 23 | // and are connected to an IO bus (implemented as a vci_local_crossbar): |
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[967] | 24 | // - DISK : block device controller (BDV / HBA) |
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| 25 | // - MNIC : multi-channel ethernet controller |
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| 26 | // - CDMA : multi-channel chained buffer dma controller |
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| 27 | // - MTTY : multi-channel tty controller |
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| 28 | // - FBUF : frame buffer controller |
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| 29 | // - IOPI : HWI to SWI translator |
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| 30 | // |
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[937] | 31 | // This IO bus is directly connected to the north ports of the CMD/RSP |
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| 32 | // routers in cluster[X_SIZE-1][y_SIZE-2] through VCI/DSPIN wrappers. |
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| 33 | // All other clusters in the upper row are empty: no processors, |
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| 34 | // no ram, no routers. |
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| 35 | // The X_SIZE parameter must be larger than 0, but no larger than 16. |
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| 36 | // The Y_SIZE parameter must be larger than 1, but no larger than 16. |
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| 37 | // |
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| 38 | // We don't use an external ROM, as the boot code is (pre)loaded |
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| 39 | // in RAM in cluster[0][0] at address 0x0. |
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| 40 | // |
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| 41 | // An optional RAMDISK of 32 Mbytes can be used in RAM of cluster[0][0]. |
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| 42 | // |
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[621] | 43 | // The physical address space is 40 bits. |
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| 44 | // The 8 address MSB bits define the cluster index. |
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| 45 | // |
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[937] | 46 | // Besides the processors, each cluster contains: |
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| 47 | // - 5 L1/L2 DSPIN routers implementing 5 separated NOCs |
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[628] | 48 | // - 1 vci_mem_cache |
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| 49 | // - 1 vci_xicu |
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[937] | 50 | // - 1 vci_simple_ram (to emulate the L3 cache). |
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[621] | 51 | // |
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[681] | 52 | // Each processor receives 4 consecutive IRQ lines from the local XICU. |
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[967] | 53 | // The number of PTI and WTI IRQs is bounded to 16. |
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[664] | 54 | // |
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[628] | 55 | // In all clusters, the MEMC IRQ line (signaling a late write error) |
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| 56 | // is connected to XICU HWI[8] |
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[621] | 57 | // |
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[628] | 58 | // For all external peripherals, the hardware interrupts (HWI) are |
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[664] | 59 | // translated to write interrupts (WTI) by the iopic component: |
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| 60 | // - IOPIC HWI[1:0] connected to IRQ_NIC_RX[1:0] |
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[792] | 61 | // - IOPIC HWI[3:2] connected to IRQ_NIC_TX[1:0] |
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[664] | 62 | // - IOPIC HWI[7:4] connected to IRQ_CMA_TX[3:0]] |
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[967] | 63 | // - IOPIC HWI[8] connected to IRQ_DISK |
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[664] | 64 | // - IOPIC HWI[15:9] unused (grounded) |
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| 65 | // - IOPIC HWI[23:16] connected to IRQ_TTY_RX[7:0]] |
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| 66 | // - IOPIC HWI[31:24] connected to IRQ_TTY_TX[7:0]] |
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[937] | 67 | // |
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| 68 | // The cluster internal architecture is defined in file tsar_leti_cluster, |
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| 69 | // that must be considered as an extension of this top.cpp file. |
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[628] | 70 | //////////////////////////////////////////////////////////////////////////// |
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| 71 | // The following parameters must be defined in the hard_config.h file : |
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[621] | 72 | // - X_WIDTH : number of bits for x coordinate (must be 4) |
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| 73 | // - Y_WIDTH : number of bits for y coordinate (must be 4) |
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[967] | 74 | // - P_WIDTH : number of bits for local processor coordinate |
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[681] | 75 | // - X_SIZE : number of clusters in a row (1,2,4,8,16) |
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| 76 | // - Y_SIZE : number of clusters in a column (1,2,4,8) |
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[628] | 77 | // - NB_PROCS_MAX : number of processors per cluster (1, 2 or 4) |
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[664] | 78 | // - NB_CMA_CHANNELS : number of CMA channels in I/0 cluster (4 max) |
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| 79 | // - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (8 max) |
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[628] | 80 | // - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (2 max) |
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[937] | 81 | // - FBUF_X_SIZE : number of pixels per line for frame buffer |
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| 82 | // - FBUF_Y_SIZE : number of lines for frame buffer |
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[967] | 83 | // - XCU_NB_HWI : number of XCU HWIs (must be 16) |
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| 84 | // - XCU_NB_PTI : number of XCU PTIs (must be 16) |
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| 85 | // - XCU_NB_WTI : number of XCU WTIs (must be 16) |
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| 86 | // - XCU_NB_OUT : number of XCU output (must be 16) |
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| 87 | // - USE_IOC_XYZ : IOC type (XYZ in HBA / BDV / SDC / RDK) |
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[792] | 88 | // |
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[621] | 89 | // Some other hardware parameters are not used when compiling the OS, |
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[628] | 90 | // and are only defined in this top.cpp file: |
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[792] | 91 | // - XRAM_LATENCY : external ram latency |
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[628] | 92 | // - L1_IWAYS : L1 cache instruction number of ways |
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| 93 | // - L1_ISETS : L1 cache instruction number of sets |
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| 94 | // - L1_DWAYS : L1 cache data number of ways |
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| 95 | // - L1_DSETS : L1 cache data number of sets |
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[967] | 96 | // - DISK_IMAGE_NAME : pathname for block device disk image |
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[621] | 97 | ///////////////////////////////////////////////////////////////////////// |
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| 98 | // General policy for 40 bits physical address decoding: |
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| 99 | // All physical segments base addresses are multiple of 1 Mbytes |
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[792] | 100 | // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) |
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[621] | 101 | // The (X_WIDTH + Y_WIDTH) MSB bits (left aligned) define |
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| 102 | // the cluster index, and the LADR bits define the local index: |
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| 103 | // |X_ID|Y_ID| LADR | OFFSET | |
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| 104 | // | 4 | 4 | 8 | 24 | |
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| 105 | ///////////////////////////////////////////////////////////////////////// |
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| 106 | // General policy for 14 bits SRCID decoding: |
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| 107 | // Each component is identified by (x_id, y_id, l_id) tuple. |
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| 108 | // |X_ID|Y_ID| L_ID | |
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| 109 | // | 4 | 4 | 6 | |
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| 110 | ///////////////////////////////////////////////////////////////////////// |
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| 111 | |
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| 112 | #include <systemc> |
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| 113 | #include <sys/time.h> |
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| 114 | #include <iostream> |
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| 115 | #include <sstream> |
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| 116 | #include <cstdlib> |
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| 117 | #include <cstdarg> |
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| 118 | #include <stdint.h> |
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| 119 | |
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| 120 | #include "gdbserver.h" |
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| 121 | #include "mapping_table.h" |
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[967] | 122 | |
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[621] | 123 | #include "tsar_leti_cluster.h" |
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[628] | 124 | #include "vci_local_crossbar.h" |
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| 125 | #include "vci_dspin_initiator_wrapper.h" |
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| 126 | #include "vci_dspin_target_wrapper.h" |
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| 127 | #include "vci_multi_tty.h" |
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| 128 | #include "vci_multi_nic.h" |
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| 129 | #include "vci_chbuf_dma.h" |
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| 130 | #include "vci_block_device_tsar.h" |
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[967] | 131 | #include "vci_multi_ahci.h" |
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[628] | 132 | #include "vci_framebuffer.h" |
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| 133 | #include "vci_iopic.h" |
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[967] | 134 | |
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[621] | 135 | #include "alloc_elems.h" |
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| 136 | |
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[967] | 137 | /////////////////////////////////////////////////// |
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| 138 | // Main hardware parameters values |
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| 139 | /////////////////////////////////////////////////// |
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| 140 | |
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[792] | 141 | #include "hard_config.h" |
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[621] | 142 | |
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[967] | 143 | /////////////////////////////////////////////////////////////////////////////////////// |
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| 144 | // Secondary Hardware Parameters |
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| 145 | /////////////////////////////////////////////////////////////////////////////////////// |
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| 146 | |
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| 147 | #define XMAX X_SIZE // actual number of columns in 2D mesh |
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| 148 | #define YMAX (Y_SIZE - 1) // actual number of rows in 2D mesh |
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| 149 | |
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| 150 | #define XRAM_LATENCY 0 |
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| 151 | |
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| 152 | #define MEMC_WAYS 16 |
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| 153 | #define MEMC_SETS 256 |
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| 154 | |
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| 155 | #define L1_IWAYS 4 |
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| 156 | #define L1_ISETS 64 |
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| 157 | |
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| 158 | #define L1_DWAYS 4 |
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| 159 | #define L1_DSETS 64 |
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| 160 | |
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| 161 | #define DISK_IMAGE_NAME "../../../giet_vm/hdd/virt_hdd.dmg" |
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| 162 | |
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| 163 | #define ROM_SOFT_NAME "../../softs/tsar_boot/preloader.elf" |
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| 164 | |
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| 165 | #define NORTH 0 |
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| 166 | #define SOUTH 1 |
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| 167 | #define EAST 2 |
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| 168 | #define WEST 3 |
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| 169 | |
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[621] | 170 | /////////////////////////////////////////////////// |
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| 171 | // Parallelisation |
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| 172 | /////////////////////////////////////////////////// |
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[967] | 173 | |
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[708] | 174 | #define USE_OPENMP _OPENMP |
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[621] | 175 | |
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| 176 | #if USE_OPENMP |
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| 177 | #include <omp.h> |
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| 178 | #endif |
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| 179 | |
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| 180 | /////////////////////////////////////////////////// |
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| 181 | // cluster index (from x,y coordinates) |
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| 182 | /////////////////////////////////////////////////// |
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| 183 | |
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[692] | 184 | #define cluster(x,y) ((y) + ((x) << Y_WIDTH)) |
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[621] | 185 | |
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| 186 | /////////////////////////////////////////////////////////// |
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[792] | 187 | // DSPIN parameters |
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[621] | 188 | /////////////////////////////////////////////////////////// |
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| 189 | |
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| 190 | #define dspin_cmd_width 39 |
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| 191 | #define dspin_rsp_width 32 |
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| 192 | |
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| 193 | /////////////////////////////////////////////////////////// |
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[792] | 194 | // VCI parameters |
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[621] | 195 | /////////////////////////////////////////////////////////// |
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| 196 | |
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| 197 | #define vci_cell_width_int 4 |
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| 198 | #define vci_cell_width_ext 8 |
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| 199 | #define vci_address_width 40 |
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| 200 | #define vci_plen_width 8 |
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| 201 | #define vci_rerror_width 1 |
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| 202 | #define vci_clen_width 1 |
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| 203 | #define vci_rflag_width 1 |
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| 204 | #define vci_srcid_width 14 |
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| 205 | #define vci_pktid_width 4 |
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| 206 | #define vci_trdid_width 4 |
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| 207 | #define vci_wrplen_width 1 |
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| 208 | |
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| 209 | |
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| 210 | |
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[664] | 211 | /////////////////////////////////////////////////////////////////////////////////////// |
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[792] | 212 | // DEBUG Parameters default values |
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[664] | 213 | /////////////////////////////////////////////////////////////////////////////////////// |
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[621] | 214 | |
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[681] | 215 | #define MAX_FROZEN_CYCLES 500000 |
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[621] | 216 | |
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[664] | 217 | /////////////////////////////////////////////////////////////////////////////////////// |
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[792] | 218 | // LOCAL TGTID & SRCID definition |
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[621] | 219 | // For all components: global TGTID = global SRCID = cluster_index |
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[664] | 220 | /////////////////////////////////////////////////////////////////////////////////////// |
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[621] | 221 | |
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[664] | 222 | #define MEMC_TGTID 0 |
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| 223 | #define XICU_TGTID 1 |
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| 224 | #define MTTY_TGTID 2 |
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[967] | 225 | #define DISK_TGTID 3 |
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[664] | 226 | #define FBUF_TGTID 4 |
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| 227 | #define MNIC_TGTID 5 |
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| 228 | #define CDMA_TGTID 6 |
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| 229 | #define IOPI_TGTID 7 |
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[621] | 230 | |
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[967] | 231 | #define DISK_SRCID NB_PROCS_MAX |
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[664] | 232 | #define CDMA_SRCID NB_PROCS_MAX + 1 |
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| 233 | #define IOPI_SRCID NB_PROCS_MAX + 2 |
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[628] | 234 | |
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[621] | 235 | bool stop_called = false; |
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| 236 | |
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| 237 | ///////////////////////////////// |
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| 238 | int _main(int argc, char *argv[]) |
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| 239 | { |
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| 240 | using namespace sc_core; |
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| 241 | using namespace soclib::caba; |
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| 242 | using namespace soclib::common; |
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| 243 | |
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[937] | 244 | uint32_t ncycles = 0xFFFFFFFF; // max simulated cycles |
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| 245 | size_t threads = 1; // simulator's threads number |
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| 246 | bool trace_ok = false; // trace activated |
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| 247 | uint32_t trace_from = 0; // trace start cycle |
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| 248 | bool trace_proc_ok = false; // detailed proc trace activated |
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| 249 | size_t trace_memc_ok = false; // detailed memc trace activated |
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| 250 | size_t trace_memc_id = 0; // index of memc to be traced |
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| 251 | size_t trace_proc_id = 0; // index of proc to be traced |
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| 252 | char soft_name[256] = ROM_SOFT_NAME; // pathname for ROM binary code |
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[967] | 253 | char disk_name[256] = DISK_IMAGE_NAME; // pathname for DISK image |
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[937] | 254 | uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // for debug |
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[621] | 255 | struct timeval t1,t2; |
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| 256 | uint64_t ms1,ms2; |
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| 257 | |
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| 258 | ////////////// command line arguments ////////////////////// |
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| 259 | if (argc > 1) |
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| 260 | { |
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| 261 | for (int n = 1; n < argc; n = n + 2) |
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| 262 | { |
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| 263 | if ((strcmp(argv[n], "-NCYCLES") == 0) && (n + 1 < argc)) |
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| 264 | { |
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| 265 | ncycles = (uint64_t) strtol(argv[n + 1], NULL, 0); |
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| 266 | } |
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| 267 | else if ((strcmp(argv[n],"-DEBUG") == 0) && (n + 1 < argc)) |
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| 268 | { |
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| 269 | trace_ok = true; |
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| 270 | trace_from = (uint32_t) strtol(argv[n + 1], NULL, 0); |
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| 271 | } |
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| 272 | else if ((strcmp(argv[n], "-MEMCID") == 0) && (n + 1 < argc)) |
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| 273 | { |
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| 274 | trace_memc_ok = true; |
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| 275 | trace_memc_id = (size_t) strtol(argv[n + 1], NULL, 0); |
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| 276 | size_t x = trace_memc_id >> Y_WIDTH; |
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| 277 | size_t y = trace_memc_id & ((1<<Y_WIDTH)-1); |
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| 278 | |
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[937] | 279 | assert( (x < XMAX) and (y < (YMAX)) and |
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[967] | 280 | "MEMCID parameter doesxn't fit valid XMAX/YMAX"); |
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[621] | 281 | } |
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| 282 | else if ((strcmp(argv[n], "-PROCID") == 0) && (n + 1 < argc)) |
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| 283 | { |
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| 284 | trace_proc_ok = true; |
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| 285 | trace_proc_id = (size_t) strtol(argv[n + 1], NULL, 0); |
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[803] | 286 | size_t cluster_xy = trace_proc_id >> P_WIDTH ; |
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[621] | 287 | size_t x = cluster_xy >> Y_WIDTH; |
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| 288 | size_t y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[803] | 289 | size_t l = trace_proc_id & ((1<<P_WIDTH)-1) ; |
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[621] | 290 | |
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[937] | 291 | assert( (x < XMAX) and (y < YMAX) and (l < NB_PROCS_MAX) and |
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[621] | 292 | "PROCID parameter refers a not valid processor"); |
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| 293 | } |
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| 294 | else if ((strcmp(argv[n], "-THREADS") == 0) && ((n + 1) < argc)) |
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| 295 | { |
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[628] | 296 | threads = (size_t) strtol(argv[n + 1], NULL, 0); |
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| 297 | threads = (threads < 1) ? 1 : threads; |
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[621] | 298 | } |
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| 299 | else if ((strcmp(argv[n], "-FROZEN") == 0) && (n + 1 < argc)) |
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| 300 | { |
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| 301 | frozen_cycles = (uint32_t) strtol(argv[n + 1], NULL, 0); |
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| 302 | } |
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| 303 | else |
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| 304 | { |
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| 305 | std::cout << " Arguments are (key,value) couples." << std::endl; |
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| 306 | std::cout << " The order is not important." << std::endl; |
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| 307 | std::cout << " Accepted arguments are :" << std::endl << std::endl; |
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[937] | 308 | std::cout << " - NCYCLES number_of_simulated_cycles" << std::endl; |
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| 309 | std::cout << " - DEBUG debug_start_cycle" << std::endl; |
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| 310 | std::cout << " - THREADS simulator's threads number" << std::endl; |
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| 311 | std::cout << " - FROZEN max_number_of_lines" << std::endl; |
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| 312 | std::cout << " - MEMCID index_memc_to_be_traced" << std::endl; |
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| 313 | std::cout << " - PROCID index_proc_to_be_traced" << std::endl; |
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[621] | 314 | exit(0); |
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| 315 | } |
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| 316 | } |
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| 317 | } |
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| 318 | |
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| 319 | // checking hardware parameters |
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[937] | 320 | assert( ((X_SIZE <= 16) and (X_SIZE > 0)) and |
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[681] | 321 | "Illegal X_SIZE parameter" ); |
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[621] | 322 | |
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[937] | 323 | assert( ((Y_SIZE <= 16) and (Y_SIZE > 1)) and |
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[681] | 324 | "Illegal Y_SIZE parameter" ); |
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[621] | 325 | |
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[803] | 326 | assert( (P_WIDTH <= 2) and |
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| 327 | "P_WIDTH parameter cannot be larger than 2" ); |
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| 328 | |
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[664] | 329 | assert( (NB_PROCS_MAX <= 4) and |
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[681] | 330 | "Illegal NB_PROCS_MAX parameter" ); |
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[621] | 331 | |
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[967] | 332 | assert( (XCU_NB_HWI == 16) and |
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| 333 | "XCU_NB_HWI must be 16" ); |
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| 334 | |
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| 335 | assert( (XCU_NB_PTI == 16) and |
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| 336 | "XCU_NB_PTI must be 16" ); |
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| 337 | |
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| 338 | assert( (XCU_NB_WTI == 16) and |
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| 339 | "XCU_NB_WTI must be 16" ); |
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| 340 | |
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| 341 | assert( (XCU_NB_OUT == 16) and |
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| 342 | "XCU_NB_OUT must be 16" ); |
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| 343 | |
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[937] | 344 | assert( (NB_CMA_CHANNELS <= 4) and |
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[628] | 345 | "The NB_CMA_CHANNELS parameter cannot be larger than 4" ); |
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[621] | 346 | |
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[937] | 347 | assert( (NB_TTY_CHANNELS <= 8) and |
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[967] | 348 | "The NB_TTY_CHANNELS parameter cannot be larger than 8" ); |
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[621] | 349 | |
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[937] | 350 | assert( (NB_NIC_CHANNELS <= 2) and |
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[628] | 351 | "The NB_NIC_CHANNELS parameter cannot be larger than 2" ); |
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[621] | 352 | |
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| 353 | assert( (vci_address_width == 40) and |
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| 354 | "VCI address width with the GIET must be 40 bits" ); |
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| 355 | |
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| 356 | assert( (X_WIDTH == 4) and (Y_WIDTH == 4) and |
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[937] | 357 | "You must have X_WIDTH == Y_WIDTH == 4"); |
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[792] | 358 | |
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[621] | 359 | std::cout << std::endl; |
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| 360 | |
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[967] | 361 | std::cout << " - XMAX = " << XMAX << std::endl |
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| 362 | << " - YMAX = " << YMAX << std::endl |
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| 363 | << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl |
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| 364 | << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl |
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| 365 | << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl |
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| 366 | << " - NB_CMA_CHANNELS = " << NB_CMA_CHANNELS << std::endl |
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| 367 | << " - MEMC_WAYS = " << MEMC_WAYS << std::endl |
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| 368 | << " - MEMC_SETS = " << MEMC_SETS << std::endl |
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| 369 | << " - RAM_LATENCY = " << XRAM_LATENCY << std::endl |
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| 370 | << " - MAX_FROZEN = " << frozen_cycles << std::endl |
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| 371 | << " - MAX_CYCLES = " << ncycles << std::endl |
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| 372 | << " - RESET_ADDRESS = " << RESET_ADDRESS << std::endl |
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| 373 | << " - SOFT_FILENAME = " << soft_name << std::endl |
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| 374 | << " - DISK_IMAGENAME = " << disk_name << std::endl |
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| 375 | << " - OPENMP THREADS = " << threads << std::endl |
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| 376 | << " - DEBUG_PROCID = " << trace_proc_id << std::endl |
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| 377 | << " - DEBUG_MEMCID = " << trace_memc_id << std::endl; |
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[621] | 378 | |
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| 379 | std::cout << std::endl; |
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| 380 | |
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| 381 | // Internal and External VCI parameters definition |
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| 382 | typedef soclib::caba::VciParams<vci_cell_width_int, |
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| 383 | vci_plen_width, |
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| 384 | vci_address_width, |
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| 385 | vci_rerror_width, |
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| 386 | vci_clen_width, |
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| 387 | vci_rflag_width, |
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| 388 | vci_srcid_width, |
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| 389 | vci_pktid_width, |
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| 390 | vci_trdid_width, |
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| 391 | vci_wrplen_width> vci_param_int; |
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| 392 | |
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| 393 | typedef soclib::caba::VciParams<vci_cell_width_ext, |
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| 394 | vci_plen_width, |
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| 395 | vci_address_width, |
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| 396 | vci_rerror_width, |
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| 397 | vci_clen_width, |
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| 398 | vci_rflag_width, |
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| 399 | vci_srcid_width, |
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| 400 | vci_pktid_width, |
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| 401 | vci_trdid_width, |
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| 402 | vci_wrplen_width> vci_param_ext; |
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| 403 | |
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| 404 | #if USE_OPENMP |
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| 405 | omp_set_dynamic(false); |
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[628] | 406 | omp_set_num_threads(threads); |
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[621] | 407 | std::cerr << "Built with openmp version " << _OPENMP << std::endl; |
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| 408 | #endif |
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| 409 | |
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| 410 | |
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[628] | 411 | /////////////////////////////////////// |
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| 412 | // Direct Network Mapping Table |
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| 413 | /////////////////////////////////////// |
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[621] | 414 | |
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[792] | 415 | MappingTable maptabd(vci_address_width, |
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| 416 | IntTab(X_WIDTH + Y_WIDTH, 16 - X_WIDTH - Y_WIDTH), |
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| 417 | IntTab(X_WIDTH + Y_WIDTH, vci_srcid_width - X_WIDTH - Y_WIDTH), |
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[628] | 418 | 0x00FF000000ULL); |
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[621] | 419 | |
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[628] | 420 | // replicated segments |
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[937] | 421 | for (size_t x = 0; x < XMAX; x++) |
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[621] | 422 | { |
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[937] | 423 | for (size_t y = 0; y < (YMAX) ; y++) |
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[621] | 424 | { |
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| 425 | sc_uint<vci_address_width> offset; |
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[628] | 426 | offset = ((sc_uint<vci_address_width>)cluster(x,y)) << 32; |
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[621] | 427 | |
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| 428 | std::ostringstream si; |
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| 429 | si << "seg_xicu_" << x << "_" << y; |
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[792] | 430 | maptabd.add(Segment(si.str(), SEG_XCU_BASE + offset, SEG_XCU_SIZE, |
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[621] | 431 | IntTab(cluster(x,y),XICU_TGTID), false)); |
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| 432 | |
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| 433 | std::ostringstream sd; |
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[628] | 434 | sd << "seg_mcfg_" << x << "_" << y; |
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[792] | 435 | maptabd.add(Segment(sd.str(), SEG_MMC_BASE + offset, SEG_MMC_SIZE, |
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[628] | 436 | IntTab(cluster(x,y),MEMC_TGTID), false)); |
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[621] | 437 | |
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| 438 | std::ostringstream sh; |
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| 439 | sh << "seg_memc_" << x << "_" << y; |
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[792] | 440 | maptabd.add(Segment(sh.str(), SEG_RAM_BASE + offset, SEG_RAM_SIZE, |
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[621] | 441 | IntTab(cluster(x,y),MEMC_TGTID), true)); |
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| 442 | } |
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| 443 | } |
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[628] | 444 | |
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[664] | 445 | // segments for peripherals in cluster(0,0) |
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[792] | 446 | maptabd.add(Segment("seg_tty0", SEG_TTY_BASE, SEG_TTY_SIZE, |
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[628] | 447 | IntTab(cluster(0,0),MTTY_TGTID), false)); |
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| 448 | |
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[792] | 449 | maptabd.add(Segment("seg_ioc0", SEG_IOC_BASE, SEG_IOC_SIZE, |
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[967] | 450 | IntTab(cluster(0,0),DISK_TGTID), false)); |
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[628] | 451 | |
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[937] | 452 | // segments for peripherals in cluster_io (XMAX-1,YMAX) |
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[628] | 453 | sc_uint<vci_address_width> offset; |
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[937] | 454 | offset = ((sc_uint<vci_address_width>)cluster(XMAX-1,YMAX)) << 32; |
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[628] | 455 | |
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[792] | 456 | maptabd.add(Segment("seg_mtty", SEG_TTY_BASE + offset, SEG_TTY_SIZE, |
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[937] | 457 | IntTab(cluster(XMAX-1, YMAX),MTTY_TGTID), false)); |
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[628] | 458 | |
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[792] | 459 | maptabd.add(Segment("seg_fbuf", SEG_FBF_BASE + offset, SEG_FBF_SIZE, |
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[937] | 460 | IntTab(cluster(XMAX-1, YMAX),FBUF_TGTID), false)); |
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[628] | 461 | |
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[967] | 462 | maptabd.add(Segment("seg_disk", SEG_IOC_BASE + offset, SEG_IOC_SIZE, |
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| 463 | IntTab(cluster(XMAX-1, YMAX),DISK_TGTID), false)); |
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[628] | 464 | |
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[792] | 465 | maptabd.add(Segment("seg_mnic", SEG_NIC_BASE + offset, SEG_NIC_SIZE, |
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[937] | 466 | IntTab(cluster(XMAX-1, YMAX),MNIC_TGTID), false)); |
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[628] | 467 | |
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[792] | 468 | maptabd.add(Segment("seg_cdma", SEG_CMA_BASE + offset, SEG_CMA_SIZE, |
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[937] | 469 | IntTab(cluster(XMAX-1, YMAX),CDMA_TGTID), false)); |
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[628] | 470 | |
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[792] | 471 | maptabd.add(Segment("seg_iopi", SEG_PIC_BASE + offset, SEG_PIC_SIZE, |
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[937] | 472 | IntTab(cluster(XMAX-1, YMAX),IOPI_TGTID), false)); |
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[628] | 473 | |
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[621] | 474 | std::cout << maptabd << std::endl; |
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| 475 | |
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[628] | 476 | ///////////////////////////////////////////////// |
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| 477 | // Ram network mapping table |
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| 478 | ///////////////////////////////////////////////// |
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[621] | 479 | |
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[792] | 480 | MappingTable maptabx(vci_address_width, |
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| 481 | IntTab(X_WIDTH+Y_WIDTH), |
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| 482 | IntTab(X_WIDTH+Y_WIDTH), |
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[628] | 483 | 0x00FF000000ULL); |
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[621] | 484 | |
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[937] | 485 | for (size_t x = 0; x < XMAX; x++) |
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[628] | 486 | { |
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[937] | 487 | for (size_t y = 0; y < (YMAX) ; y++) |
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[792] | 488 | { |
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[628] | 489 | sc_uint<vci_address_width> offset; |
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[792] | 490 | offset = (sc_uint<vci_address_width>)cluster(x,y) |
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[628] | 491 | << (vci_address_width-X_WIDTH-Y_WIDTH); |
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[621] | 492 | |
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[628] | 493 | std::ostringstream sh; |
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| 494 | sh << "x_seg_memc_" << x << "_" << y; |
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[621] | 495 | |
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[792] | 496 | maptabx.add(Segment(sh.str(), SEG_RAM_BASE + offset, |
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| 497 | SEG_RAM_SIZE, IntTab(cluster(x,y)), false)); |
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[628] | 498 | } |
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| 499 | } |
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| 500 | std::cout << maptabx << std::endl; |
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[621] | 501 | |
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[628] | 502 | //////////////////// |
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| 503 | // Signals |
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| 504 | /////////////////// |
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[621] | 505 | |
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[628] | 506 | sc_clock signal_clk("clk"); |
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| 507 | sc_signal<bool> signal_resetn("resetn"); |
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[621] | 508 | |
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[628] | 509 | // IRQs from external peripherals |
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[967] | 510 | sc_signal<bool> signal_irq_disk; |
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[628] | 511 | sc_signal<bool> signal_irq_mnic_rx[NB_NIC_CHANNELS]; |
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| 512 | sc_signal<bool> signal_irq_mnic_tx[NB_NIC_CHANNELS]; |
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[664] | 513 | sc_signal<bool> signal_irq_mtty_rx[NB_TTY_CHANNELS]; |
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[628] | 514 | sc_signal<bool> signal_irq_cdma[NB_CMA_CHANNELS]; |
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| 515 | sc_signal<bool> signal_irq_false; |
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| 516 | |
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[621] | 517 | // Horizontal inter-clusters DSPIN signals |
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[628] | 518 | DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_inc = |
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[937] | 519 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", XMAX-1, YMAX); |
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[628] | 520 | DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_dec = |
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[937] | 521 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", XMAX-1, YMAX); |
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[621] | 522 | |
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[628] | 523 | DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_inc = |
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[937] | 524 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", XMAX-1, YMAX); |
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[628] | 525 | DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_dec = |
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[937] | 526 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", XMAX-1, YMAX); |
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[628] | 527 | |
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| 528 | DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_inc = |
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[937] | 529 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_inc", XMAX-1, YMAX); |
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[628] | 530 | DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_dec = |
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[937] | 531 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_dec", XMAX-1, YMAX); |
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[628] | 532 | |
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| 533 | DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_inc = |
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[937] | 534 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_inc", XMAX-1, YMAX); |
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[628] | 535 | DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_dec = |
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[937] | 536 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_dec", XMAX-1, YMAX); |
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[628] | 537 | |
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| 538 | DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_inc = |
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[937] | 539 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_inc", XMAX-1, YMAX); |
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[628] | 540 | DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_dec = |
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[937] | 541 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_dec", XMAX-1, YMAX); |
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[628] | 542 | |
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[621] | 543 | // Vertical inter-clusters DSPIN signals |
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[628] | 544 | DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_inc = |
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[937] | 545 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", XMAX, YMAX-1); |
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[628] | 546 | DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_dec = |
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[937] | 547 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", XMAX, YMAX-1); |
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[621] | 548 | |
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[628] | 549 | DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_inc = |
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[937] | 550 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", XMAX, YMAX-1); |
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[628] | 551 | DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_dec = |
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[937] | 552 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", XMAX, YMAX-1); |
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[621] | 553 | |
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[628] | 554 | DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_inc = |
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[937] | 555 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_inc", XMAX, YMAX-1); |
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[628] | 556 | DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_dec = |
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[937] | 557 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_dec", XMAX, YMAX-1); |
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[621] | 558 | |
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[628] | 559 | DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_inc = |
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[937] | 560 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_inc", XMAX, YMAX-1); |
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[628] | 561 | DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_dec = |
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[937] | 562 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_dec", XMAX, YMAX-1); |
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[628] | 563 | |
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| 564 | DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_inc = |
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[937] | 565 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_inc", XMAX, YMAX-1); |
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[628] | 566 | DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_dec = |
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[937] | 567 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_dec", XMAX, YMAX-1); |
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[628] | 568 | |
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| 569 | // Mesh boundaries DSPIN signals (Most of those signals are not used...) |
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| 570 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_in = |
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[937] | 571 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_in" , XMAX, YMAX, 4); |
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[628] | 572 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_out = |
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[937] | 573 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_out", XMAX, YMAX, 4); |
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[628] | 574 | |
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| 575 | DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_in = |
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[937] | 576 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_in" , XMAX, YMAX, 4); |
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[628] | 577 | DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_out = |
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[937] | 578 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_out", XMAX, YMAX, 4); |
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[628] | 579 | |
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| 580 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_in = |
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[937] | 581 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_in" , XMAX, YMAX, 4); |
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[628] | 582 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_out = |
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[937] | 583 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_out", XMAX, YMAX, 4); |
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[628] | 584 | |
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| 585 | DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_in = |
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[937] | 586 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_in" , XMAX, YMAX, 4); |
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[628] | 587 | DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_out = |
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[937] | 588 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_out", XMAX, YMAX, 4); |
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[628] | 589 | |
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| 590 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_in = |
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[937] | 591 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_in" , XMAX, YMAX, 4); |
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[628] | 592 | DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_out = |
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[937] | 593 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_out", XMAX, YMAX, 4); |
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[628] | 594 | |
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| 595 | // VCI signals for iobus and peripherals |
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[967] | 596 | VciSignals<vci_param_int> signal_vci_ini_disk("signal_vci_ini_disk"); |
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[628] | 597 | VciSignals<vci_param_int> signal_vci_ini_cdma("signal_vci_ini_cdma"); |
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| 598 | VciSignals<vci_param_int> signal_vci_ini_iopi("signal_vci_ini_iopi"); |
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| 599 | |
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[792] | 600 | VciSignals<vci_param_int>* signal_vci_ini_proc = |
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[628] | 601 | alloc_elems<VciSignals<vci_param_int> >("signal_vci_ini_proc", NB_PROCS_MAX ); |
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| 602 | |
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| 603 | VciSignals<vci_param_int> signal_vci_tgt_memc("signal_vci_tgt_memc"); |
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| 604 | VciSignals<vci_param_int> signal_vci_tgt_xicu("signal_vci_tgt_xicu"); |
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[967] | 605 | VciSignals<vci_param_int> signal_vci_tgt_disk("signal_vci_tgt_disk"); |
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[628] | 606 | VciSignals<vci_param_int> signal_vci_tgt_mtty("signal_vci_tgt_mtty"); |
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| 607 | VciSignals<vci_param_int> signal_vci_tgt_fbuf("signal_vci_tgt_fbuf"); |
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| 608 | VciSignals<vci_param_int> signal_vci_tgt_mnic("signal_vci_tgt_mnic"); |
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| 609 | VciSignals<vci_param_int> signal_vci_tgt_cdma("signal_vci_tgt_cdma"); |
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| 610 | VciSignals<vci_param_int> signal_vci_tgt_iopi("signal_vci_tgt_iopi"); |
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| 611 | |
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| 612 | VciSignals<vci_param_int> signal_vci_cmd_to_noc("signal_vci_cmd_to_noc"); |
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| 613 | VciSignals<vci_param_int> signal_vci_cmd_from_noc("signal_vci_cmd_from_noc"); |
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[792] | 614 | |
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[621] | 615 | //////////////////////////// |
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[792] | 616 | // Loader |
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[621] | 617 | //////////////////////////// |
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| 618 | |
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[796] | 619 | #if USE_IOC_RDK |
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[795] | 620 | std::ostringstream ramdisk_name; |
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| 621 | ramdisk_name << disk_name << "@" << std::hex << SEG_RDK_BASE << ":"; |
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| 622 | soclib::common::Loader loader( soft_name, ramdisk_name.str().c_str() ); |
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[664] | 623 | #else |
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[692] | 624 | soclib::common::Loader loader( soft_name ); |
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[664] | 625 | #endif |
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[937] | 626 | |
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[939] | 627 | loader.memory_default(0x55); |
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[621] | 628 | |
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| 629 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
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[630] | 630 | proc_iss::set_loader( loader ); |
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[621] | 631 | |
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[664] | 632 | ////////////////////////////////////////////////////////////// |
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[937] | 633 | // mesh construction: XMAX * YMAX clusters |
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[664] | 634 | ////////////////////////////////////////////////////////////// |
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[621] | 635 | |
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| 636 | TsarLetiCluster<dspin_cmd_width, |
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| 637 | dspin_rsp_width, |
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| 638 | vci_param_int, |
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[937] | 639 | vci_param_ext>* clusters[XMAX][YMAX]; |
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[621] | 640 | |
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| 641 | #if USE_OPENMP |
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| 642 | #pragma omp parallel |
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| 643 | { |
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| 644 | #pragma omp for |
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| 645 | #endif |
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[937] | 646 | for (size_t i = 0; i < (XMAX * YMAX); i++) |
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[621] | 647 | { |
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[937] | 648 | size_t x = i / (YMAX); |
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| 649 | size_t y = i % (YMAX); |
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[621] | 650 | |
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| 651 | #if USE_OPENMP |
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| 652 | #pragma omp critical |
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| 653 | { |
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| 654 | #endif |
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| 655 | std::cout << std::endl; |
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[792] | 656 | std::cout << "Cluster_" << std::dec << x << "_" << y |
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[628] | 657 | << " with cluster_xy = " << std::hex << cluster(x,y) << std::endl; |
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[621] | 658 | std::cout << std::endl; |
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| 659 | |
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[664] | 660 | std::ostringstream cluster_name; |
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| 661 | cluster_name << "cluster_" << std::dec << x << "_" << y; |
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| 662 | |
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[621] | 663 | clusters[x][y] = new TsarLetiCluster<dspin_cmd_width, |
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| 664 | dspin_rsp_width, |
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| 665 | vci_param_int, |
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| 666 | vci_param_ext> |
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| 667 | ( |
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[664] | 668 | cluster_name.str().c_str(), |
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[621] | 669 | NB_PROCS_MAX, |
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| 670 | x, |
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| 671 | y, |
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| 672 | cluster(x,y), |
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| 673 | maptabd, |
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| 674 | maptabx, |
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| 675 | RESET_ADDRESS, |
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| 676 | X_WIDTH, |
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| 677 | Y_WIDTH, |
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| 678 | vci_srcid_width - X_WIDTH - Y_WIDTH, // l_id width, |
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[803] | 679 | P_WIDTH, |
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[621] | 680 | MEMC_TGTID, |
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| 681 | XICU_TGTID, |
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| 682 | MTTY_TGTID, |
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[967] | 683 | DISK_TGTID, |
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[692] | 684 | disk_name, |
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[621] | 685 | MEMC_WAYS, |
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| 686 | MEMC_SETS, |
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| 687 | L1_IWAYS, |
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| 688 | L1_ISETS, |
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| 689 | L1_DWAYS, |
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| 690 | L1_DSETS, |
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| 691 | XRAM_LATENCY, |
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| 692 | loader, |
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| 693 | frozen_cycles, |
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| 694 | trace_from, |
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[792] | 695 | trace_proc_ok, |
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[621] | 696 | trace_proc_id, |
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[792] | 697 | trace_memc_ok, |
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[621] | 698 | trace_memc_id |
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| 699 | ); |
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| 700 | |
---|
| 701 | #if USE_OPENMP |
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| 702 | } // end critical |
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| 703 | #endif |
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| 704 | } // end for |
---|
| 705 | #if USE_OPENMP |
---|
| 706 | } |
---|
| 707 | #endif |
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| 708 | |
---|
[937] | 709 | #if USE_PIC |
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[826] | 710 | |
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[628] | 711 | ////////////////////////////////////////////////////////////////// |
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[937] | 712 | // IO bus and external peripherals in cluster[X_SIZE-1][Y_SIZE-1] |
---|
[664] | 713 | // - 6 local targets : FBF, TTY, CMA, NIC, PIC, IOC |
---|
| 714 | // - 3 local initiators : IOC, CMA, PIC |
---|
| 715 | // There is no PROC, no MEMC and no XICU in this cluster, |
---|
| 716 | // but the crossbar has (NB_PROCS_MAX + 3) intiators and |
---|
| 717 | // 8 targets, in order to use the same SRCID and TGTID space |
---|
[792] | 718 | // (same mapping table for the internal components, |
---|
| 719 | // and for the external peripherals) |
---|
[628] | 720 | ////////////////////////////////////////////////////////////////// |
---|
[621] | 721 | |
---|
[664] | 722 | std::cout << std::endl; |
---|
| 723 | std::cout << " Building IO cluster (external peripherals)" << std::endl; |
---|
| 724 | std::cout << std::endl; |
---|
[792] | 725 | |
---|
[937] | 726 | size_t cluster_io = cluster(XMAX-1, YMAX); |
---|
[621] | 727 | |
---|
[792] | 728 | //////////// vci_local_crossbar |
---|
[628] | 729 | VciLocalCrossbar<vci_param_int>* |
---|
| 730 | iobus = new VciLocalCrossbar<vci_param_int>( |
---|
| 731 | "iobus", |
---|
| 732 | maptabd, // mapping table |
---|
| 733 | cluster_io, // cluster_xy |
---|
| 734 | NB_PROCS_MAX + 3, // number of local initiators |
---|
| 735 | 8, // number of local targets |
---|
[967] | 736 | DISK_TGTID ); // default target index |
---|
[621] | 737 | |
---|
[792] | 738 | //////////// vci_framebuffer |
---|
[628] | 739 | VciFrameBuffer<vci_param_int>* |
---|
| 740 | fbuf = new VciFrameBuffer<vci_param_int>( |
---|
| 741 | "fbuf", |
---|
| 742 | IntTab(cluster_io, FBUF_TGTID), |
---|
| 743 | maptabd, |
---|
| 744 | FBUF_X_SIZE, FBUF_Y_SIZE ); |
---|
[621] | 745 | |
---|
[967] | 746 | #if ( USE_IOC_HBA ) |
---|
| 747 | |
---|
| 748 | //////////// vci_multi_ahci |
---|
| 749 | std::vector<std::string> filenames; |
---|
| 750 | filenames.push_back(disk_name); // one single disk |
---|
| 751 | VciMultiAhci<vci_param_int>* |
---|
| 752 | disk = new VciMultiAhci<vci_param_int>( |
---|
| 753 | "disk", |
---|
| 754 | maptabd, |
---|
| 755 | IntTab(cluster_io, DISK_SRCID), |
---|
| 756 | IntTab(cluster_io, DISK_TGTID), |
---|
| 757 | filenames, |
---|
| 758 | 512, // block size |
---|
| 759 | 64, // burst size (bytes) |
---|
| 760 | 0 ); // disk latency |
---|
| 761 | |
---|
| 762 | #elif ( USE_IOC_BDV or USE_IOC_SDC ) |
---|
| 763 | |
---|
[792] | 764 | //////////// vci_block_device |
---|
[628] | 765 | VciBlockDeviceTsar<vci_param_int>* |
---|
[967] | 766 | disk = new VciBlockDeviceTsar<vci_param_int>( |
---|
| 767 | "disk", |
---|
[628] | 768 | maptabd, |
---|
[967] | 769 | IntTab(cluster_io, DISK_SRCID), |
---|
| 770 | IntTab(cluster_io, DISK_TGTID), |
---|
[692] | 771 | disk_name, |
---|
[628] | 772 | 512, // block size |
---|
[967] | 773 | 64, // burst size (bytes) |
---|
| 774 | 0 ); // disk latency |
---|
| 775 | #endif |
---|
[628] | 776 | |
---|
[792] | 777 | //////////// vci_multi_nic |
---|
[628] | 778 | VciMultiNic<vci_param_int>* |
---|
| 779 | mnic = new VciMultiNic<vci_param_int>( |
---|
[681] | 780 | "mnic", |
---|
[628] | 781 | IntTab(cluster_io, MNIC_TGTID), |
---|
| 782 | maptabd, |
---|
| 783 | NB_NIC_CHANNELS, |
---|
[937] | 784 | 0, // default MAC_4 address |
---|
| 785 | 0, // default MAC_2 address |
---|
| 786 | 1 ); // NIC_MODE_SYNTHESIS |
---|
[628] | 787 | |
---|
[792] | 788 | ///////////// vci_chbuf_dma |
---|
[628] | 789 | VciChbufDma<vci_param_int>* |
---|
| 790 | cdma = new VciChbufDma<vci_param_int>( |
---|
| 791 | "cdma", |
---|
| 792 | maptabd, |
---|
| 793 | IntTab(cluster_io, CDMA_SRCID), |
---|
| 794 | IntTab(cluster_io, CDMA_TGTID), |
---|
[937] | 795 | 64, // burst size |
---|
[792] | 796 | NB_CMA_CHANNELS ); |
---|
[628] | 797 | |
---|
| 798 | ////////////// vci_multi_tty |
---|
| 799 | std::vector<std::string> vect_names; |
---|
| 800 | for (size_t id = 0; id < NB_TTY_CHANNELS; id++) |
---|
| 801 | { |
---|
| 802 | std::ostringstream term_name; |
---|
| 803 | term_name << "ext_" << id; |
---|
| 804 | vect_names.push_back(term_name.str().c_str()); |
---|
| 805 | } |
---|
| 806 | |
---|
[792] | 807 | VciMultiTty<vci_param_int>* |
---|
[628] | 808 | mtty = new VciMultiTty<vci_param_int>( |
---|
| 809 | "mtty", |
---|
| 810 | IntTab(cluster_io, MTTY_TGTID), |
---|
| 811 | maptabd, |
---|
| 812 | vect_names ); |
---|
| 813 | |
---|
| 814 | ///////////// vci_iopic |
---|
| 815 | VciIopic<vci_param_int>* |
---|
| 816 | iopic = new VciIopic<vci_param_int>( |
---|
| 817 | "iopic", |
---|
| 818 | maptabd, |
---|
| 819 | IntTab(cluster_io, IOPI_SRCID), |
---|
| 820 | IntTab(cluster_io, IOPI_TGTID), |
---|
[792] | 821 | 32 ); |
---|
[628] | 822 | |
---|
[792] | 823 | ////////////// vci_dspin wrappers |
---|
[628] | 824 | VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>* |
---|
| 825 | wt_iobus = new VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>( |
---|
[937] | 826 | "wt_iobus", |
---|
[628] | 827 | vci_srcid_width ); |
---|
| 828 | |
---|
| 829 | VciDspinInitiatorWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>* |
---|
| 830 | wi_iobus = new VciDspinInitiatorWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>( |
---|
[937] | 831 | "wi_iobus", |
---|
[628] | 832 | vci_srcid_width ); |
---|
| 833 | |
---|
| 834 | /////////////////////////////////////////////////////////////// |
---|
[937] | 835 | // IObus Net-list |
---|
[628] | 836 | /////////////////////////////////////////////////////////////// |
---|
| 837 | |
---|
[792] | 838 | // iobus |
---|
| 839 | iobus->p_clk (signal_clk); |
---|
[628] | 840 | iobus->p_resetn (signal_resetn); |
---|
| 841 | |
---|
| 842 | iobus->p_target_to_up (signal_vci_cmd_from_noc); |
---|
| 843 | iobus->p_initiator_to_up (signal_vci_cmd_to_noc); |
---|
| 844 | |
---|
| 845 | iobus->p_to_target[MEMC_TGTID] (signal_vci_tgt_memc); |
---|
| 846 | iobus->p_to_target[XICU_TGTID] (signal_vci_tgt_xicu); |
---|
| 847 | iobus->p_to_target[MTTY_TGTID] (signal_vci_tgt_mtty); |
---|
| 848 | iobus->p_to_target[FBUF_TGTID] (signal_vci_tgt_fbuf); |
---|
| 849 | iobus->p_to_target[MNIC_TGTID] (signal_vci_tgt_mnic); |
---|
[967] | 850 | iobus->p_to_target[DISK_TGTID] (signal_vci_tgt_disk); |
---|
[628] | 851 | iobus->p_to_target[CDMA_TGTID] (signal_vci_tgt_cdma); |
---|
| 852 | iobus->p_to_target[IOPI_TGTID] (signal_vci_tgt_iopi); |
---|
| 853 | |
---|
| 854 | for( size_t p=0 ; p<NB_PROCS_MAX ; p++ ) |
---|
| 855 | { |
---|
| 856 | iobus->p_to_initiator[p] (signal_vci_ini_proc[p]); |
---|
| 857 | } |
---|
[967] | 858 | iobus->p_to_initiator[DISK_SRCID] (signal_vci_ini_disk); |
---|
[628] | 859 | iobus->p_to_initiator[CDMA_SRCID] (signal_vci_ini_cdma); |
---|
| 860 | iobus->p_to_initiator[IOPI_SRCID] (signal_vci_ini_iopi); |
---|
| 861 | |
---|
| 862 | std::cout << " - IOBUS connected" << std::endl; |
---|
| 863 | |
---|
[967] | 864 | // disk |
---|
| 865 | disk->p_clk (signal_clk); |
---|
| 866 | disk->p_resetn (signal_resetn); |
---|
| 867 | disk->p_vci_target (signal_vci_tgt_disk); |
---|
| 868 | disk->p_vci_initiator (signal_vci_ini_disk); |
---|
| 869 | #if USE_IOC_HBA |
---|
| 870 | disk->p_channel_irq[0] (signal_irq_disk); |
---|
| 871 | #else |
---|
| 872 | disk->p_irq (signal_irq_disk); |
---|
| 873 | #endif |
---|
[628] | 874 | |
---|
[967] | 875 | std::cout << " - DISK connected" << std::endl; |
---|
[628] | 876 | |
---|
| 877 | // frame_buffer |
---|
| 878 | fbuf->p_clk (signal_clk); |
---|
| 879 | fbuf->p_resetn (signal_resetn); |
---|
| 880 | fbuf->p_vci (signal_vci_tgt_fbuf); |
---|
| 881 | |
---|
| 882 | std::cout << " - FBUF connected" << std::endl; |
---|
| 883 | |
---|
| 884 | // multi_nic |
---|
| 885 | mnic->p_clk (signal_clk); |
---|
| 886 | mnic->p_resetn (signal_resetn); |
---|
| 887 | mnic->p_vci (signal_vci_tgt_mnic); |
---|
| 888 | for ( size_t i=0 ; i<NB_NIC_CHANNELS ; i++ ) |
---|
| 889 | { |
---|
| 890 | mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); |
---|
| 891 | mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); |
---|
| 892 | } |
---|
| 893 | |
---|
| 894 | std::cout << " - MNIC connected" << std::endl; |
---|
| 895 | |
---|
| 896 | // chbuf_dma |
---|
| 897 | cdma->p_clk (signal_clk); |
---|
| 898 | cdma->p_resetn (signal_resetn); |
---|
| 899 | cdma->p_vci_target (signal_vci_tgt_cdma); |
---|
| 900 | cdma->p_vci_initiator (signal_vci_ini_cdma); |
---|
| 901 | for ( size_t i=0 ; i<NB_CMA_CHANNELS ; i++) |
---|
| 902 | { |
---|
| 903 | cdma->p_irq[i] (signal_irq_cdma[i]); |
---|
| 904 | } |
---|
| 905 | |
---|
| 906 | std::cout << " - CDMA connected" << std::endl; |
---|
| 907 | |
---|
| 908 | // multi_tty |
---|
| 909 | mtty->p_clk (signal_clk); |
---|
| 910 | mtty->p_resetn (signal_resetn); |
---|
| 911 | mtty->p_vci (signal_vci_tgt_mtty); |
---|
| 912 | for ( size_t i=0 ; i<NB_TTY_CHANNELS ; i++ ) |
---|
| 913 | { |
---|
[664] | 914 | mtty->p_irq[i] (signal_irq_mtty_rx[i]); |
---|
[628] | 915 | } |
---|
| 916 | |
---|
| 917 | std::cout << " - MTTY connected" << std::endl; |
---|
| 918 | |
---|
| 919 | // iopic |
---|
[664] | 920 | // NB_NIC_CHANNELS <= 2 |
---|
| 921 | // NB_CMA_CHANNELS <= 4 |
---|
[937] | 922 | // NB_TTY_CHANNELS <= 16 |
---|
[628] | 923 | iopic->p_clk (signal_clk); |
---|
| 924 | iopic->p_resetn (signal_resetn); |
---|
| 925 | iopic->p_vci_target (signal_vci_tgt_iopi); |
---|
| 926 | iopic->p_vci_initiator (signal_vci_ini_iopi); |
---|
[664] | 927 | for ( size_t i=0 ; i<32 ; i++) |
---|
[628] | 928 | { |
---|
| 929 | if (i < NB_NIC_CHANNELS) iopic->p_hwi[i] (signal_irq_mnic_rx[i]); |
---|
| 930 | else if(i < 2 ) iopic->p_hwi[i] (signal_irq_false); |
---|
| 931 | else if(i < 2+NB_NIC_CHANNELS) iopic->p_hwi[i] (signal_irq_mnic_tx[i-2]); |
---|
| 932 | else if(i < 4 ) iopic->p_hwi[i] (signal_irq_false); |
---|
| 933 | else if(i < 4+NB_CMA_CHANNELS) iopic->p_hwi[i] (signal_irq_cdma[i-4]); |
---|
[664] | 934 | else if(i < 8) iopic->p_hwi[i] (signal_irq_false); |
---|
[967] | 935 | else if(i == 8) iopic->p_hwi[i] (signal_irq_disk); |
---|
[664] | 936 | else if(i < 16) iopic->p_hwi[i] (signal_irq_false); |
---|
| 937 | else if(i < 16+NB_TTY_CHANNELS) iopic->p_hwi[i] (signal_irq_mtty_rx[i-16]); |
---|
[628] | 938 | else iopic->p_hwi[i] (signal_irq_false); |
---|
| 939 | } |
---|
| 940 | |
---|
[664] | 941 | std::cout << " - IOPIC connected" << std::endl; |
---|
| 942 | |
---|
[628] | 943 | // vci/dspin wrappers |
---|
| 944 | wi_iobus->p_clk (signal_clk); |
---|
| 945 | wi_iobus->p_resetn (signal_resetn); |
---|
| 946 | wi_iobus->p_vci (signal_vci_cmd_to_noc); |
---|
[937] | 947 | wi_iobus->p_dspin_cmd (signal_dspin_bound_cmd_in[XMAX-1][YMAX-1][NORTH]); |
---|
| 948 | wi_iobus->p_dspin_rsp (signal_dspin_bound_rsp_out[XMAX-1][YMAX-1][NORTH]); |
---|
[628] | 949 | |
---|
| 950 | // vci/dspin wrappers |
---|
| 951 | wt_iobus->p_clk (signal_clk); |
---|
| 952 | wt_iobus->p_resetn (signal_resetn); |
---|
| 953 | wt_iobus->p_vci (signal_vci_cmd_from_noc); |
---|
[937] | 954 | wt_iobus->p_dspin_cmd (signal_dspin_bound_cmd_out[XMAX-1][YMAX-1][NORTH]); |
---|
| 955 | wt_iobus->p_dspin_rsp (signal_dspin_bound_rsp_in[XMAX-1][YMAX-1][NORTH]); |
---|
[628] | 956 | |
---|
[937] | 957 | #endif // USE_PIC |
---|
[826] | 958 | |
---|
[628] | 959 | // Clock & RESET for clusters |
---|
[937] | 960 | for (size_t x = 0; x < (XMAX); x++) |
---|
[628] | 961 | { |
---|
[937] | 962 | for (size_t y = 0; y < (YMAX); y++) |
---|
[628] | 963 | { |
---|
| 964 | clusters[x][y]->p_clk (signal_clk); |
---|
| 965 | clusters[x][y]->p_resetn (signal_resetn); |
---|
| 966 | } |
---|
| 967 | } |
---|
| 968 | |
---|
| 969 | // Inter Clusters horizontal connections |
---|
[937] | 970 | if (XMAX > 1) |
---|
[628] | 971 | { |
---|
[937] | 972 | for (size_t x = 0; x < (XMAX-1); x++) |
---|
[628] | 973 | { |
---|
[937] | 974 | for (size_t y = 0; y < (YMAX); y++) |
---|
[628] | 975 | { |
---|
| 976 | clusters[x][y]->p_cmd_out[EAST] (signal_dspin_h_cmd_inc[x][y]); |
---|
| 977 | clusters[x+1][y]->p_cmd_in[WEST] (signal_dspin_h_cmd_inc[x][y]); |
---|
| 978 | clusters[x][y]->p_cmd_in[EAST] (signal_dspin_h_cmd_dec[x][y]); |
---|
| 979 | clusters[x+1][y]->p_cmd_out[WEST] (signal_dspin_h_cmd_dec[x][y]); |
---|
| 980 | |
---|
| 981 | clusters[x][y]->p_rsp_out[EAST] (signal_dspin_h_rsp_inc[x][y]); |
---|
| 982 | clusters[x+1][y]->p_rsp_in[WEST] (signal_dspin_h_rsp_inc[x][y]); |
---|
| 983 | clusters[x][y]->p_rsp_in[EAST] (signal_dspin_h_rsp_dec[x][y]); |
---|
| 984 | clusters[x+1][y]->p_rsp_out[WEST] (signal_dspin_h_rsp_dec[x][y]); |
---|
| 985 | |
---|
| 986 | clusters[x][y]->p_m2p_out[EAST] (signal_dspin_h_m2p_inc[x][y]); |
---|
| 987 | clusters[x+1][y]->p_m2p_in[WEST] (signal_dspin_h_m2p_inc[x][y]); |
---|
| 988 | clusters[x][y]->p_m2p_in[EAST] (signal_dspin_h_m2p_dec[x][y]); |
---|
| 989 | clusters[x+1][y]->p_m2p_out[WEST] (signal_dspin_h_m2p_dec[x][y]); |
---|
| 990 | |
---|
| 991 | clusters[x][y]->p_p2m_out[EAST] (signal_dspin_h_p2m_inc[x][y]); |
---|
| 992 | clusters[x+1][y]->p_p2m_in[WEST] (signal_dspin_h_p2m_inc[x][y]); |
---|
| 993 | clusters[x][y]->p_p2m_in[EAST] (signal_dspin_h_p2m_dec[x][y]); |
---|
| 994 | clusters[x+1][y]->p_p2m_out[WEST] (signal_dspin_h_p2m_dec[x][y]); |
---|
| 995 | |
---|
| 996 | clusters[x][y]->p_cla_out[EAST] (signal_dspin_h_cla_inc[x][y]); |
---|
| 997 | clusters[x+1][y]->p_cla_in[WEST] (signal_dspin_h_cla_inc[x][y]); |
---|
| 998 | clusters[x][y]->p_cla_in[EAST] (signal_dspin_h_cla_dec[x][y]); |
---|
| 999 | clusters[x+1][y]->p_cla_out[WEST] (signal_dspin_h_cla_dec[x][y]); |
---|
[621] | 1000 | } |
---|
[628] | 1001 | } |
---|
| 1002 | } |
---|
[792] | 1003 | std::cout << std::endl << "Horizontal connections done" << std::endl; |
---|
[621] | 1004 | |
---|
[628] | 1005 | // Inter Clusters vertical connections |
---|
[937] | 1006 | if (YMAX > 1) |
---|
[628] | 1007 | { |
---|
[937] | 1008 | for (size_t y = 0; y < (YMAX-1); y++) |
---|
[628] | 1009 | { |
---|
[937] | 1010 | for (size_t x = 0; x < XMAX; x++) |
---|
[628] | 1011 | { |
---|
| 1012 | clusters[x][y]->p_cmd_out[NORTH] (signal_dspin_v_cmd_inc[x][y]); |
---|
| 1013 | clusters[x][y+1]->p_cmd_in[SOUTH] (signal_dspin_v_cmd_inc[x][y]); |
---|
| 1014 | clusters[x][y]->p_cmd_in[NORTH] (signal_dspin_v_cmd_dec[x][y]); |
---|
| 1015 | clusters[x][y+1]->p_cmd_out[SOUTH] (signal_dspin_v_cmd_dec[x][y]); |
---|
| 1016 | |
---|
| 1017 | clusters[x][y]->p_rsp_out[NORTH] (signal_dspin_v_rsp_inc[x][y]); |
---|
| 1018 | clusters[x][y+1]->p_rsp_in[SOUTH] (signal_dspin_v_rsp_inc[x][y]); |
---|
| 1019 | clusters[x][y]->p_rsp_in[NORTH] (signal_dspin_v_rsp_dec[x][y]); |
---|
| 1020 | clusters[x][y+1]->p_rsp_out[SOUTH] (signal_dspin_v_rsp_dec[x][y]); |
---|
| 1021 | |
---|
| 1022 | clusters[x][y]->p_m2p_out[NORTH] (signal_dspin_v_m2p_inc[x][y]); |
---|
| 1023 | clusters[x][y+1]->p_m2p_in[SOUTH] (signal_dspin_v_m2p_inc[x][y]); |
---|
| 1024 | clusters[x][y]->p_m2p_in[NORTH] (signal_dspin_v_m2p_dec[x][y]); |
---|
| 1025 | clusters[x][y+1]->p_m2p_out[SOUTH] (signal_dspin_v_m2p_dec[x][y]); |
---|
| 1026 | |
---|
| 1027 | clusters[x][y]->p_p2m_out[NORTH] (signal_dspin_v_p2m_inc[x][y]); |
---|
| 1028 | clusters[x][y+1]->p_p2m_in[SOUTH] (signal_dspin_v_p2m_inc[x][y]); |
---|
| 1029 | clusters[x][y]->p_p2m_in[NORTH] (signal_dspin_v_p2m_dec[x][y]); |
---|
| 1030 | clusters[x][y+1]->p_p2m_out[SOUTH] (signal_dspin_v_p2m_dec[x][y]); |
---|
| 1031 | |
---|
| 1032 | clusters[x][y]->p_cla_out[NORTH] (signal_dspin_v_cla_inc[x][y]); |
---|
| 1033 | clusters[x][y+1]->p_cla_in[SOUTH] (signal_dspin_v_cla_inc[x][y]); |
---|
| 1034 | clusters[x][y]->p_cla_in[NORTH] (signal_dspin_v_cla_dec[x][y]); |
---|
| 1035 | clusters[x][y+1]->p_cla_out[SOUTH] (signal_dspin_v_cla_dec[x][y]); |
---|
[621] | 1036 | } |
---|
[628] | 1037 | } |
---|
| 1038 | } |
---|
| 1039 | std::cout << std::endl << "Vertical connections done" << std::endl; |
---|
[621] | 1040 | |
---|
[628] | 1041 | // East & West boundary cluster connections |
---|
[937] | 1042 | for (size_t y = 0; y < (YMAX); y++) |
---|
[628] | 1043 | { |
---|
| 1044 | clusters[0][y]->p_cmd_in[WEST] (signal_dspin_bound_cmd_in[0][y][WEST]); |
---|
| 1045 | clusters[0][y]->p_cmd_out[WEST] (signal_dspin_bound_cmd_out[0][y][WEST]); |
---|
[937] | 1046 | clusters[XMAX-1][y]->p_cmd_in[EAST] (signal_dspin_bound_cmd_in[XMAX-1][y][EAST]); |
---|
| 1047 | clusters[XMAX-1][y]->p_cmd_out[EAST] (signal_dspin_bound_cmd_out[XMAX-1][y][EAST]); |
---|
[621] | 1048 | |
---|
[628] | 1049 | clusters[0][y]->p_rsp_in[WEST] (signal_dspin_bound_rsp_in[0][y][WEST]); |
---|
| 1050 | clusters[0][y]->p_rsp_out[WEST] (signal_dspin_bound_rsp_out[0][y][WEST]); |
---|
[937] | 1051 | clusters[XMAX-1][y]->p_rsp_in[EAST] (signal_dspin_bound_rsp_in[XMAX-1][y][EAST]); |
---|
| 1052 | clusters[XMAX-1][y]->p_rsp_out[EAST] (signal_dspin_bound_rsp_out[XMAX-1][y][EAST]); |
---|
[621] | 1053 | |
---|
[628] | 1054 | clusters[0][y]->p_m2p_in[WEST] (signal_dspin_bound_m2p_in[0][y][WEST]); |
---|
| 1055 | clusters[0][y]->p_m2p_out[WEST] (signal_dspin_bound_m2p_out[0][y][WEST]); |
---|
[937] | 1056 | clusters[XMAX-1][y]->p_m2p_in[EAST] (signal_dspin_bound_m2p_in[XMAX-1][y][EAST]); |
---|
| 1057 | clusters[XMAX-1][y]->p_m2p_out[EAST] (signal_dspin_bound_m2p_out[XMAX-1][y][EAST]); |
---|
[621] | 1058 | |
---|
[628] | 1059 | clusters[0][y]->p_p2m_in[WEST] (signal_dspin_bound_p2m_in[0][y][WEST]); |
---|
| 1060 | clusters[0][y]->p_p2m_out[WEST] (signal_dspin_bound_p2m_out[0][y][WEST]); |
---|
[937] | 1061 | clusters[XMAX-1][y]->p_p2m_in[EAST] (signal_dspin_bound_p2m_in[XMAX-1][y][EAST]); |
---|
| 1062 | clusters[XMAX-1][y]->p_p2m_out[EAST] (signal_dspin_bound_p2m_out[XMAX-1][y][EAST]); |
---|
[621] | 1063 | |
---|
[628] | 1064 | clusters[0][y]->p_cla_in[WEST] (signal_dspin_bound_cla_in[0][y][WEST]); |
---|
| 1065 | clusters[0][y]->p_cla_out[WEST] (signal_dspin_bound_cla_out[0][y][WEST]); |
---|
[937] | 1066 | clusters[XMAX-1][y]->p_cla_in[EAST] (signal_dspin_bound_cla_in[XMAX-1][y][EAST]); |
---|
| 1067 | clusters[XMAX-1][y]->p_cla_out[EAST] (signal_dspin_bound_cla_out[XMAX-1][y][EAST]); |
---|
[628] | 1068 | } |
---|
[621] | 1069 | |
---|
[664] | 1070 | std::cout << std::endl << "West & East boundaries connections done" << std::endl; |
---|
| 1071 | |
---|
[628] | 1072 | // North & South boundary clusters connections |
---|
[937] | 1073 | for (size_t x = 0; x < XMAX; x++) |
---|
[628] | 1074 | { |
---|
| 1075 | clusters[x][0]->p_cmd_in[SOUTH] (signal_dspin_bound_cmd_in[x][0][SOUTH]); |
---|
| 1076 | clusters[x][0]->p_cmd_out[SOUTH] (signal_dspin_bound_cmd_out[x][0][SOUTH]); |
---|
[937] | 1077 | clusters[x][YMAX-1]->p_cmd_in[NORTH] (signal_dspin_bound_cmd_in[x][YMAX-1][NORTH]); |
---|
| 1078 | clusters[x][YMAX-1]->p_cmd_out[NORTH] (signal_dspin_bound_cmd_out[x][YMAX-1][NORTH]); |
---|
[621] | 1079 | |
---|
[628] | 1080 | clusters[x][0]->p_rsp_in[SOUTH] (signal_dspin_bound_rsp_in[x][0][SOUTH]); |
---|
| 1081 | clusters[x][0]->p_rsp_out[SOUTH] (signal_dspin_bound_rsp_out[x][0][SOUTH]); |
---|
[937] | 1082 | clusters[x][YMAX-1]->p_rsp_in[NORTH] (signal_dspin_bound_rsp_in[x][YMAX-1][NORTH]); |
---|
| 1083 | clusters[x][YMAX-1]->p_rsp_out[NORTH] (signal_dspin_bound_rsp_out[x][YMAX-1][NORTH]); |
---|
[621] | 1084 | |
---|
[628] | 1085 | clusters[x][0]->p_m2p_in[SOUTH] (signal_dspin_bound_m2p_in[x][0][SOUTH]); |
---|
| 1086 | clusters[x][0]->p_m2p_out[SOUTH] (signal_dspin_bound_m2p_out[x][0][SOUTH]); |
---|
[937] | 1087 | clusters[x][YMAX-1]->p_m2p_in[NORTH] (signal_dspin_bound_m2p_in[x][YMAX-1][NORTH]); |
---|
| 1088 | clusters[x][YMAX-1]->p_m2p_out[NORTH] (signal_dspin_bound_m2p_out[x][YMAX-1][NORTH]); |
---|
[621] | 1089 | |
---|
[628] | 1090 | clusters[x][0]->p_p2m_in[SOUTH] (signal_dspin_bound_p2m_in[x][0][SOUTH]); |
---|
| 1091 | clusters[x][0]->p_p2m_out[SOUTH] (signal_dspin_bound_p2m_out[x][0][SOUTH]); |
---|
[937] | 1092 | clusters[x][YMAX-1]->p_p2m_in[NORTH] (signal_dspin_bound_p2m_in[x][YMAX-1][NORTH]); |
---|
| 1093 | clusters[x][YMAX-1]->p_p2m_out[NORTH] (signal_dspin_bound_p2m_out[x][YMAX-1][NORTH]); |
---|
[628] | 1094 | |
---|
| 1095 | clusters[x][0]->p_cla_in[SOUTH] (signal_dspin_bound_cla_in[x][0][SOUTH]); |
---|
| 1096 | clusters[x][0]->p_cla_out[SOUTH] (signal_dspin_bound_cla_out[x][0][SOUTH]); |
---|
[937] | 1097 | clusters[x][YMAX-1]->p_cla_in[NORTH] (signal_dspin_bound_cla_in[x][YMAX-1][NORTH]); |
---|
| 1098 | clusters[x][YMAX-1]->p_cla_out[NORTH] (signal_dspin_bound_cla_out[x][YMAX-1][NORTH]); |
---|
[628] | 1099 | } |
---|
| 1100 | |
---|
[664] | 1101 | std::cout << std::endl << "North & South boundaries connections done" << std::endl; |
---|
| 1102 | |
---|
[628] | 1103 | std::cout << std::endl; |
---|
| 1104 | |
---|
| 1105 | //////////////////////////////////////////////////////// |
---|
| 1106 | // Simulation |
---|
| 1107 | /////////////////////////////////////////////////////// |
---|
| 1108 | |
---|
| 1109 | sc_start(sc_core::sc_time(0, SC_NS)); |
---|
| 1110 | signal_resetn = false; |
---|
| 1111 | signal_irq_false = false; |
---|
| 1112 | |
---|
| 1113 | // set network boundaries signals default values |
---|
| 1114 | // for all boundary clusters but the IO cluster |
---|
[937] | 1115 | for (size_t x = 0; x < XMAX ; x++) |
---|
[628] | 1116 | { |
---|
[937] | 1117 | for (size_t y = 0; y < YMAX ; y++) |
---|
[628] | 1118 | { |
---|
| 1119 | for (size_t face = 0; face < 4; face++) |
---|
| 1120 | { |
---|
[937] | 1121 | if ( (x != XMAX-1) or (y != YMAX-1) or (face != NORTH) ) |
---|
[628] | 1122 | { |
---|
| 1123 | signal_dspin_bound_cmd_in [x][y][face].write = false; |
---|
| 1124 | signal_dspin_bound_cmd_in [x][y][face].read = true; |
---|
| 1125 | signal_dspin_bound_cmd_out[x][y][face].write = false; |
---|
| 1126 | signal_dspin_bound_cmd_out[x][y][face].read = true; |
---|
| 1127 | |
---|
| 1128 | signal_dspin_bound_rsp_in [x][y][face].write = false; |
---|
| 1129 | signal_dspin_bound_rsp_in [x][y][face].read = true; |
---|
| 1130 | signal_dspin_bound_rsp_out[x][y][face].write = false; |
---|
| 1131 | signal_dspin_bound_rsp_out[x][y][face].read = true; |
---|
| 1132 | } |
---|
| 1133 | |
---|
| 1134 | signal_dspin_bound_m2p_in [x][y][face].write = false; |
---|
| 1135 | signal_dspin_bound_m2p_in [x][y][face].read = true; |
---|
| 1136 | signal_dspin_bound_m2p_out[x][y][face].write = false; |
---|
| 1137 | signal_dspin_bound_m2p_out[x][y][face].read = true; |
---|
| 1138 | |
---|
| 1139 | signal_dspin_bound_p2m_in [x][y][face].write = false; |
---|
| 1140 | signal_dspin_bound_p2m_in [x][y][face].read = true; |
---|
| 1141 | signal_dspin_bound_p2m_out[x][y][face].write = false; |
---|
| 1142 | signal_dspin_bound_p2m_out[x][y][face].read = true; |
---|
| 1143 | |
---|
| 1144 | signal_dspin_bound_cla_in [x][y][face].write = false; |
---|
| 1145 | signal_dspin_bound_cla_in [x][y][face].read = true; |
---|
| 1146 | signal_dspin_bound_cla_out[x][y][face].write = false; |
---|
| 1147 | signal_dspin_bound_cla_out[x][y][face].read = true; |
---|
[621] | 1148 | } |
---|
[628] | 1149 | } |
---|
| 1150 | } |
---|
[621] | 1151 | |
---|
[826] | 1152 | #if USE_PIC == 0 |
---|
[937] | 1153 | signal_dspin_bound_cmd_in[XMAX-1][YMAX-1][NORTH].write = false; |
---|
| 1154 | signal_dspin_bound_rsp_out[XMAX-1][YMAX-1][NORTH].read = true; |
---|
| 1155 | signal_dspin_bound_cmd_out[XMAX-1][YMAX-1][NORTH].read = true; |
---|
| 1156 | signal_dspin_bound_rsp_in[XMAX-1][YMAX-1][NORTH].write = false; |
---|
[826] | 1157 | #endif |
---|
| 1158 | |
---|
[792] | 1159 | // set default values for VCI signals connected to unused ports on iobus |
---|
[664] | 1160 | signal_vci_tgt_memc.rspval = false; |
---|
| 1161 | signal_vci_tgt_xicu.rspval = false; |
---|
| 1162 | for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++ ) signal_vci_ini_proc[p].cmdval = false; |
---|
| 1163 | |
---|
[628] | 1164 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 1165 | signal_resetn = true; |
---|
[621] | 1166 | |
---|
[792] | 1167 | if (gettimeofday(&t1, NULL) != 0) |
---|
[628] | 1168 | { |
---|
| 1169 | perror("gettimeofday"); |
---|
| 1170 | return EXIT_FAILURE; |
---|
| 1171 | } |
---|
[621] | 1172 | |
---|
[937] | 1173 | // simulation loop |
---|
[664] | 1174 | for (uint64_t n = 1; n < ncycles && !stop_called; n++) |
---|
| 1175 | { |
---|
[937] | 1176 | // Monitor a specific address for L1 cache |
---|
[664] | 1177 | // clusters[0][0]->proc[0]->cache_monitor(0x110002C078ULL); |
---|
[621] | 1178 | |
---|
[937] | 1179 | // Monitor a specific address for L2 cache |
---|
[939] | 1180 | // clusters[0][0]->memc->cache_monitor( 0x0000201E00ULL ); |
---|
[937] | 1181 | |
---|
| 1182 | // Monitor a specific address for one XRAM |
---|
[939] | 1183 | // clusters[0][0]->xram->start_monitor( 0x0000201E00ULL , 64); |
---|
[937] | 1184 | |
---|
[664] | 1185 | // stats display |
---|
| 1186 | if( (n % 5000000) == 0) |
---|
| 1187 | { |
---|
[621] | 1188 | |
---|
[792] | 1189 | if (gettimeofday(&t2, NULL) != 0) |
---|
[664] | 1190 | { |
---|
| 1191 | perror("gettimeofday"); |
---|
| 1192 | return EXIT_FAILURE; |
---|
| 1193 | } |
---|
[621] | 1194 | |
---|
[664] | 1195 | ms1 = (uint64_t) t1.tv_sec * 1000ULL + (uint64_t) t1.tv_usec / 1000; |
---|
| 1196 | ms2 = (uint64_t) t2.tv_sec * 1000ULL + (uint64_t) t2.tv_usec / 1000; |
---|
[792] | 1197 | std::cerr << "platform clock frequency " |
---|
[664] | 1198 | << (double) 5000000 / (double) (ms2 - ms1) << "Khz" << std::endl; |
---|
[621] | 1199 | |
---|
[792] | 1200 | if (gettimeofday(&t1, NULL) != 0) |
---|
[664] | 1201 | { |
---|
| 1202 | perror("gettimeofday"); |
---|
| 1203 | return EXIT_FAILURE; |
---|
| 1204 | } |
---|
| 1205 | } |
---|
[621] | 1206 | |
---|
[664] | 1207 | // trace display |
---|
| 1208 | if ( trace_ok and (n > trace_from) ) |
---|
| 1209 | { |
---|
| 1210 | std::cout << "****************** cycle " << std::dec << n ; |
---|
[937] | 1211 | std::cout << " ********************************************" << std::endl; |
---|
[621] | 1212 | |
---|
[664] | 1213 | size_t l = 0; |
---|
| 1214 | size_t x = 0; |
---|
| 1215 | size_t y = 0; |
---|
[621] | 1216 | |
---|
[664] | 1217 | if ( trace_proc_ok ) |
---|
| 1218 | { |
---|
[803] | 1219 | l = trace_proc_id & ((1<<P_WIDTH)-1) ; |
---|
| 1220 | x = (trace_proc_id >> P_WIDTH) >> Y_WIDTH ; |
---|
| 1221 | y = (trace_proc_id >> P_WIDTH) & ((1<<Y_WIDTH) - 1); |
---|
[621] | 1222 | |
---|
[664] | 1223 | std::ostringstream proc_signame; |
---|
| 1224 | proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; |
---|
[681] | 1225 | clusters[x][y]->proc[l]->print_trace(1); |
---|
[664] | 1226 | clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str()); |
---|
[628] | 1227 | |
---|
[664] | 1228 | std::ostringstream xicu_signame; |
---|
| 1229 | xicu_signame << "[SIG]XICU_" << x << "_" << y ; |
---|
| 1230 | clusters[x][y]->xicu->print_trace(0); |
---|
| 1231 | clusters[x][y]->signal_vci_tgt_xicu.print_trace(xicu_signame.str()); |
---|
[937] | 1232 | |
---|
| 1233 | if ( clusters[x][y]->signal_proc_irq[0] ) |
---|
| 1234 | std::cout << "### IRQ_PROC_" << x << "_" << y << "_0" << std::endl; |
---|
| 1235 | if ( clusters[x][y]->signal_proc_irq[4] ) |
---|
| 1236 | std::cout << "### IRQ_PROC_" << x << "_" << y << "_1" << std::endl; |
---|
| 1237 | if ( clusters[x][y]->signal_proc_irq[8] ) |
---|
| 1238 | std::cout << "### IRQ_PROC_" << x << "_" << y << "_2" << std::endl; |
---|
| 1239 | if ( clusters[x][y]->signal_proc_irq[12] ) |
---|
| 1240 | std::cout << "### IRQ_PROC_" << x << "_" << y << "_3" << std::endl; |
---|
[664] | 1241 | } |
---|
[628] | 1242 | |
---|
[664] | 1243 | if ( trace_memc_ok ) |
---|
| 1244 | { |
---|
| 1245 | x = trace_memc_id >> Y_WIDTH; |
---|
| 1246 | y = trace_memc_id & ((1<<Y_WIDTH) - 1); |
---|
| 1247 | |
---|
| 1248 | std::ostringstream smemc; |
---|
| 1249 | smemc << "[SIG]MEMC_" << x << "_" << y; |
---|
| 1250 | std::ostringstream sxram; |
---|
| 1251 | sxram << "[SIG]XRAM_" << x << "_" << y; |
---|
| 1252 | |
---|
| 1253 | clusters[x][y]->memc->print_trace(); |
---|
| 1254 | clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str()); |
---|
| 1255 | clusters[x][y]->signal_vci_xram.print_trace(sxram.str()); |
---|
[792] | 1256 | } |
---|
[664] | 1257 | |
---|
| 1258 | // trace coherence signals |
---|
| 1259 | // clusters[0][0]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_0_0]"); |
---|
| 1260 | // clusters[0][1]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_0_1]"); |
---|
| 1261 | // clusters[1][0]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_1_0]"); |
---|
| 1262 | // clusters[1][1]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_1_1]"); |
---|
| 1263 | |
---|
| 1264 | // clusters[0][0]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_0_0]"); |
---|
| 1265 | // clusters[0][1]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_0_1]"); |
---|
| 1266 | // clusters[1][0]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_1_0]"); |
---|
| 1267 | // clusters[1][1]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_1_1]"); |
---|
| 1268 | |
---|
| 1269 | // trace xbar(s) m2p |
---|
| 1270 | // clusters[0][0]->xbar_m2p->print_trace(); |
---|
| 1271 | // clusters[1][0]->xbar_m2p->print_trace(); |
---|
| 1272 | // clusters[0][1]->xbar_m2p->print_trace(); |
---|
| 1273 | // clusters[1][1]->xbar_m2p->print_trace(); |
---|
[792] | 1274 | |
---|
[664] | 1275 | // trace router(s) m2p |
---|
| 1276 | // clusters[0][0]->router_m2p->print_trace(); |
---|
| 1277 | // clusters[1][0]->router_m2p->print_trace(); |
---|
| 1278 | // clusters[0][1]->router_m2p->print_trace(); |
---|
| 1279 | // clusters[1][1]->router_m2p->print_trace(); |
---|
[792] | 1280 | |
---|
[826] | 1281 | #if USE_PIC |
---|
[664] | 1282 | // trace external ioc |
---|
[967] | 1283 | disk->print_trace(); |
---|
| 1284 | signal_vci_tgt_disk.print_trace("[SIG]DISK_TGT"); |
---|
| 1285 | signal_vci_ini_disk.print_trace("[SIG]DISK_INI"); |
---|
[621] | 1286 | |
---|
[664] | 1287 | // trace external iopic |
---|
| 1288 | iopic->print_trace(); |
---|
| 1289 | signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); |
---|
| 1290 | signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); |
---|
[937] | 1291 | |
---|
| 1292 | // trace external interrupts |
---|
[967] | 1293 | if (signal_irq_disk) std::cout << "### IRQ_DISK" << std::endl; |
---|
[897] | 1294 | #else |
---|
[967] | 1295 | clusters[0][0]->disk->print_trace(); |
---|
| 1296 | clusters[0][0]->signal_vci_tgt_disk.print_trace("[SIG]DISK_0_0"); |
---|
| 1297 | clusters[0][0]->signal_vci_ini_disk.print_trace("[SIG]DISK_0_0"); |
---|
[826] | 1298 | #endif |
---|
[621] | 1299 | |
---|
[664] | 1300 | } // end trace |
---|
[621] | 1301 | |
---|
[664] | 1302 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 1303 | } |
---|
| 1304 | // Free memory |
---|
[951] | 1305 | for (size_t i = 0 ; i < (XMAX * YMAX) ; i++) |
---|
[664] | 1306 | { |
---|
[951] | 1307 | size_t x = i / (YMAX); |
---|
| 1308 | size_t y = i % (YMAX); |
---|
[664] | 1309 | delete clusters[x][y]; |
---|
| 1310 | } |
---|
| 1311 | |
---|
| 1312 | return EXIT_SUCCESS; |
---|
[621] | 1313 | } |
---|
| 1314 | |
---|
[792] | 1315 | void handler(int dummy = 0) |
---|
[628] | 1316 | { |
---|
[621] | 1317 | stop_called = true; |
---|
| 1318 | sc_stop(); |
---|
| 1319 | } |
---|
| 1320 | |
---|
| 1321 | void voidhandler(int dummy = 0) {} |
---|
| 1322 | |
---|
| 1323 | int sc_main (int argc, char *argv[]) |
---|
| 1324 | { |
---|
| 1325 | signal(SIGINT, handler); |
---|
| 1326 | signal(SIGPIPE, voidhandler); |
---|
| 1327 | |
---|
| 1328 | try { |
---|
| 1329 | return _main(argc, argv); |
---|
| 1330 | } catch (std::exception &e) { |
---|
| 1331 | std::cout << e.what() << std::endl; |
---|
| 1332 | } catch (...) { |
---|
| 1333 | std::cout << "Unknown exception occured" << std::endl; |
---|
| 1334 | throw; |
---|
| 1335 | } |
---|
| 1336 | return 1; |
---|
| 1337 | } |
---|
| 1338 | |
---|
| 1339 | |
---|
| 1340 | // Local Variables: |
---|
| 1341 | // tab-width: 3 |
---|
| 1342 | // c-basic-offset: 3 |
---|
| 1343 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 1344 | // indent-tabs-mode: nil |
---|
| 1345 | // End: |
---|
| 1346 | |
---|
| 1347 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
---|