[344] | 1 | ///////////////////////////////////////////////////////////////////////// |
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| 2 | // File: top.cpp |
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| 3 | // Author: Alain Greiner |
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| 4 | // Copyright: UPMC/LIP6 |
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[396] | 5 | // Date : may 2013 |
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[344] | 6 | // This program is released under the GNU public license |
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| 7 | ///////////////////////////////////////////////////////////////////////// |
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[396] | 8 | // This file define a generic TSAR architecture. |
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| 9 | // The physical address space is 40 bits. |
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| 10 | // |
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[344] | 11 | // The number of clusters cannot be larger than 256. |
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| 12 | // The number of processors per cluster cannot be larger than 8. |
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| 13 | // |
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| 14 | // - It uses four dspin_local_crossbar per cluster as local interconnect |
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| 15 | // - It uses two virtual_dspin routers per cluster as global interconnect |
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| 16 | // - It uses the vci_cc_vcache_wrapper |
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| 17 | // - It uses the vci_mem_cache |
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[396] | 18 | // - It contains one vci_xicu per cluster. |
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| 19 | // - It contains one vci_multi_dma per cluster. |
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| 20 | // - It contains one vci_simple_ram per cluster to model the L3 cache. |
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[344] | 21 | // |
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[396] | 22 | // The communication between the MemCache and the Xram is 64 bits. |
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| 23 | // |
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| 24 | // All clusters are identical, but the cluster 0 (called io_cluster), |
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| 25 | // contains 5 extra components: |
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[344] | 26 | // - the boot rom (BROM) |
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| 27 | // - the disk controller (BDEV) |
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| 28 | // - the multi-channel network controller (MNIC) |
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[475] | 29 | // - the multi-channel chained buffer dma controller (CHBUF) |
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[344] | 30 | // - the multi-channel tty controller (MTTY) |
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| 31 | // - the frame buffer controller (FBUF) |
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| 32 | // |
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[396] | 33 | // It is build with one single component implementing a cluster, |
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| 34 | // defined in files tsar_xbar_cluster.* (with * = cpp, h, sd) |
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[344] | 35 | // |
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| 36 | // The IRQs are connected to XICUs as follow: |
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| 37 | // - The IRQ_IN[0] to IRQ_IN[7] ports are not used in all clusters. |
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| 38 | // - The DMA IRQs are connected to IRQ_IN[8] to IRQ_IN[15] in all clusters. |
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| 39 | // - The TTY IRQs are connected to IRQ_IN[16] to IRQ_IN[30] in I/O cluster. |
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| 40 | // - The BDEV IRQ is connected to IRQ_IN[31] in I/O cluster. |
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| 41 | // |
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[396] | 42 | // Some hardware parameters are used when compiling the OS, and are used |
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| 43 | // by this top.cpp file. They must be defined in the hard_config.h file : |
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[344] | 44 | // - CLUSTER_X : number of clusters in a row (power of 2) |
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| 45 | // - CLUSTER_Y : number of clusters in a column (power of 2) |
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| 46 | // - CLUSTER_SIZE : size of the segment allocated to a cluster |
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| 47 | // - NB_PROCS_MAX : number of processors per cluster (power of 2) |
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[438] | 48 | // - NB_DMA_CHANNELS : number of DMA channels per cluster (< 9) |
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| 49 | // - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (< 16) |
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| 50 | // - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (< 9) |
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[344] | 51 | // |
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[396] | 52 | // Some other hardware parameters are not used when compiling the OS, |
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| 53 | // and can be directly defined in this top.cpp file: |
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[344] | 54 | // - XRAM_LATENCY : external ram latency |
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| 55 | // - MEMC_WAYS : L2 cache number of ways |
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| 56 | // - MEMC_SETS : L2 cache number of sets |
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| 57 | // - L1_IWAYS |
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| 58 | // - L1_ISETS |
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| 59 | // - L1_DWAYS |
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| 60 | // - L1_DSETS |
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| 61 | // - FBUF_X_SIZE : width of frame buffer (pixels) |
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| 62 | // - FBUF_Y_SIZE : heigth of frame buffer (lines) |
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| 63 | // - BDEV_SECTOR_SIZE : block size for block drvice |
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| 64 | // - BDEV_IMAGE_NAME : file pathname for block device |
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| 65 | // - NIC_RX_NAME : file pathname for NIC received packets |
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| 66 | // - NIC_TX_NAME : file pathname for NIC transmited packets |
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| 67 | // - NIC_TIMEOUT : max number of cycles before closing a container |
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[396] | 68 | ///////////////////////////////////////////////////////////////////////// |
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| 69 | // General policy for 40 bits physical address decoding: |
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| 70 | // All physical segments base addresses are multiple of 1 Mbytes |
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| 71 | // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) |
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[344] | 72 | // The (x_width + y_width) MSB bits (left aligned) define |
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[396] | 73 | // the cluster index, and the LADR bits define the local index: |
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[344] | 74 | // | X_ID | Y_ID |---| LADR | OFFSET | |
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[396] | 75 | // |x_width|y_width|---| 8 | 24 | |
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[344] | 76 | ///////////////////////////////////////////////////////////////////////// |
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[396] | 77 | // General policy for 14 bits SRCID decoding: |
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| 78 | // Each component is identified by (x_id, y_id, l_id) tuple. |
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| 79 | // | X_ID | Y_ID |---| L_ID | |
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| 80 | // |x_width|y_width|---| 6 | |
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| 81 | ///////////////////////////////////////////////////////////////////////// |
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[344] | 82 | |
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| 83 | #include <systemc> |
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| 84 | #include <sys/time.h> |
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| 85 | #include <iostream> |
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| 86 | #include <sstream> |
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| 87 | #include <cstdlib> |
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| 88 | #include <cstdarg> |
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| 89 | #include <stdint.h> |
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| 90 | |
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| 91 | #include "gdbserver.h" |
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| 92 | #include "mapping_table.h" |
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[378] | 93 | #include "tsar_xbar_cluster.h" |
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[344] | 94 | #include "alloc_elems.h" |
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| 95 | |
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| 96 | /////////////////////////////////////////////////// |
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| 97 | // OS |
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| 98 | /////////////////////////////////////////////////// |
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| 99 | |
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[464] | 100 | //#define USE_ALMOS |
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| 101 | #define USE_GIET |
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[344] | 102 | |
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[464] | 103 | #ifdef USE_ALMOS |
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| 104 | #ifdef USE_GIET |
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| 105 | #error "Can't use Two different OS" |
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| 106 | #endif |
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| 107 | #endif |
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| 108 | |
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| 109 | #ifndef USE_ALMOS |
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| 110 | #ifndef USE_GIET |
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| 111 | #error "You need to specify one OS" |
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| 112 | #endif |
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| 113 | #endif |
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| 114 | |
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[344] | 115 | /////////////////////////////////////////////////// |
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| 116 | // Parallelisation |
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| 117 | /////////////////////////////////////////////////// |
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| 118 | #define USE_OPENMP 0 |
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| 119 | |
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| 120 | #if USE_OPENMP |
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| 121 | #include <omp.h> |
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| 122 | #endif |
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| 123 | |
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| 124 | // cluster index (computed from x,y coordinates) |
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[438] | 125 | #define cluster(x,y) (y + YMAX*x) |
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[344] | 126 | |
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| 127 | /////////////////////////////////////////////////////////// |
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| 128 | // DSPIN parameters |
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| 129 | /////////////////////////////////////////////////////////// |
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| 130 | |
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[404] | 131 | #define dspin_cmd_width 39 |
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| 132 | #define dspin_rsp_width 32 |
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[344] | 133 | |
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[396] | 134 | /////////////////////////////////////////////////////////// |
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| 135 | // VCI parameters |
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| 136 | /////////////////////////////////////////////////////////// |
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| 137 | |
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[438] | 138 | #define vci_cell_width_int 4 |
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| 139 | #define vci_cell_width_ext 8 |
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[396] | 140 | |
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[438] | 141 | #define vci_plen_width 8 |
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| 142 | #define vci_address_width 40 |
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| 143 | #define vci_rerror_width 1 |
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| 144 | #define vci_clen_width 1 |
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| 145 | #define vci_rflag_width 1 |
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| 146 | #define vci_srcid_width 14 |
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| 147 | #define vci_pktid_width 4 |
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| 148 | #define vci_trdid_width 4 |
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| 149 | #define vci_wrplen_width 1 |
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[344] | 150 | //////////////////////////////////////////////////////////// |
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| 151 | // Main Hardware Parameters values |
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| 152 | //////////////////////i///////////////////////////////////// |
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| 153 | |
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[464] | 154 | #ifdef USE_ALMOS |
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| 155 | #include "almos/hard_config.h" |
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| 156 | #define PREFIX_OS "almos/" |
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| 157 | #endif |
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| 158 | #ifdef USE_GIET |
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[468] | 159 | #include "giet_vm/hard_config.h" |
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[464] | 160 | #define PREFIX_OS "giet_vm/" |
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| 161 | #endif |
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[344] | 162 | |
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| 163 | //////////////////////////////////////////////////////////// |
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[396] | 164 | // Secondary Hardware Parameters |
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[344] | 165 | //////////////////////i///////////////////////////////////// |
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| 166 | |
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[438] | 167 | #define XMAX CLUSTER_X |
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| 168 | #define YMAX CLUSTER_Y |
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| 169 | |
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[344] | 170 | #define XRAM_LATENCY 0 |
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| 171 | |
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| 172 | #define MEMC_WAYS 16 |
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| 173 | #define MEMC_SETS 256 |
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| 174 | |
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| 175 | #define L1_IWAYS 4 |
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| 176 | #define L1_ISETS 64 |
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| 177 | |
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| 178 | #define L1_DWAYS 4 |
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| 179 | #define L1_DSETS 64 |
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| 180 | |
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[464] | 181 | #ifdef USE_ALMOS |
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| 182 | #define FBUF_X_SIZE 512 |
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| 183 | #define FBUF_Y_SIZE 512 |
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| 184 | #endif |
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| 185 | #ifdef USE_GIET |
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[344] | 186 | #define FBUF_X_SIZE 128 |
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| 187 | #define FBUF_Y_SIZE 128 |
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[464] | 188 | #endif |
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[344] | 189 | |
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[464] | 190 | #ifdef USE_GIET |
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[344] | 191 | #define BDEV_SECTOR_SIZE 512 |
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[468] | 192 | #define BDEV_IMAGE_NAME PREFIX_OS"display/images.raw" |
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[464] | 193 | #endif |
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| 194 | #ifdef USE_ALMOS |
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| 195 | #define BDEV_SECTOR_SIZE 4096 |
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| 196 | #define BDEV_IMAGE_NAME PREFIX_OS"hdd-img.bin" |
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| 197 | #endif |
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[344] | 198 | |
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[464] | 199 | #define NIC_RX_NAME PREFIX_OS"nic/rx_packets.txt" |
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| 200 | #define NIC_TX_NAME PREFIX_OS"nic/tx_packets.txt" |
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[344] | 201 | #define NIC_TIMEOUT 10000 |
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| 202 | |
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[438] | 203 | #define NORTH 0 |
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| 204 | #define SOUTH 1 |
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| 205 | #define EAST 2 |
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| 206 | #define WEST 3 |
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| 207 | |
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[344] | 208 | //////////////////////////////////////////////////////////// |
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| 209 | // Software to be loaded in ROM & RAM |
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| 210 | //////////////////////i///////////////////////////////////// |
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| 211 | |
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[464] | 212 | #ifdef USE_ALMOS |
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[468] | 213 | #define soft_name PREFIX_OS"bootloader.bin",\ |
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| 214 | PREFIX_OS"kernel-soclib.bin@0xbfc10000:D",\ |
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| 215 | PREFIX_OS"arch-info.bib@0xBFC08000:D" |
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[464] | 216 | #endif |
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| 217 | #ifdef USE_GIET |
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[468] | 218 | #define soft_pathname PREFIX_OS"soft.elf" |
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[464] | 219 | #endif |
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[344] | 220 | |
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| 221 | //////////////////////////////////////////////////////////// |
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| 222 | // DEBUG Parameters default values |
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| 223 | //////////////////////i///////////////////////////////////// |
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| 224 | |
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| 225 | #define MAX_FROZEN_CYCLES 10000 |
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| 226 | |
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| 227 | ///////////////////////////////////////////////////////// |
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| 228 | // Physical segments definition |
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| 229 | ///////////////////////////////////////////////////////// |
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| 230 | // There is 3 segments replicated in all clusters |
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| 231 | // and 5 specific segments in the "IO" cluster |
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| 232 | // (containing address 0xBF000000) |
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| 233 | ///////////////////////////////////////////////////////// |
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| 234 | |
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| 235 | // specific segments in "IO" cluster : absolute physical address |
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| 236 | |
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[396] | 237 | #define BROM_BASE 0x00BFC00000 |
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| 238 | #define BROM_SIZE 0x0000100000 // 1 Mbytes |
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[344] | 239 | |
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[396] | 240 | #define FBUF_BASE 0x00B2000000 |
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[464] | 241 | #define FBUF_SIZE FBUF_X_SIZE * FBUF_Y_SIZE * 2 |
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[344] | 242 | |
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[396] | 243 | #define BDEV_BASE 0x00B3000000 |
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| 244 | #define BDEV_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 245 | |
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[396] | 246 | #define MTTY_BASE 0x00B4000000 |
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| 247 | #define MTTY_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 248 | |
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[396] | 249 | #define MNIC_BASE 0x00B5000000 |
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[402] | 250 | #define MNIC_SIZE 0x0000080000 // 512 Kbytes (for 8 channels) |
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[344] | 251 | |
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[475] | 252 | #define CHBUF_BASE 0x00B6000000 |
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[485] | 253 | #define CHBUF_SIZE 0x0000004000 * NB_CMA_CHANNELS |
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[475] | 254 | |
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[344] | 255 | // replicated segments : address is incremented by a cluster offset |
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| 256 | // offset = cluster(x,y) << (address_width-x_width-y_width); |
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| 257 | |
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[396] | 258 | #define MEMC_BASE 0x0000000000 |
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| 259 | #define MEMC_SIZE 0x0010000000 // 256 Mbytes per cluster |
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[344] | 260 | |
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[396] | 261 | #define XICU_BASE 0x00B0000000 |
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| 262 | #define XICU_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 263 | |
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[396] | 264 | #define MDMA_BASE 0x00B1000000 |
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| 265 | #define MDMA_SIZE 0x0000001000 * NB_DMA_CHANNELS // 4 Kbytes per channel |
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[344] | 266 | |
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| 267 | //////////////////////////////////////////////////////////////////// |
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| 268 | // TGTID definition in direct space |
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| 269 | // For all components: global TGTID = global SRCID = cluster_index |
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| 270 | //////////////////////////////////////////////////////////////////// |
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| 271 | |
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[396] | 272 | #define MEMC_TGTID 0 |
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| 273 | #define XICU_TGTID 1 |
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| 274 | #define MDMA_TGTID 2 |
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| 275 | #define MTTY_TGTID 3 |
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| 276 | #define FBUF_TGTID 4 |
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| 277 | #define BDEV_TGTID 5 |
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[438] | 278 | #define MNIC_TGTID 6 |
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| 279 | #define BROM_TGTID 7 |
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[475] | 280 | #define CHBUF_TGTID 8 |
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[344] | 281 | |
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| 282 | ///////////////////////////////// |
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| 283 | int _main(int argc, char *argv[]) |
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| 284 | { |
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| 285 | using namespace sc_core; |
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| 286 | using namespace soclib::caba; |
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| 287 | using namespace soclib::common; |
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| 288 | |
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[464] | 289 | #ifdef USE_GIET |
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[468] | 290 | char soft_name[256] = soft_pathname; // pathname to binary code |
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[464] | 291 | #endif |
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[468] | 292 | uint64_t ncycles = 100000000000; // simulated cycles |
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[344] | 293 | char disk_name[256] = BDEV_IMAGE_NAME; // pathname to the disk image |
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| 294 | char nic_rx_name[256] = NIC_RX_NAME; // pathname to the rx packets file |
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| 295 | char nic_tx_name[256] = NIC_TX_NAME; // pathname to the tx packets file |
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| 296 | ssize_t threads_nr = 1; // simulator's threads number |
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| 297 | bool debug_ok = false; // trace activated |
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| 298 | size_t debug_period = 1; // trace period |
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[438] | 299 | size_t debug_memc_id = 0; // index of memc to be traced |
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| 300 | size_t debug_proc_id = 0; // index of proc to be traced |
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[344] | 301 | uint32_t debug_from = 0; // trace start cycle |
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| 302 | uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor |
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[396] | 303 | size_t cluster_io_id = 0; // index of cluster containing IOs |
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[468] | 304 | struct timeval t1,t2; |
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[464] | 305 | uint64_t ms1,ms2; |
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[344] | 306 | |
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| 307 | ////////////// command line arguments ////////////////////// |
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| 308 | if (argc > 1) |
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| 309 | { |
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| 310 | for (int n = 1; n < argc; n = n + 2) |
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| 311 | { |
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| 312 | if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)) |
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| 313 | { |
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| 314 | ncycles = atoi(argv[n+1]); |
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| 315 | } |
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| 316 | else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) |
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| 317 | { |
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[464] | 318 | #ifdef USE_ALMOS |
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| 319 | assert( 0 && "Can't define almos soft name" ); |
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| 320 | #endif |
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| 321 | #ifdef USE_GIET |
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[344] | 322 | strcpy(soft_name, argv[n+1]); |
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[464] | 323 | #endif |
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[344] | 324 | } |
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| 325 | else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) |
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| 326 | { |
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| 327 | strcpy(disk_name, argv[n+1]); |
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| 328 | } |
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| 329 | else if ((strcmp(argv[n],"-DEBUG") == 0) && (n+1<argc) ) |
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| 330 | { |
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| 331 | debug_ok = true; |
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| 332 | debug_from = atoi(argv[n+1]); |
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| 333 | } |
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| 334 | else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) ) |
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| 335 | { |
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| 336 | debug_memc_id = atoi(argv[n+1]); |
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[438] | 337 | assert( (debug_memc_id < (XMAX*YMAX) ) && |
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[344] | 338 | "debug_memc_id larger than XMAX * YMAX" ); |
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| 339 | } |
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| 340 | else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) |
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| 341 | { |
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| 342 | debug_proc_id = atoi(argv[n+1]); |
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[438] | 343 | assert( (debug_proc_id < (XMAX * YMAX * NB_PROCS_MAX) ) && |
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[344] | 344 | "debug_proc_id larger than XMAX * YMAX * NB_PROCS" ); |
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| 345 | } |
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| 346 | else if ((strcmp(argv[n], "-THREADS") == 0) && ((n+1) < argc)) |
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| 347 | { |
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| 348 | threads_nr = atoi(argv[n+1]); |
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| 349 | threads_nr = (threads_nr < 1) ? 1 : threads_nr; |
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| 350 | } |
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| 351 | else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)) |
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| 352 | { |
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| 353 | frozen_cycles = atoi(argv[n+1]); |
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| 354 | } |
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| 355 | else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)) |
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| 356 | { |
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| 357 | debug_period = atoi(argv[n+1]); |
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| 358 | } |
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| 359 | else |
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| 360 | { |
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| 361 | std::cout << " Arguments are (key,value) couples." << std::endl; |
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| 362 | std::cout << " The order is not important." << std::endl; |
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| 363 | std::cout << " Accepted arguments are :" << std::endl << std::endl; |
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| 364 | std::cout << " -SOFT pathname_for_embedded_soft" << std::endl; |
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| 365 | std::cout << " -DISK pathname_for_disk_image" << std::endl; |
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| 366 | std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; |
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| 367 | std::cout << " -DEBUG debug_start_cycle" << std::endl; |
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| 368 | std::cout << " -THREADS simulator's threads number" << std::endl; |
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| 369 | std::cout << " -FROZEN max_number_of_lines" << std::endl; |
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| 370 | std::cout << " -PERIOD number_of_cycles between trace" << std::endl; |
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| 371 | std::cout << " -MEMCID index_memc_to_be_traced" << std::endl; |
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| 372 | std::cout << " -PROCID index_proc_to_be_traced" << std::endl; |
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| 373 | exit(0); |
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| 374 | } |
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| 375 | } |
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| 376 | } |
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| 377 | |
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[396] | 378 | // checking hardware parameters |
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[438] | 379 | assert( ( (XMAX == 1) or (XMAX == 2) or (XMAX == 4) or |
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| 380 | (XMAX == 8) or (XMAX == 16) ) and |
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| 381 | "The XMAX parameter must be 1, 2, 4, 8 or 16" ); |
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[344] | 382 | |
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[438] | 383 | assert( ( (YMAX == 1) or (YMAX == 2) or (YMAX == 4) or |
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| 384 | (YMAX == 8) or (YMAX == 16) ) and |
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| 385 | "The YMAX parameter must be 1, 2, 4, 8 or 16" ); |
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[344] | 386 | |
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[396] | 387 | assert( ( (NB_PROCS_MAX == 1) or (NB_PROCS_MAX == 2) or |
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| 388 | (NB_PROCS_MAX == 4) or (NB_PROCS_MAX == 8) ) and |
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| 389 | "The NB_PROCS_MAX parameter must be 1, 2, 4 or 8" ); |
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[344] | 390 | |
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[396] | 391 | assert( (NB_DMA_CHANNELS < 9) and |
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| 392 | "The NB_DMA_CHANNELS parameter must be smaller than 9" ); |
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[344] | 393 | |
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[396] | 394 | assert( (NB_TTY_CHANNELS < 15) and |
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| 395 | "The NB_TTY_CHANNELS parameter must be smaller than 15" ); |
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[344] | 396 | |
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[396] | 397 | assert( (NB_NIC_CHANNELS < 9) and |
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| 398 | "The NB_NIC_CHANNELS parameter must be smaller than 9" ); |
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[344] | 399 | |
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[464] | 400 | #ifdef USE_GIET |
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[438] | 401 | assert( (vci_address_width == 40) and |
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[396] | 402 | "VCI address width must be 40 bits" ); |
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[464] | 403 | #endif |
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[344] | 404 | |
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[396] | 405 | std::cout << std::endl; |
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[438] | 406 | std::cout << " - XMAX = " << XMAX << std::endl; |
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| 407 | std::cout << " - YMAX = " << YMAX << std::endl; |
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| 408 | std::cout << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl; |
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[396] | 409 | std::cout << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS << std::endl; |
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[438] | 410 | std::cout << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl; |
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| 411 | std::cout << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl; |
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| 412 | std::cout << " - MEMC_WAYS = " << MEMC_WAYS << std::endl; |
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| 413 | std::cout << " - MEMC_SETS = " << MEMC_SETS << std::endl; |
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| 414 | std::cout << " - RAM_LATENCY = " << XRAM_LATENCY << std::endl; |
---|
| 415 | std::cout << " - MAX_FROZEN = " << frozen_cycles << std::endl; |
---|
[396] | 416 | |
---|
| 417 | std::cout << std::endl; |
---|
| 418 | // Internal and External VCI parameters definition |
---|
[438] | 419 | typedef soclib::caba::VciParams<vci_cell_width_int, |
---|
| 420 | vci_plen_width, |
---|
| 421 | vci_address_width, |
---|
| 422 | vci_rerror_width, |
---|
| 423 | vci_clen_width, |
---|
| 424 | vci_rflag_width, |
---|
| 425 | vci_srcid_width, |
---|
| 426 | vci_pktid_width, |
---|
| 427 | vci_trdid_width, |
---|
| 428 | vci_wrplen_width> vci_param_int; |
---|
[396] | 429 | |
---|
[438] | 430 | typedef soclib::caba::VciParams<vci_cell_width_ext, |
---|
| 431 | vci_plen_width, |
---|
| 432 | vci_address_width, |
---|
| 433 | vci_rerror_width, |
---|
| 434 | vci_clen_width, |
---|
| 435 | vci_rflag_width, |
---|
| 436 | vci_srcid_width, |
---|
| 437 | vci_pktid_width, |
---|
| 438 | vci_trdid_width, |
---|
| 439 | vci_wrplen_width> vci_param_ext; |
---|
[396] | 440 | |
---|
[344] | 441 | #if USE_OPENMP |
---|
| 442 | omp_set_dynamic(false); |
---|
| 443 | omp_set_num_threads(threads_nr); |
---|
| 444 | std::cerr << "Built with openmp version " << _OPENMP << std::endl; |
---|
| 445 | #endif |
---|
| 446 | |
---|
| 447 | // Define parameters depending on mesh size |
---|
| 448 | size_t x_width; |
---|
| 449 | size_t y_width; |
---|
| 450 | |
---|
[438] | 451 | if (XMAX == 1) x_width = 0; |
---|
| 452 | else if (XMAX == 2) x_width = 1; |
---|
| 453 | else if (XMAX <= 4) x_width = 2; |
---|
| 454 | else if (XMAX <= 8) x_width = 3; |
---|
[389] | 455 | else x_width = 4; |
---|
[344] | 456 | |
---|
[438] | 457 | if (YMAX == 1) y_width = 0; |
---|
| 458 | else if (YMAX == 2) y_width = 1; |
---|
| 459 | else if (YMAX <= 4) y_width = 2; |
---|
| 460 | else if (YMAX <= 8) y_width = 3; |
---|
[389] | 461 | else y_width = 4; |
---|
[344] | 462 | |
---|
| 463 | ///////////////////// |
---|
| 464 | // Mapping Tables |
---|
| 465 | ///////////////////// |
---|
| 466 | |
---|
[396] | 467 | // internal network |
---|
[438] | 468 | MappingTable maptabd(vci_address_width, |
---|
[396] | 469 | IntTab(x_width + y_width, 16 - x_width - y_width), |
---|
[438] | 470 | IntTab(x_width + y_width, vci_srcid_width - x_width - y_width), |
---|
[396] | 471 | 0x00FF000000); |
---|
[344] | 472 | |
---|
[438] | 473 | for (size_t x = 0; x < XMAX; x++) |
---|
[344] | 474 | { |
---|
[438] | 475 | for (size_t y = 0; y < YMAX; y++) |
---|
[344] | 476 | { |
---|
[438] | 477 | sc_uint<vci_address_width> offset; |
---|
| 478 | offset = (sc_uint<vci_address_width>)cluster(x,y) |
---|
| 479 | << (vci_address_width-x_width-y_width); |
---|
[344] | 480 | |
---|
| 481 | std::ostringstream sh; |
---|
[396] | 482 | sh << "seg_memc_" << x << "_" << y; |
---|
| 483 | maptabd.add(Segment(sh.str(), MEMC_BASE+offset, MEMC_SIZE, |
---|
| 484 | IntTab(cluster(x,y),MEMC_TGTID), true)); |
---|
[344] | 485 | |
---|
| 486 | std::ostringstream si; |
---|
[396] | 487 | si << "seg_xicu_" << x << "_" << y; |
---|
| 488 | maptabd.add(Segment(si.str(), XICU_BASE+offset, XICU_SIZE, |
---|
| 489 | IntTab(cluster(x,y),XICU_TGTID), false)); |
---|
[344] | 490 | |
---|
| 491 | std::ostringstream sd; |
---|
[396] | 492 | sd << "seg_mdma_" << x << "_" << y; |
---|
| 493 | maptabd.add(Segment(sd.str(), MDMA_BASE+offset, MDMA_SIZE, |
---|
| 494 | IntTab(cluster(x,y),MDMA_TGTID), false)); |
---|
[344] | 495 | |
---|
| 496 | if ( cluster(x,y) == cluster_io_id ) |
---|
| 497 | { |
---|
[396] | 498 | maptabd.add(Segment("seg_mtty", MTTY_BASE, MTTY_SIZE, |
---|
| 499 | IntTab(cluster(x,y),MTTY_TGTID), false)); |
---|
| 500 | maptabd.add(Segment("seg_fbuf", FBUF_BASE, FBUF_SIZE, |
---|
| 501 | IntTab(cluster(x,y),FBUF_TGTID), false)); |
---|
| 502 | maptabd.add(Segment("seg_bdev", BDEV_BASE, BDEV_SIZE, |
---|
| 503 | IntTab(cluster(x,y),BDEV_TGTID), false)); |
---|
| 504 | maptabd.add(Segment("seg_mnic", MNIC_BASE, MNIC_SIZE, |
---|
| 505 | IntTab(cluster(x,y),MNIC_TGTID), false)); |
---|
[475] | 506 | maptabd.add(Segment("seg_chbuf", CHBUF_BASE, CHBUF_SIZE, |
---|
| 507 | IntTab(cluster(x,y),CHBUF_TGTID), false)); |
---|
[396] | 508 | maptabd.add(Segment("seg_brom", BROM_BASE, BROM_SIZE, |
---|
| 509 | IntTab(cluster(x,y),BROM_TGTID), true)); |
---|
[344] | 510 | } |
---|
| 511 | } |
---|
| 512 | } |
---|
| 513 | std::cout << maptabd << std::endl; |
---|
| 514 | |
---|
| 515 | // external network |
---|
[438] | 516 | MappingTable maptabx(vci_address_width, |
---|
[396] | 517 | IntTab(x_width+y_width), |
---|
| 518 | IntTab(x_width+y_width), |
---|
| 519 | 0xFFFF000000ULL); |
---|
[344] | 520 | |
---|
[438] | 521 | for (size_t x = 0; x < XMAX; x++) |
---|
[344] | 522 | { |
---|
[438] | 523 | for (size_t y = 0; y < YMAX ; y++) |
---|
[344] | 524 | { |
---|
[396] | 525 | |
---|
[438] | 526 | sc_uint<vci_address_width> offset; |
---|
| 527 | offset = (sc_uint<vci_address_width>)cluster(x,y) |
---|
| 528 | << (vci_address_width-x_width-y_width); |
---|
[396] | 529 | |
---|
[344] | 530 | std::ostringstream sh; |
---|
| 531 | sh << "x_seg_memc_" << x << "_" << y; |
---|
[396] | 532 | |
---|
[344] | 533 | maptabx.add(Segment(sh.str(), MEMC_BASE+offset, |
---|
| 534 | MEMC_SIZE, IntTab(cluster(x,y)), false)); |
---|
| 535 | } |
---|
| 536 | } |
---|
| 537 | std::cout << maptabx << std::endl; |
---|
| 538 | |
---|
| 539 | //////////////////// |
---|
| 540 | // Signals |
---|
| 541 | /////////////////// |
---|
| 542 | |
---|
[389] | 543 | sc_clock signal_clk("clk"); |
---|
[344] | 544 | sc_signal<bool> signal_resetn("resetn"); |
---|
| 545 | |
---|
| 546 | // Horizontal inter-clusters DSPIN signals |
---|
[396] | 547 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_inc = |
---|
[468] | 548 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", XMAX-1, YMAX, 3); |
---|
[396] | 549 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_dec = |
---|
[468] | 550 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", XMAX-1, YMAX, 3); |
---|
[396] | 551 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_inc = |
---|
[438] | 552 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", XMAX-1, YMAX, 2); |
---|
[396] | 553 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_dec = |
---|
[438] | 554 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", XMAX-1, YMAX, 2); |
---|
[344] | 555 | |
---|
| 556 | // Vertical inter-clusters DSPIN signals |
---|
[396] | 557 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_inc = |
---|
[468] | 558 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", XMAX, YMAX-1, 3); |
---|
[396] | 559 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_dec = |
---|
[468] | 560 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", XMAX, YMAX-1, 3); |
---|
[396] | 561 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_inc = |
---|
[438] | 562 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", XMAX, YMAX-1, 2); |
---|
[396] | 563 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_dec = |
---|
[438] | 564 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", XMAX, YMAX-1, 2); |
---|
[344] | 565 | |
---|
| 566 | // Mesh boundaries DSPIN signals |
---|
[396] | 567 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_in = |
---|
[468] | 568 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_in" , XMAX, YMAX, 4, 3); |
---|
[396] | 569 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_out = |
---|
[468] | 570 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_out", XMAX, YMAX, 4, 3); |
---|
[396] | 571 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_in = |
---|
[468] | 572 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_in" , XMAX, YMAX, 4, 2); |
---|
[396] | 573 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_out = |
---|
[468] | 574 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_out", XMAX, YMAX, 4, 2); |
---|
[344] | 575 | |
---|
| 576 | |
---|
| 577 | //////////////////////////// |
---|
| 578 | // Loader |
---|
| 579 | //////////////////////////// |
---|
| 580 | |
---|
| 581 | soclib::common::Loader loader(soft_name); |
---|
| 582 | |
---|
| 583 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
---|
| 584 | proc_iss::set_loader(loader); |
---|
| 585 | |
---|
| 586 | //////////////////////////// |
---|
| 587 | // Clusters construction |
---|
| 588 | //////////////////////////// |
---|
| 589 | |
---|
[396] | 590 | TsarXbarCluster<dspin_cmd_width, |
---|
| 591 | dspin_rsp_width, |
---|
| 592 | vci_param_int, |
---|
[438] | 593 | vci_param_ext>* clusters[XMAX][YMAX]; |
---|
[344] | 594 | |
---|
| 595 | #if USE_OPENMP |
---|
| 596 | #pragma omp parallel |
---|
| 597 | { |
---|
| 598 | #pragma omp for |
---|
| 599 | #endif |
---|
[438] | 600 | for(size_t i = 0; i < (XMAX * YMAX); i++) |
---|
[344] | 601 | { |
---|
[438] | 602 | size_t x = i / YMAX; |
---|
| 603 | size_t y = i % YMAX; |
---|
[344] | 604 | |
---|
| 605 | #if USE_OPENMP |
---|
| 606 | #pragma omp critical |
---|
| 607 | { |
---|
| 608 | #endif |
---|
[438] | 609 | std::cout << std::endl; |
---|
| 610 | std::cout << "Cluster_" << x << "_" << y << std::endl; |
---|
| 611 | std::cout << std::endl; |
---|
[389] | 612 | |
---|
[344] | 613 | std::ostringstream sc; |
---|
| 614 | sc << "cluster_" << x << "_" << y; |
---|
[396] | 615 | clusters[x][y] = new TsarXbarCluster<dspin_cmd_width, |
---|
| 616 | dspin_rsp_width, |
---|
| 617 | vci_param_int, |
---|
| 618 | vci_param_ext> |
---|
[344] | 619 | ( |
---|
| 620 | sc.str().c_str(), |
---|
[396] | 621 | NB_PROCS_MAX, |
---|
| 622 | NB_TTY_CHANNELS, |
---|
| 623 | NB_DMA_CHANNELS, |
---|
| 624 | x, |
---|
| 625 | y, |
---|
| 626 | cluster(x,y), |
---|
| 627 | maptabd, |
---|
| 628 | maptabx, |
---|
| 629 | x_width, |
---|
| 630 | y_width, |
---|
[438] | 631 | vci_srcid_width - x_width - y_width, // l_id width, |
---|
[396] | 632 | MEMC_TGTID, |
---|
| 633 | XICU_TGTID, |
---|
| 634 | MDMA_TGTID, |
---|
| 635 | FBUF_TGTID, |
---|
| 636 | MTTY_TGTID, |
---|
| 637 | BROM_TGTID, |
---|
| 638 | MNIC_TGTID, |
---|
[475] | 639 | CHBUF_TGTID, |
---|
[396] | 640 | BDEV_TGTID, |
---|
| 641 | MEMC_WAYS, |
---|
| 642 | MEMC_SETS, |
---|
| 643 | L1_IWAYS, |
---|
| 644 | L1_ISETS, |
---|
| 645 | L1_DWAYS, |
---|
| 646 | L1_DSETS, |
---|
| 647 | XRAM_LATENCY, |
---|
| 648 | (cluster(x,y) == cluster_io_id), |
---|
| 649 | FBUF_X_SIZE, |
---|
| 650 | FBUF_Y_SIZE, |
---|
| 651 | disk_name, |
---|
| 652 | BDEV_SECTOR_SIZE, |
---|
| 653 | NB_NIC_CHANNELS, |
---|
| 654 | nic_rx_name, |
---|
| 655 | nic_tx_name, |
---|
| 656 | NIC_TIMEOUT, |
---|
[485] | 657 | NB_CMA_CHANNELS, |
---|
[396] | 658 | loader, |
---|
[344] | 659 | frozen_cycles, |
---|
[389] | 660 | debug_from , |
---|
[344] | 661 | debug_ok and (cluster(x,y) == debug_memc_id), |
---|
| 662 | debug_ok and (cluster(x,y) == debug_proc_id) |
---|
| 663 | ); |
---|
| 664 | |
---|
| 665 | #if USE_OPENMP |
---|
| 666 | } // end critical |
---|
| 667 | #endif |
---|
| 668 | } // end for |
---|
| 669 | #if USE_OPENMP |
---|
| 670 | } |
---|
| 671 | #endif |
---|
| 672 | |
---|
| 673 | /////////////////////////////////////////////////////////////// |
---|
| 674 | // Net-list |
---|
| 675 | /////////////////////////////////////////////////////////////// |
---|
| 676 | |
---|
| 677 | // Clock & RESET |
---|
[438] | 678 | for (size_t x = 0; x < (XMAX); x++){ |
---|
| 679 | for (size_t y = 0; y < YMAX; y++){ |
---|
[389] | 680 | clusters[x][y]->p_clk (signal_clk); |
---|
| 681 | clusters[x][y]->p_resetn (signal_resetn); |
---|
[344] | 682 | } |
---|
| 683 | } |
---|
| 684 | |
---|
| 685 | // Inter Clusters horizontal connections |
---|
[438] | 686 | if (XMAX > 1){ |
---|
| 687 | for (size_t x = 0; x < (XMAX-1); x++){ |
---|
| 688 | for (size_t y = 0; y < YMAX; y++){ |
---|
[468] | 689 | for (size_t k = 0; k < 3; k++){ |
---|
[465] | 690 | clusters[x][y]->p_cmd_out[EAST][k] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
| 691 | clusters[x+1][y]->p_cmd_in[WEST][k] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
| 692 | clusters[x][y]->p_cmd_in[EAST][k] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
| 693 | clusters[x+1][y]->p_cmd_out[WEST][k] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
[468] | 694 | } |
---|
| 695 | |
---|
| 696 | for (size_t k = 0; k < 2; k++){ |
---|
[465] | 697 | clusters[x][y]->p_rsp_out[EAST][k] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
| 698 | clusters[x+1][y]->p_rsp_in[WEST][k] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
| 699 | clusters[x][y]->p_rsp_in[EAST][k] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
| 700 | clusters[x+1][y]->p_rsp_out[WEST][k] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
[344] | 701 | } |
---|
| 702 | } |
---|
| 703 | } |
---|
| 704 | } |
---|
| 705 | std::cout << std::endl << "Horizontal connections established" << std::endl; |
---|
| 706 | |
---|
| 707 | // Inter Clusters vertical connections |
---|
[438] | 708 | if (YMAX > 1) { |
---|
| 709 | for (size_t y = 0; y < (YMAX-1); y++){ |
---|
| 710 | for (size_t x = 0; x < XMAX; x++){ |
---|
[468] | 711 | for (size_t k = 0; k < 3; k++){ |
---|
[465] | 712 | clusters[x][y]->p_cmd_out[NORTH][k] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
| 713 | clusters[x][y+1]->p_cmd_in[SOUTH][k] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
| 714 | clusters[x][y]->p_cmd_in[NORTH][k] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
| 715 | clusters[x][y+1]->p_cmd_out[SOUTH][k] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
[468] | 716 | } |
---|
| 717 | |
---|
| 718 | for (size_t k = 0; k < 2; k++){ |
---|
[465] | 719 | clusters[x][y]->p_rsp_out[NORTH][k] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
| 720 | clusters[x][y+1]->p_rsp_in[SOUTH][k] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
| 721 | clusters[x][y]->p_rsp_in[NORTH][k] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
| 722 | clusters[x][y+1]->p_rsp_out[SOUTH][k] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
[344] | 723 | } |
---|
| 724 | } |
---|
| 725 | } |
---|
| 726 | } |
---|
| 727 | std::cout << "Vertical connections established" << std::endl; |
---|
| 728 | |
---|
| 729 | // East & West boundary cluster connections |
---|
[438] | 730 | for (size_t y = 0; y < YMAX; y++) |
---|
[344] | 731 | { |
---|
[468] | 732 | for (size_t k = 0; k < 3; k++) |
---|
| 733 | { |
---|
| 734 | clusters[0][y]->p_cmd_in[WEST][k] (signal_dspin_false_cmd_in[0][y][WEST][k]); |
---|
| 735 | clusters[0][y]->p_cmd_out[WEST][k] (signal_dspin_false_cmd_out[0][y][WEST][k]); |
---|
| 736 | clusters[XMAX-1][y]->p_cmd_in[EAST][k] (signal_dspin_false_cmd_in[XMAX-1][y][EAST][k]); |
---|
| 737 | clusters[XMAX-1][y]->p_cmd_out[EAST][k] (signal_dspin_false_cmd_out[XMAX-1][y][EAST][k]); |
---|
| 738 | } |
---|
| 739 | |
---|
[344] | 740 | for (size_t k = 0; k < 2; k++) |
---|
| 741 | { |
---|
[468] | 742 | clusters[0][y]->p_rsp_in[WEST][k] (signal_dspin_false_rsp_in[0][y][WEST][k]); |
---|
| 743 | clusters[0][y]->p_rsp_out[WEST][k] (signal_dspin_false_rsp_out[0][y][WEST][k]); |
---|
| 744 | clusters[XMAX-1][y]->p_rsp_in[EAST][k] (signal_dspin_false_rsp_in[XMAX-1][y][EAST][k]); |
---|
| 745 | clusters[XMAX-1][y]->p_rsp_out[EAST][k] (signal_dspin_false_rsp_out[XMAX-1][y][EAST][k]); |
---|
[344] | 746 | } |
---|
| 747 | } |
---|
| 748 | |
---|
| 749 | // North & South boundary clusters connections |
---|
[438] | 750 | for (size_t x = 0; x < XMAX; x++) |
---|
[344] | 751 | { |
---|
[468] | 752 | for (size_t k = 0; k < 3; k++) |
---|
| 753 | { |
---|
| 754 | clusters[x][0]->p_cmd_in[SOUTH][k] (signal_dspin_false_cmd_in[x][0][SOUTH][k]); |
---|
| 755 | clusters[x][0]->p_cmd_out[SOUTH][k] (signal_dspin_false_cmd_out[x][0][SOUTH][k]); |
---|
| 756 | clusters[x][YMAX-1]->p_cmd_in[NORTH][k] (signal_dspin_false_cmd_in[x][YMAX-1][NORTH][k]); |
---|
| 757 | clusters[x][YMAX-1]->p_cmd_out[NORTH][k] (signal_dspin_false_cmd_out[x][YMAX-1][NORTH][k]); |
---|
| 758 | } |
---|
| 759 | |
---|
[344] | 760 | for (size_t k = 0; k < 2; k++) |
---|
| 761 | { |
---|
[468] | 762 | clusters[x][0]->p_rsp_in[SOUTH][k] (signal_dspin_false_rsp_in[x][0][SOUTH][k]); |
---|
| 763 | clusters[x][0]->p_rsp_out[SOUTH][k] (signal_dspin_false_rsp_out[x][0][SOUTH][k]); |
---|
| 764 | clusters[x][YMAX-1]->p_rsp_in[NORTH][k] (signal_dspin_false_rsp_in[x][YMAX-1][NORTH][k]); |
---|
| 765 | clusters[x][YMAX-1]->p_rsp_out[NORTH][k] (signal_dspin_false_rsp_out[x][YMAX-1][NORTH][k]); |
---|
[344] | 766 | } |
---|
| 767 | } |
---|
[396] | 768 | std::cout << "North, South, West, East connections established" << std::endl; |
---|
| 769 | std::cout << std::endl; |
---|
[344] | 770 | |
---|
| 771 | |
---|
| 772 | //////////////////////////////////////////////////////// |
---|
| 773 | // Simulation |
---|
| 774 | /////////////////////////////////////////////////////// |
---|
| 775 | |
---|
| 776 | sc_start(sc_core::sc_time(0, SC_NS)); |
---|
| 777 | signal_resetn = false; |
---|
| 778 | |
---|
| 779 | // network boundaries signals |
---|
[438] | 780 | for (size_t x = 0; x < XMAX ; x++){ |
---|
| 781 | for (size_t y = 0; y < YMAX ; y++){ |
---|
[468] | 782 | for (size_t a = 0; a < 4; a++){ |
---|
| 783 | for (size_t k = 0; k < 3; k++){ |
---|
| 784 | signal_dspin_false_cmd_in [x][y][a][k].write = false; |
---|
| 785 | signal_dspin_false_cmd_in [x][y][a][k].read = true; |
---|
| 786 | signal_dspin_false_cmd_out[x][y][a][k].write = false; |
---|
| 787 | signal_dspin_false_cmd_out[x][y][a][k].read = true; |
---|
| 788 | } |
---|
[344] | 789 | |
---|
[468] | 790 | for (size_t k = 0; k < 2; k++){ |
---|
| 791 | signal_dspin_false_rsp_in [x][y][a][k].write = false; |
---|
| 792 | signal_dspin_false_rsp_in [x][y][a][k].read = true; |
---|
| 793 | signal_dspin_false_rsp_out[x][y][a][k].write = false; |
---|
| 794 | signal_dspin_false_rsp_out[x][y][a][k].read = true; |
---|
[344] | 795 | } |
---|
| 796 | } |
---|
| 797 | } |
---|
| 798 | } |
---|
| 799 | |
---|
| 800 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 801 | signal_resetn = true; |
---|
| 802 | |
---|
[464] | 803 | if (gettimeofday(&t1, NULL) != 0) |
---|
| 804 | { |
---|
| 805 | perror("gettimeofday"); |
---|
| 806 | return EXIT_FAILURE; |
---|
| 807 | } |
---|
| 808 | |
---|
[468] | 809 | for (uint64_t n = 1; n < ncycles; n++) |
---|
[344] | 810 | { |
---|
[396] | 811 | // Monitor a specific address for L1 & L2 caches |
---|
| 812 | //clusters[0][0]->proc[0]->cache_monitor(0x800002c000ULL); |
---|
| 813 | //clusters[1][0]->memc->copies_monitor(0x800002C000ULL); |
---|
| 814 | |
---|
[464] | 815 | if( (n % 5000000) == 0) |
---|
| 816 | { |
---|
| 817 | |
---|
| 818 | if (gettimeofday(&t2, NULL) != 0) |
---|
| 819 | { |
---|
| 820 | perror("gettimeofday"); |
---|
| 821 | return EXIT_FAILURE; |
---|
| 822 | } |
---|
| 823 | |
---|
| 824 | ms1 = (uint64_t)t1.tv_sec * 1000ULL + (uint64_t)t1.tv_usec / 1000; |
---|
| 825 | ms2 = (uint64_t)t2.tv_sec * 1000ULL + (uint64_t)t2.tv_usec / 1000; |
---|
| 826 | std::cerr << "platform clock frequency " << (double)5000000 / (double)(ms2 - ms1) << "Khz" << std::endl; |
---|
| 827 | |
---|
| 828 | if (gettimeofday(&t1, NULL) != 0) |
---|
| 829 | { |
---|
| 830 | perror("gettimeofday"); |
---|
| 831 | return EXIT_FAILURE; |
---|
| 832 | } |
---|
| 833 | } |
---|
| 834 | |
---|
[344] | 835 | if (debug_ok and (n > debug_from) and (n % debug_period == 0)) |
---|
| 836 | { |
---|
| 837 | std::cout << "****************** cycle " << std::dec << n ; |
---|
| 838 | std::cout << " ************************************************" << std::endl; |
---|
| 839 | |
---|
[379] | 840 | // trace proc[debug_proc_id] |
---|
[438] | 841 | size_t l = debug_proc_id % NB_PROCS_MAX ; |
---|
| 842 | size_t y = (debug_proc_id / NB_PROCS_MAX) % YMAX ; |
---|
| 843 | size_t x = debug_proc_id / (YMAX * NB_PROCS_MAX) ; |
---|
[379] | 844 | |
---|
[438] | 845 | std::ostringstream proc_signame; |
---|
| 846 | proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; |
---|
| 847 | std::ostringstream p2m_signame; |
---|
| 848 | p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ; |
---|
| 849 | std::ostringstream m2p_signame; |
---|
| 850 | m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ; |
---|
| 851 | std::ostringstream p_cmd_signame; |
---|
| 852 | p_cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ; |
---|
| 853 | std::ostringstream p_rsp_signame; |
---|
| 854 | p_rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ; |
---|
[379] | 855 | |
---|
[438] | 856 | clusters[x][y]->proc[l]->print_trace(); |
---|
| 857 | clusters[x][y]->wi_proc[l]->print_trace(); |
---|
| 858 | clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str()); |
---|
| 859 | clusters[x][y]->signal_dspin_p2m_proc[l].print_trace(p2m_signame.str()); |
---|
| 860 | clusters[x][y]->signal_dspin_m2p_proc[l].print_trace(m2p_signame.str()); |
---|
| 861 | clusters[x][y]->signal_dspin_cmd_proc_i[l].print_trace(p_cmd_signame.str()); |
---|
| 862 | clusters[x][y]->signal_dspin_rsp_proc_i[l].print_trace(p_rsp_signame.str()); |
---|
[404] | 863 | |
---|
[438] | 864 | clusters[x][y]->xbar_rsp_d->print_trace(); |
---|
| 865 | clusters[x][y]->xbar_cmd_d->print_trace(); |
---|
| 866 | clusters[x][y]->signal_dspin_cmd_l2g_d.print_trace("[SIG]L2G CMD"); |
---|
| 867 | clusters[x][y]->signal_dspin_cmd_g2l_d.print_trace("[SIG]G2L CMD"); |
---|
| 868 | clusters[x][y]->signal_dspin_rsp_l2g_d.print_trace("[SIG]L2G RSP"); |
---|
| 869 | clusters[x][y]->signal_dspin_rsp_g2l_d.print_trace("[SIG]G2L RSP"); |
---|
[404] | 870 | |
---|
[379] | 871 | // trace memc[debug_memc_id] |
---|
[438] | 872 | x = debug_memc_id / YMAX; |
---|
| 873 | y = debug_memc_id % YMAX; |
---|
[344] | 874 | |
---|
[438] | 875 | std::ostringstream smemc; |
---|
| 876 | smemc << "[SIG]MEMC_" << x << "_" << y; |
---|
| 877 | std::ostringstream sxram; |
---|
| 878 | sxram << "[SIG]XRAM_" << x << "_" << y; |
---|
| 879 | std::ostringstream sm2p; |
---|
| 880 | sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ; |
---|
| 881 | std::ostringstream sp2m; |
---|
| 882 | sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ; |
---|
| 883 | std::ostringstream m_cmd_signame; |
---|
| 884 | m_cmd_signame << "[SIG]MEMC_" << x << "_" << y << " CMD" ; |
---|
| 885 | std::ostringstream m_rsp_signame; |
---|
| 886 | m_rsp_signame << "[SIG]MEMC_" << x << "_" << y << " RSP" ; |
---|
[344] | 887 | |
---|
[438] | 888 | clusters[x][y]->memc->print_trace(); |
---|
| 889 | clusters[x][y]->wt_memc->print_trace(); |
---|
| 890 | clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str()); |
---|
| 891 | clusters[x][y]->signal_vci_xram.print_trace(sxram.str()); |
---|
| 892 | clusters[x][y]->signal_dspin_p2m_memc.print_trace(sp2m.str()); |
---|
| 893 | clusters[x][y]->signal_dspin_m2p_memc.print_trace(sm2p.str()); |
---|
| 894 | clusters[x][y]->signal_dspin_cmd_memc_t.print_trace(m_cmd_signame.str()); |
---|
| 895 | clusters[x][y]->signal_dspin_rsp_memc_t.print_trace(m_rsp_signame.str()); |
---|
[396] | 896 | |
---|
| 897 | // trace replicated peripherals |
---|
[404] | 898 | // clusters[1][1]->mdma->print_trace(); |
---|
| 899 | // clusters[1][1]->signal_vci_tgt_mdma.print_trace("[SIG]MDMA_TGT_1_1"); |
---|
| 900 | // clusters[1][1]->signal_vci_ini_mdma.print_trace("[SIG]MDMA_INI_1_1"); |
---|
[396] | 901 | |
---|
| 902 | |
---|
[379] | 903 | // trace external peripherals |
---|
[438] | 904 | size_t io_x = cluster_io_id / YMAX; |
---|
| 905 | size_t io_y = cluster_io_id % YMAX; |
---|
[379] | 906 | |
---|
[404] | 907 | clusters[io_x][io_y]->brom->print_trace(); |
---|
| 908 | clusters[io_x][io_y]->wt_brom->print_trace(); |
---|
| 909 | clusters[io_x][io_y]->signal_vci_tgt_brom.print_trace("[SIG]BROM"); |
---|
| 910 | clusters[io_x][io_y]->signal_dspin_cmd_brom_t.print_trace("[SIG]BROM CMD"); |
---|
| 911 | clusters[io_x][io_y]->signal_dspin_rsp_brom_t.print_trace("[SIG]BROM RSP"); |
---|
[396] | 912 | |
---|
[404] | 913 | // clusters[io_x][io_y]->bdev->print_trace(); |
---|
| 914 | // clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); |
---|
| 915 | // clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); |
---|
[344] | 916 | } |
---|
| 917 | |
---|
| 918 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 919 | } |
---|
| 920 | return EXIT_SUCCESS; |
---|
| 921 | } |
---|
| 922 | |
---|
| 923 | int sc_main (int argc, char *argv[]) |
---|
| 924 | { |
---|
| 925 | try { |
---|
| 926 | return _main(argc, argv); |
---|
| 927 | } catch (std::exception &e) { |
---|
| 928 | std::cout << e.what() << std::endl; |
---|
| 929 | } catch (...) { |
---|
| 930 | std::cout << "Unknown exception occured" << std::endl; |
---|
| 931 | throw; |
---|
| 932 | } |
---|
| 933 | return 1; |
---|
| 934 | } |
---|
| 935 | |
---|
| 936 | |
---|
| 937 | // Local Variables: |
---|
| 938 | // tab-width: 3 |
---|
| 939 | // c-basic-offset: 3 |
---|
| 940 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 941 | // indent-tabs-mode: nil |
---|
| 942 | // End: |
---|
| 943 | |
---|
| 944 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
---|