[345] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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[378] | 2 | // File: tsar_xbar_cluster.cpp |
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[428] | 3 | // Author: Alain Greiner |
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[345] | 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : march 2011 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | // This file define a TSAR cluster architecture with virtual memory: |
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[428] | 9 | // - It uses two virtual_dspin_router as distributed global interconnect |
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| 10 | // - It uses four dspin_local_crossbar as local interconnect |
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[345] | 11 | // - It uses the vci_cc_vcache_wrapper |
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| 12 | // - It uses the vci_mem_cache |
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| 13 | // - It contains a private RAM with a variable latency to emulate the L3 cache |
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| 14 | // - It can contains 1, 2 or 4 processors |
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| 15 | // - Each processor has a private dma channel (vci_multi_dma) |
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| 16 | // - It uses the vci_xicu interrupt controller |
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[396] | 17 | // - The peripherals MTTY, BDEV, FBUF, MNIC and BROM are in cluster (0,0) |
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[428] | 18 | // - The Multi-TTY component controls up to 15 terminals. |
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[345] | 19 | // - Each Multi-DMA component controls up to 8 DMA channels. |
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| 20 | // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] |
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| 21 | // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] |
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| 22 | // - The BDEV IRQ is connected to IRQ_IN[31] |
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[428] | 23 | ////////////////////////////////////////////////////////////////////////////////// |
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[345] | 24 | |
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[378] | 25 | #include "../include/tsar_xbar_cluster.h" |
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[345] | 26 | |
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[389] | 27 | |
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[345] | 28 | namespace soclib { |
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| 29 | namespace caba { |
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| 30 | |
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[396] | 31 | //////////////////////////////////////////////////////////////////////////////////// |
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[428] | 32 | template<size_t dspin_cmd_width, |
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[396] | 33 | size_t dspin_rsp_width, |
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| 34 | typename vci_param_int, |
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| 35 | typename vci_param_ext> TsarXbarCluster<dspin_cmd_width, |
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| 36 | dspin_rsp_width, |
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| 37 | vci_param_int, |
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| 38 | vci_param_ext>::TsarXbarCluster( |
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| 39 | //////////////////////////////////////////////////////////////////////////////////// |
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[345] | 40 | sc_module_name insname, |
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| 41 | size_t nb_procs, |
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| 42 | size_t nb_ttys, |
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| 43 | size_t nb_dmas, |
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| 44 | size_t x_id, |
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| 45 | size_t y_id, |
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| 46 | size_t cluster_id, |
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| 47 | const soclib::common::MappingTable &mtd, |
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[428] | 48 | const soclib::common::MappingTable &mtx, |
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[345] | 49 | size_t x_width, |
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| 50 | size_t y_width, |
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| 51 | size_t l_width, |
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| 52 | size_t tgtid_memc, |
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| 53 | size_t tgtid_xicu, |
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| 54 | size_t tgtid_mdma, |
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| 55 | size_t tgtid_fbuf, |
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| 56 | size_t tgtid_mtty, |
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| 57 | size_t tgtid_brom, |
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| 58 | size_t tgtid_mnic, |
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[475] | 59 | size_t tgtid_chbuf, |
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[345] | 60 | size_t tgtid_bdev, |
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| 61 | size_t memc_ways, |
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| 62 | size_t memc_sets, |
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| 63 | size_t l1_i_ways, |
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| 64 | size_t l1_i_sets, |
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| 65 | size_t l1_d_ways, |
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| 66 | size_t l1_d_sets, |
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| 67 | size_t xram_latency, |
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| 68 | bool io, |
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| 69 | size_t xfb, |
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| 70 | size_t yfb, |
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| 71 | char* disk_name, |
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| 72 | size_t block_size, |
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| 73 | size_t nic_channels, |
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| 74 | char* nic_rx_name, |
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| 75 | char* nic_tx_name, |
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| 76 | uint32_t nic_timeout, |
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[485] | 77 | size_t chbufdma_channels, |
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[345] | 78 | const Loader &loader, |
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| 79 | uint32_t frozen_cycles, |
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| 80 | uint32_t debug_start_cycle, |
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| 81 | bool memc_debug_ok, |
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| 82 | bool proc_debug_ok) |
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| 83 | : soclib::caba::BaseModule(insname), |
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| 84 | p_clk("clk"), |
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| 85 | p_resetn("resetn") |
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| 86 | |
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| 87 | { |
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| 88 | // Vectors of ports definition |
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[468] | 89 | p_cmd_in = alloc_elems<DspinInput<dspin_cmd_width> >("p_cmd_in", 4, 3); |
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| 90 | p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> >("p_cmd_out", 4, 3); |
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[465] | 91 | p_rsp_in = alloc_elems<DspinInput<dspin_rsp_width> >("p_rsp_in", 4, 2); |
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| 92 | p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> >("p_rsp_out", 4, 2); |
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[345] | 93 | |
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[396] | 94 | ///////////////////////////////////////////////////////////////////////////// |
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[428] | 95 | // Components definition |
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[345] | 96 | ///////////////////////////////////////////////////////////////////////////// |
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| 97 | |
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| 98 | for (size_t p = 0; p < nb_procs; p++) |
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[428] | 99 | { |
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[345] | 100 | std::ostringstream sproc; |
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[396] | 101 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
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| 102 | proc[p] = new VciCcVCacheWrapper<vci_param_int, |
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| 103 | dspin_cmd_width, |
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[428] | 104 | dspin_rsp_width, |
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[396] | 105 | GdbServer<Mips32ElIss> >( |
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[345] | 106 | sproc.str().c_str(), |
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| 107 | cluster_id*nb_procs + p, // GLOBAL PROC_ID |
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[428] | 108 | mtd, // Mapping Table |
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[345] | 109 | IntTab(cluster_id,p), // SRCID |
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| 110 | (cluster_id << l_width) + p, // CC_GLOBAL_ID |
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| 111 | 8, // ITLB ways |
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| 112 | 8, // ITLB sets |
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| 113 | 8, // DTLB ways |
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| 114 | 8, // DTLB sets |
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| 115 | l1_i_ways,l1_i_sets,16, // ICACHE size |
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| 116 | l1_d_ways,l1_d_sets,16, // DCACHE size |
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| 117 | 4, // WBUF nlines |
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| 118 | 4, // WBUF nwords |
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| 119 | x_width, |
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| 120 | y_width, |
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| 121 | frozen_cycles, // max frozen cycles |
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| 122 | debug_start_cycle, |
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| 123 | proc_debug_ok); |
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| 124 | |
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| 125 | std::ostringstream swip; |
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[435] | 126 | swip << "wi_proc_" << x_id << "_" << y_id << "_" << p; |
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[396] | 127 | wi_proc[p] = new VciDspinInitiatorWrapper<vci_param_int, |
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| 128 | dspin_cmd_width, |
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| 129 | dspin_rsp_width>( |
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[351] | 130 | swip.str().c_str(), |
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[363] | 131 | x_width + y_width + l_width); |
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[345] | 132 | } |
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| 133 | |
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| 134 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 135 | std::ostringstream smemc; |
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| 136 | smemc << "memc_" << x_id << "_" << y_id; |
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| 137 | memc = new VciMemCache<vci_param_int, |
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| 138 | vci_param_ext, |
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| 139 | dspin_rsp_width, |
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| 140 | dspin_cmd_width>( |
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| 141 | smemc.str().c_str(), |
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[345] | 142 | mtd, // Mapping Table direct space |
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| 143 | mtx, // Mapping Table external space |
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| 144 | IntTab(cluster_id), // SRCID external space |
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| 145 | IntTab(cluster_id, tgtid_memc), // TGTID direct space |
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| 146 | (cluster_id << l_width) + nb_procs, // CC_GLOBAL_ID |
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[504] | 147 | x_width, // Number of x bits in platform |
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| 148 | y_width, // Number of y bits in platform |
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[345] | 149 | memc_ways, memc_sets, 16, // CACHE SIZE |
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| 150 | 3, // MAX NUMBER OF COPIES |
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| 151 | 4096, // HEAP SIZE |
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| 152 | 8, // TRANSACTION TABLE DEPTH |
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| 153 | 8, // UPDATE TABLE DEPTH |
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[468] | 154 | 8, // INVALIDATE TABLE DEPTH |
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[345] | 155 | debug_start_cycle, |
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| 156 | memc_debug_ok ); |
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| 157 | |
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[396] | 158 | wt_memc = new VciDspinTargetWrapper<vci_param_int, |
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| 159 | dspin_cmd_width, |
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| 160 | dspin_rsp_width>( |
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[379] | 161 | "wt_memc", |
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[363] | 162 | x_width + y_width + l_width); |
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[345] | 163 | |
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| 164 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 165 | std::ostringstream sxram; |
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| 166 | sxram << "xram_" << x_id << "_" << y_id; |
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| 167 | xram = new VciSimpleRam<vci_param_ext>( |
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| 168 | sxram.str().c_str(), |
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[345] | 169 | IntTab(cluster_id), |
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| 170 | mtx, |
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| 171 | loader, |
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| 172 | xram_latency); |
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[379] | 173 | |
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[345] | 174 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 175 | std::ostringstream sxicu; |
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| 176 | sxicu << "xicu_" << x_id << "_" << y_id; |
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| 177 | xicu = new VciXicu<vci_param_int>( |
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| 178 | sxicu.str().c_str(), |
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[345] | 179 | mtd, // mapping table |
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| 180 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
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| 181 | nb_procs, // number of timer IRQs |
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| 182 | 32, // number of hard IRQs |
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[389] | 183 | 32, // number of soft IRQs |
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[345] | 184 | nb_procs); // number of output IRQs |
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| 185 | |
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[396] | 186 | wt_xicu = new VciDspinTargetWrapper<vci_param_int, |
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| 187 | dspin_cmd_width, |
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| 188 | dspin_rsp_width>( |
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[379] | 189 | "wt_xicu", |
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[363] | 190 | x_width + y_width + l_width); |
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[345] | 191 | |
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| 192 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 193 | std::ostringstream smdma; |
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| 194 | smdma << "mdma_" << x_id << "_" << y_id; |
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| 195 | mdma = new VciMultiDma<vci_param_int>( |
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| 196 | smdma.str().c_str(), |
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[345] | 197 | mtd, |
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| 198 | IntTab(cluster_id, nb_procs), // SRCID |
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| 199 | IntTab(cluster_id, tgtid_mdma), // TGTID |
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| 200 | 64, // burst size |
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[379] | 201 | nb_dmas); // number of IRQs |
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[345] | 202 | |
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[396] | 203 | wt_mdma = new VciDspinTargetWrapper<vci_param_int, |
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| 204 | dspin_cmd_width, |
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| 205 | dspin_rsp_width>( |
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[379] | 206 | "wt_mdma", |
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[363] | 207 | x_width + y_width + l_width); |
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[345] | 208 | |
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[396] | 209 | wi_mdma = new VciDspinInitiatorWrapper<vci_param_int, |
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| 210 | dspin_cmd_width, |
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| 211 | dspin_rsp_width>( |
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[379] | 212 | "wi_mdma", |
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[363] | 213 | x_width + y_width + l_width); |
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[345] | 214 | |
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| 215 | ///////////////////////////////////////////////////////////////////////////// |
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| 216 | size_t nb_direct_initiators = nb_procs + 1; |
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| 217 | size_t nb_direct_targets = 3; |
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| 218 | if ( io ) |
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| 219 | { |
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[475] | 220 | nb_direct_initiators = nb_procs + 3; |
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| 221 | nb_direct_targets = 9; |
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[345] | 222 | } |
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| 223 | |
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[396] | 224 | xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>( |
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[379] | 225 | "xbar_cmd_d", |
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[345] | 226 | mtd, // mapping table |
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| 227 | x_id, y_id, // cluster coordinates |
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| 228 | x_width, y_width, l_width, |
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| 229 | nb_direct_initiators, // number of local of sources |
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[435] | 230 | nb_direct_targets, // number of local dests |
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| 231 | 2, 2, // fifo depths |
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| 232 | true, // CMD |
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| 233 | true, // use local routing table |
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| 234 | false ); // no broadcast |
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[345] | 235 | |
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| 236 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 237 | xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>( |
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[379] | 238 | "xbar_rsp_d", |
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[345] | 239 | mtd, // mapping table |
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| 240 | x_id, y_id, // cluster coordinates |
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| 241 | x_width, y_width, l_width, |
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[428] | 242 | nb_direct_targets, // number of local sources |
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[345] | 243 | nb_direct_initiators, // number of local dests |
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[435] | 244 | 2, 2, // fifo depths |
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| 245 | false, // RSP |
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| 246 | false, // don't use local routing table |
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| 247 | false ); // no broadcast |
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[345] | 248 | |
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| 249 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 250 | xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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[379] | 251 | "xbar_m2p_c", |
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[345] | 252 | mtd, // mapping table |
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| 253 | x_id, y_id, // cluster coordinates |
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| 254 | x_width, y_width, l_width, |
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| 255 | 1, // number of local sources |
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[435] | 256 | nb_procs, // number of local targets |
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[428] | 257 | 2, 2, // fifo depths |
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[435] | 258 | true, // CMD |
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[345] | 259 | false, // don't use local routing table |
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[435] | 260 | true ); // broadcast |
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[345] | 261 | |
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| 262 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 263 | xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>( |
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[379] | 264 | "xbar_p2m_c", |
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[345] | 265 | mtd, // mapping table |
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| 266 | x_id, y_id, // cluster coordinates |
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[379] | 267 | x_width, y_width, 0, // l_width unused on p2m network |
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[345] | 268 | nb_procs, // number of local sources |
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| 269 | 1, // number of local dests |
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[428] | 270 | 2, 2, // fifo depths |
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[435] | 271 | false, // RSP |
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[345] | 272 | false, // don't use local routing table |
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[435] | 273 | false ); // no broadcast |
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[345] | 274 | |
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| 275 | ///////////////////////////////////////////////////////////////////////////// |
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[468] | 276 | xbar_clack_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 277 | "xbar_clack_c", |
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| 278 | mtd, // mapping table |
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| 279 | x_id, y_id, // cluster coordinates |
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| 280 | x_width, y_width, l_width, |
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| 281 | 1, // number of local sources |
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| 282 | nb_procs, // number of local targets |
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| 283 | 1, 1, // fifo depths |
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| 284 | true, // CMD |
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| 285 | false, // don't use local routing table |
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| 286 | false); // broadcast |
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| 287 | |
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| 288 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 289 | router_cmd = new VirtualDspinRouter<dspin_cmd_width>( |
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[379] | 290 | "router_cmd", |
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[345] | 291 | x_id,y_id, // coordinate in the mesh |
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| 292 | x_width, y_width, // x & y fields width |
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[468] | 293 | 3, // nb virtual channels |
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[345] | 294 | 4,4); // input & output fifo depths |
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| 295 | |
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| 296 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 297 | router_rsp = new VirtualDspinRouter<dspin_rsp_width>( |
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[379] | 298 | "router_rsp", |
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[345] | 299 | x_id,y_id, // coordinates in mesh |
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| 300 | x_width, y_width, // x & y fields width |
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[465] | 301 | 2, // nb virtual channels |
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[345] | 302 | 4,4); // input & output fifo depths |
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| 303 | |
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| 304 | // IO cluster components |
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| 305 | if ( io ) |
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| 306 | { |
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| 307 | ///////////////////////////////////////////// |
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[435] | 308 | brom = new VciSimpleRom<vci_param_int>( |
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[396] | 309 | "brom", |
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| 310 | IntTab(cluster_id, tgtid_brom), |
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| 311 | mtd, |
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| 312 | loader); |
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[345] | 313 | |
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[396] | 314 | wt_brom = new VciDspinTargetWrapper<vci_param_int, |
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| 315 | dspin_cmd_width, |
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| 316 | dspin_rsp_width>( |
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| 317 | "wt_brom", |
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[363] | 318 | x_width + y_width + l_width); |
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[345] | 319 | |
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| 320 | ///////////////////////////////////////////// |
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[396] | 321 | fbuf = new VciFrameBuffer<vci_param_int>( |
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| 322 | "fbuf", |
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| 323 | IntTab(cluster_id, tgtid_fbuf), |
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| 324 | mtd, |
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[428] | 325 | xfb, yfb); |
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[345] | 326 | |
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[396] | 327 | wt_fbuf = new VciDspinTargetWrapper<vci_param_int, |
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| 328 | dspin_cmd_width, |
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| 329 | dspin_rsp_width>( |
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| 330 | "wt_fbuf", |
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[363] | 331 | x_width + y_width + l_width); |
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[345] | 332 | |
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| 333 | ///////////////////////////////////////////// |
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[396] | 334 | bdev = new VciBlockDeviceTsar<vci_param_int>( |
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| 335 | "bdev", |
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| 336 | mtd, |
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| 337 | IntTab(cluster_id, nb_procs+1), |
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| 338 | IntTab(cluster_id, tgtid_bdev), |
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| 339 | disk_name, |
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| 340 | block_size, |
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| 341 | 64); // burst size |
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[345] | 342 | |
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[396] | 343 | wt_bdev = new VciDspinTargetWrapper<vci_param_int, |
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| 344 | dspin_cmd_width, |
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| 345 | dspin_rsp_width>( |
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| 346 | "wt_bdev", |
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[363] | 347 | x_width + y_width + l_width); |
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[396] | 348 | |
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| 349 | wi_bdev = new VciDspinInitiatorWrapper<vci_param_int, |
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| 350 | dspin_cmd_width, |
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| 351 | dspin_rsp_width>( |
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| 352 | "wi_bdev", |
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[363] | 353 | x_width + y_width + l_width); |
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[345] | 354 | |
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| 355 | ///////////////////////////////////////////// |
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[475] | 356 | int mac = 0xBEEF0000; |
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[396] | 357 | mnic = new VciMultiNic<vci_param_int>( |
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| 358 | "mnic", |
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| 359 | IntTab(cluster_id, tgtid_mnic), |
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| 360 | mtd, |
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| 361 | nic_channels, |
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| 362 | nic_rx_name, |
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| 363 | nic_tx_name, |
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[475] | 364 | mac, // mac_4 address |
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| 365 | 0xBABE ); // mac_2 address |
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[345] | 366 | |
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[396] | 367 | wt_mnic = new VciDspinTargetWrapper<vci_param_int, |
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| 368 | dspin_cmd_width, |
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| 369 | dspin_rsp_width>( |
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| 370 | "wt_mnic", |
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[363] | 371 | x_width + y_width + l_width); |
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[345] | 372 | |
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| 373 | ///////////////////////////////////////////// |
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[475] | 374 | chbuf = new VciChbufDma<vci_param_int>( |
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| 375 | "chbuf_dma", |
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| 376 | mtd, |
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| 377 | IntTab(cluster_id, nb_procs + 2), |
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| 378 | IntTab(cluster_id, tgtid_chbuf), |
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| 379 | 64, |
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[485] | 380 | chbufdma_channels); |
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[475] | 381 | |
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| 382 | wt_chbuf = new VciDspinTargetWrapper<vci_param_int, |
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| 383 | dspin_cmd_width, |
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| 384 | dspin_rsp_width>( |
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| 385 | "wt_chbuf", |
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| 386 | x_width + y_width + l_width); |
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| 387 | |
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| 388 | wi_chbuf = new VciDspinInitiatorWrapper<vci_param_int, |
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| 389 | dspin_cmd_width, |
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| 390 | dspin_rsp_width>( |
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| 391 | "wi_chbuf", |
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| 392 | x_width + y_width + l_width); |
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| 393 | |
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| 394 | ///////////////////////////////////////////// |
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[345] | 395 | std::vector<std::string> vect_names; |
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| 396 | for( size_t tid = 0 ; tid < (nb_ttys) ; tid++ ) |
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| 397 | { |
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| 398 | std::ostringstream term_name; |
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| 399 | term_name << "term" << tid; |
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| 400 | vect_names.push_back(term_name.str().c_str()); |
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| 401 | } |
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[396] | 402 | mtty = new VciMultiTty<vci_param_int>( |
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| 403 | "mtty", |
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| 404 | IntTab(cluster_id, tgtid_mtty), |
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[428] | 405 | mtd, |
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[396] | 406 | vect_names); |
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[345] | 407 | |
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[396] | 408 | wt_mtty = new VciDspinTargetWrapper<vci_param_int, |
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| 409 | dspin_cmd_width, |
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| 410 | dspin_rsp_width>( |
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| 411 | "wt_mtty", |
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[363] | 412 | x_width + y_width + l_width); |
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[345] | 413 | } |
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| 414 | |
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| 415 | //////////////////////////////////// |
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| 416 | // Connections are defined here |
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| 417 | //////////////////////////////////// |
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| 418 | |
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| 419 | //////////////////////// CMD ROUTER and RSP ROUTER |
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| 420 | router_cmd->p_clk (this->p_clk); |
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| 421 | router_cmd->p_resetn (this->p_resetn); |
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| 422 | router_rsp->p_clk (this->p_clk); |
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| 423 | router_rsp->p_resetn (this->p_resetn); |
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[465] | 424 | |
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| 425 | for(int i = 0; i < 4; i++) |
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[345] | 426 | { |
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[468] | 427 | for (int k = 0; k < 3; k++) |
---|
[345] | 428 | { |
---|
[465] | 429 | router_cmd->p_out[i][k] (this->p_cmd_out[i][k]); |
---|
| 430 | router_cmd->p_in[i][k] (this->p_cmd_in[i][k]); |
---|
[468] | 431 | } |
---|
| 432 | |
---|
| 433 | for (int k = 0; k < 2; k++) |
---|
| 434 | { |
---|
[465] | 435 | router_rsp->p_out[i][k] (this->p_rsp_out[i][k]); |
---|
| 436 | router_rsp->p_in[i][k] (this->p_rsp_in[i][k]); |
---|
[345] | 437 | } |
---|
| 438 | } |
---|
| 439 | |
---|
[465] | 440 | router_cmd->p_out[4][0] (signal_dspin_cmd_g2l_d); |
---|
| 441 | router_cmd->p_out[4][1] (signal_dspin_m2p_g2l_c); |
---|
[468] | 442 | router_cmd->p_out[4][2] (signal_dspin_clack_g2l_c); |
---|
[465] | 443 | router_cmd->p_in[4][0] (signal_dspin_cmd_l2g_d); |
---|
| 444 | router_cmd->p_in[4][1] (signal_dspin_m2p_l2g_c); |
---|
[468] | 445 | router_cmd->p_in[4][2] (signal_dspin_clack_l2g_c); |
---|
[345] | 446 | |
---|
[465] | 447 | router_rsp->p_out[4][0] (signal_dspin_rsp_g2l_d); |
---|
| 448 | router_rsp->p_out[4][1] (signal_dspin_p2m_g2l_c); |
---|
| 449 | router_rsp->p_in[4][0] (signal_dspin_rsp_l2g_d); |
---|
| 450 | router_rsp->p_in[4][1] (signal_dspin_p2m_l2g_c); |
---|
[345] | 451 | |
---|
[468] | 452 | |
---|
[345] | 453 | std::cout << " - CMD & RSP routers connected" << std::endl; |
---|
| 454 | |
---|
| 455 | ///////////////////// CMD DSPIN local crossbar direct |
---|
| 456 | xbar_cmd_d->p_clk (this->p_clk); |
---|
| 457 | xbar_cmd_d->p_resetn (this->p_resetn); |
---|
| 458 | xbar_cmd_d->p_global_out (signal_dspin_cmd_l2g_d); |
---|
| 459 | xbar_cmd_d->p_global_in (signal_dspin_cmd_g2l_d); |
---|
| 460 | |
---|
| 461 | xbar_cmd_d->p_local_out[tgtid_memc] (signal_dspin_cmd_memc_t); |
---|
| 462 | xbar_cmd_d->p_local_out[tgtid_xicu] (signal_dspin_cmd_xicu_t); |
---|
| 463 | xbar_cmd_d->p_local_out[tgtid_mdma] (signal_dspin_cmd_mdma_t); |
---|
| 464 | |
---|
| 465 | xbar_cmd_d->p_local_in[nb_procs] (signal_dspin_cmd_mdma_i); |
---|
| 466 | |
---|
| 467 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 468 | xbar_cmd_d->p_local_in[p] (signal_dspin_cmd_proc_i[p]); |
---|
| 469 | |
---|
| 470 | if ( io ) |
---|
| 471 | { |
---|
| 472 | xbar_cmd_d->p_local_out[tgtid_mtty] (signal_dspin_cmd_mtty_t); |
---|
| 473 | xbar_cmd_d->p_local_out[tgtid_brom] (signal_dspin_cmd_brom_t); |
---|
| 474 | xbar_cmd_d->p_local_out[tgtid_bdev] (signal_dspin_cmd_bdev_t); |
---|
| 475 | xbar_cmd_d->p_local_out[tgtid_fbuf] (signal_dspin_cmd_fbuf_t); |
---|
| 476 | xbar_cmd_d->p_local_out[tgtid_mnic] (signal_dspin_cmd_mnic_t); |
---|
[475] | 477 | xbar_cmd_d->p_local_out[tgtid_chbuf] (signal_dspin_cmd_chbuf_t); |
---|
[345] | 478 | |
---|
| 479 | xbar_cmd_d->p_local_in[nb_procs+1] (signal_dspin_cmd_bdev_i); |
---|
[475] | 480 | xbar_cmd_d->p_local_in[nb_procs+2] (signal_dspin_cmd_chbuf_i); |
---|
[345] | 481 | } |
---|
| 482 | |
---|
| 483 | std::cout << " - Command Direct crossbar connected" << std::endl; |
---|
| 484 | |
---|
| 485 | //////////////////////// RSP DSPIN local crossbar direct |
---|
| 486 | xbar_rsp_d->p_clk (this->p_clk); |
---|
| 487 | xbar_rsp_d->p_resetn (this->p_resetn); |
---|
| 488 | xbar_rsp_d->p_global_out (signal_dspin_rsp_l2g_d); |
---|
| 489 | xbar_rsp_d->p_global_in (signal_dspin_rsp_g2l_d); |
---|
| 490 | |
---|
| 491 | xbar_rsp_d->p_local_in[tgtid_memc] (signal_dspin_rsp_memc_t); |
---|
| 492 | xbar_rsp_d->p_local_in[tgtid_xicu] (signal_dspin_rsp_xicu_t); |
---|
| 493 | xbar_rsp_d->p_local_in[tgtid_mdma] (signal_dspin_rsp_mdma_t); |
---|
| 494 | |
---|
| 495 | xbar_rsp_d->p_local_out[nb_procs] (signal_dspin_rsp_mdma_i); |
---|
| 496 | |
---|
| 497 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 498 | xbar_rsp_d->p_local_out[p] (signal_dspin_rsp_proc_i[p]); |
---|
| 499 | |
---|
| 500 | if ( io ) |
---|
| 501 | { |
---|
| 502 | xbar_rsp_d->p_local_in[tgtid_mtty] (signal_dspin_rsp_mtty_t); |
---|
| 503 | xbar_rsp_d->p_local_in[tgtid_brom] (signal_dspin_rsp_brom_t); |
---|
| 504 | xbar_rsp_d->p_local_in[tgtid_bdev] (signal_dspin_rsp_bdev_t); |
---|
| 505 | xbar_rsp_d->p_local_in[tgtid_fbuf] (signal_dspin_rsp_fbuf_t); |
---|
| 506 | xbar_rsp_d->p_local_in[tgtid_mnic] (signal_dspin_rsp_mnic_t); |
---|
[475] | 507 | xbar_rsp_d->p_local_in[tgtid_chbuf] (signal_dspin_rsp_chbuf_t); |
---|
[345] | 508 | |
---|
| 509 | xbar_rsp_d->p_local_out[nb_procs+1] (signal_dspin_rsp_bdev_i); |
---|
[475] | 510 | xbar_rsp_d->p_local_out[nb_procs+2] (signal_dspin_rsp_chbuf_i); |
---|
[345] | 511 | } |
---|
| 512 | |
---|
| 513 | std::cout << " - Response Direct crossbar connected" << std::endl; |
---|
| 514 | |
---|
| 515 | ////////////////////// M2P DSPIN local crossbar coherence |
---|
| 516 | xbar_m2p_c->p_clk (this->p_clk); |
---|
| 517 | xbar_m2p_c->p_resetn (this->p_resetn); |
---|
| 518 | xbar_m2p_c->p_global_out (signal_dspin_m2p_l2g_c); |
---|
| 519 | xbar_m2p_c->p_global_in (signal_dspin_m2p_g2l_c); |
---|
[360] | 520 | xbar_m2p_c->p_local_in[0] (signal_dspin_m2p_memc); |
---|
[428] | 521 | for (size_t p = 0; p < nb_procs; p++) |
---|
[345] | 522 | xbar_m2p_c->p_local_out[p] (signal_dspin_m2p_proc[p]); |
---|
| 523 | |
---|
| 524 | std::cout << " - M2P Coherence crossbar connected" << std::endl; |
---|
| 525 | |
---|
[468] | 526 | ////////////////////// CLACK DSPIN local crossbar coherence |
---|
| 527 | xbar_clack_c->p_clk (this->p_clk); |
---|
| 528 | xbar_clack_c->p_resetn (this->p_resetn); |
---|
| 529 | xbar_clack_c->p_global_out (signal_dspin_clack_l2g_c); |
---|
| 530 | xbar_clack_c->p_global_in (signal_dspin_clack_g2l_c); |
---|
| 531 | xbar_clack_c->p_local_in[0] (signal_dspin_clack_memc); |
---|
| 532 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 533 | xbar_clack_c->p_local_out[p] (signal_dspin_clack_proc[p]); |
---|
| 534 | |
---|
| 535 | std::cout << " - Clack Coherence crossbar connected" << std::endl; |
---|
| 536 | |
---|
[345] | 537 | ////////////////////////// P2M DSPIN local crossbar coherence |
---|
| 538 | xbar_p2m_c->p_clk (this->p_clk); |
---|
| 539 | xbar_p2m_c->p_resetn (this->p_resetn); |
---|
| 540 | xbar_p2m_c->p_global_out (signal_dspin_p2m_l2g_c); |
---|
| 541 | xbar_p2m_c->p_global_in (signal_dspin_p2m_g2l_c); |
---|
[360] | 542 | xbar_p2m_c->p_local_out[0] (signal_dspin_p2m_memc); |
---|
[428] | 543 | for (size_t p = 0; p < nb_procs; p++) |
---|
[345] | 544 | xbar_p2m_c->p_local_in[p] (signal_dspin_p2m_proc[p]); |
---|
| 545 | |
---|
| 546 | std::cout << " - P2M Coherence crossbar connected" << std::endl; |
---|
| 547 | |
---|
| 548 | |
---|
| 549 | //////////////////////////////////// Processors |
---|
| 550 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 551 | { |
---|
| 552 | proc[p]->p_clk (this->p_clk); |
---|
| 553 | proc[p]->p_resetn (this->p_resetn); |
---|
| 554 | proc[p]->p_vci (signal_vci_ini_proc[p]); |
---|
[468] | 555 | proc[p]->p_dspin_m2p (signal_dspin_m2p_proc[p]); |
---|
| 556 | proc[p]->p_dspin_p2m (signal_dspin_p2m_proc[p]); |
---|
| 557 | proc[p]->p_dspin_clack (signal_dspin_clack_proc[p]); |
---|
[345] | 558 | proc[p]->p_irq[0] (signal_proc_it[p]); |
---|
| 559 | for ( size_t j = 1 ; j < 6 ; j++) |
---|
| 560 | { |
---|
| 561 | proc[p]->p_irq[j] (signal_false); |
---|
| 562 | } |
---|
| 563 | |
---|
| 564 | wi_proc[p]->p_clk (this->p_clk); |
---|
| 565 | wi_proc[p]->p_resetn (this->p_resetn); |
---|
| 566 | wi_proc[p]->p_dspin_cmd (signal_dspin_cmd_proc_i[p]); |
---|
| 567 | wi_proc[p]->p_dspin_rsp (signal_dspin_rsp_proc_i[p]); |
---|
| 568 | wi_proc[p]->p_vci (signal_vci_ini_proc[p]); |
---|
| 569 | } |
---|
| 570 | |
---|
| 571 | std::cout << " - Processors connected" << std::endl; |
---|
| 572 | |
---|
| 573 | ///////////////////////////////////// XICU |
---|
[428] | 574 | xicu->p_clk (this->p_clk); |
---|
| 575 | xicu->p_resetn (this->p_resetn); |
---|
| 576 | xicu->p_vci (signal_vci_tgt_xicu); |
---|
[345] | 577 | for ( size_t p=0 ; p<nb_procs ; p++) |
---|
| 578 | { |
---|
[428] | 579 | xicu->p_irq[p] (signal_proc_it[p]); |
---|
[345] | 580 | } |
---|
| 581 | for ( size_t i=0 ; i<32 ; i++) |
---|
| 582 | { |
---|
| 583 | if ( io ) // I/O cluster |
---|
| 584 | { |
---|
| 585 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
[428] | 586 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
---|
[345] | 587 | else if (i < 16) xicu->p_hwi[i] (signal_false); |
---|
| 588 | else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i-16]); |
---|
[428] | 589 | else if (i < 31) xicu->p_hwi[i] (signal_false); |
---|
[345] | 590 | else xicu->p_hwi[i] (signal_irq_bdev); |
---|
| 591 | } |
---|
| 592 | else // other clusters |
---|
| 593 | { |
---|
| 594 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
[428] | 595 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
---|
| 596 | else xicu->p_hwi[i] (signal_false); |
---|
[345] | 597 | } |
---|
| 598 | } |
---|
| 599 | |
---|
| 600 | // wrapper XICU |
---|
[360] | 601 | wt_xicu->p_clk (this->p_clk); |
---|
| 602 | wt_xicu->p_resetn (this->p_resetn); |
---|
| 603 | wt_xicu->p_dspin_cmd (signal_dspin_cmd_xicu_t); |
---|
| 604 | wt_xicu->p_dspin_rsp (signal_dspin_rsp_xicu_t); |
---|
| 605 | wt_xicu->p_vci (signal_vci_tgt_xicu); |
---|
[345] | 606 | |
---|
| 607 | std::cout << " - XICU connected" << std::endl; |
---|
| 608 | |
---|
| 609 | //////////////////////////////////////////////// MEMC |
---|
[428] | 610 | memc->p_clk (this->p_clk); |
---|
| 611 | memc->p_resetn (this->p_resetn); |
---|
| 612 | memc->p_vci_ixr (signal_vci_xram); |
---|
| 613 | memc->p_vci_tgt (signal_vci_tgt_memc); |
---|
[468] | 614 | memc->p_dspin_p2m (signal_dspin_p2m_memc); |
---|
| 615 | memc->p_dspin_m2p (signal_dspin_m2p_memc); |
---|
| 616 | memc->p_dspin_clack (signal_dspin_clack_memc); |
---|
[345] | 617 | |
---|
| 618 | // wrapper MEMC |
---|
[360] | 619 | wt_memc->p_clk (this->p_clk); |
---|
| 620 | wt_memc->p_resetn (this->p_resetn); |
---|
| 621 | wt_memc->p_dspin_cmd (signal_dspin_cmd_memc_t); |
---|
| 622 | wt_memc->p_dspin_rsp (signal_dspin_rsp_memc_t); |
---|
| 623 | wt_memc->p_vci (signal_vci_tgt_memc); |
---|
[345] | 624 | |
---|
| 625 | std::cout << " - MEMC connected" << std::endl; |
---|
| 626 | |
---|
| 627 | /////////////////////////////////////////////// XRAM |
---|
[428] | 628 | xram->p_clk (this->p_clk); |
---|
| 629 | xram->p_resetn (this->p_resetn); |
---|
| 630 | xram->p_vci (signal_vci_xram); |
---|
[345] | 631 | |
---|
| 632 | std::cout << " - XRAM connected" << std::endl; |
---|
| 633 | |
---|
[360] | 634 | ////////////////////////////////////////////// MDMA |
---|
[428] | 635 | mdma->p_clk (this->p_clk); |
---|
| 636 | mdma->p_resetn (this->p_resetn); |
---|
| 637 | mdma->p_vci_target (signal_vci_tgt_mdma); |
---|
| 638 | mdma->p_vci_initiator (signal_vci_ini_mdma); |
---|
[345] | 639 | for (size_t i=0 ; i<nb_dmas ; i++) |
---|
| 640 | mdma->p_irq[i] (signal_irq_mdma[i]); |
---|
| 641 | |
---|
[360] | 642 | // wrapper tgt MDMA |
---|
| 643 | wt_mdma->p_clk (this->p_clk); |
---|
| 644 | wt_mdma->p_resetn (this->p_resetn); |
---|
| 645 | wt_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_t); |
---|
| 646 | wt_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_t); |
---|
| 647 | wt_mdma->p_vci (signal_vci_tgt_mdma); |
---|
| 648 | |
---|
| 649 | // wrapper ini MDMA |
---|
| 650 | wi_mdma->p_clk (this->p_clk); |
---|
| 651 | wi_mdma->p_resetn (this->p_resetn); |
---|
| 652 | wi_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_i); |
---|
| 653 | wi_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_i); |
---|
| 654 | wi_mdma->p_vci (signal_vci_ini_mdma); |
---|
| 655 | |
---|
[345] | 656 | std::cout << " - MDMA connected" << std::endl; |
---|
| 657 | |
---|
[428] | 658 | /////////////////////////////// Components in I/O cluster |
---|
[345] | 659 | |
---|
[428] | 660 | if ( io ) |
---|
| 661 | { |
---|
| 662 | // BDEV |
---|
| 663 | bdev->p_clk (this->p_clk); |
---|
[345] | 664 | bdev->p_resetn (this->p_resetn); |
---|
| 665 | bdev->p_irq (signal_irq_bdev); |
---|
| 666 | bdev->p_vci_target (signal_vci_tgt_bdev); |
---|
| 667 | bdev->p_vci_initiator (signal_vci_ini_bdev); |
---|
| 668 | |
---|
[360] | 669 | // wrapper tgt BDEV |
---|
| 670 | wt_bdev->p_clk (this->p_clk); |
---|
| 671 | wt_bdev->p_resetn (this->p_resetn); |
---|
| 672 | wt_bdev->p_dspin_cmd (signal_dspin_cmd_bdev_t); |
---|
| 673 | wt_bdev->p_dspin_rsp (signal_dspin_rsp_bdev_t); |
---|
| 674 | wt_bdev->p_vci (signal_vci_tgt_bdev); |
---|
| 675 | |
---|
| 676 | // wrapper ini BDEV |
---|
| 677 | wi_bdev->p_clk (this->p_clk); |
---|
| 678 | wi_bdev->p_resetn (this->p_resetn); |
---|
| 679 | wi_bdev->p_dspin_cmd (signal_dspin_cmd_bdev_i); |
---|
| 680 | wi_bdev->p_dspin_rsp (signal_dspin_rsp_bdev_i); |
---|
| 681 | wi_bdev->p_vci (signal_vci_ini_bdev); |
---|
| 682 | |
---|
[345] | 683 | std::cout << " - BDEV connected" << std::endl; |
---|
| 684 | |
---|
| 685 | // FBUF |
---|
| 686 | fbuf->p_clk (this->p_clk); |
---|
| 687 | fbuf->p_resetn (this->p_resetn); |
---|
| 688 | fbuf->p_vci (signal_vci_tgt_fbuf); |
---|
| 689 | |
---|
[360] | 690 | // wrapper tgt FBUF |
---|
| 691 | wt_fbuf->p_clk (this->p_clk); |
---|
| 692 | wt_fbuf->p_resetn (this->p_resetn); |
---|
| 693 | wt_fbuf->p_dspin_cmd (signal_dspin_cmd_fbuf_t); |
---|
| 694 | wt_fbuf->p_dspin_rsp (signal_dspin_rsp_fbuf_t); |
---|
| 695 | wt_fbuf->p_vci (signal_vci_tgt_fbuf); |
---|
| 696 | |
---|
[345] | 697 | std::cout << " - FBUF connected" << std::endl; |
---|
| 698 | |
---|
| 699 | // MNIC |
---|
| 700 | mnic->p_clk (this->p_clk); |
---|
| 701 | mnic->p_resetn (this->p_resetn); |
---|
| 702 | mnic->p_vci (signal_vci_tgt_mnic); |
---|
| 703 | for ( size_t i=0 ; i<nic_channels ; i++ ) |
---|
| 704 | { |
---|
| 705 | mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); |
---|
| 706 | mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); |
---|
| 707 | } |
---|
| 708 | |
---|
[360] | 709 | // wrapper tgt MNIC |
---|
| 710 | wt_mnic->p_clk (this->p_clk); |
---|
| 711 | wt_mnic->p_resetn (this->p_resetn); |
---|
| 712 | wt_mnic->p_dspin_cmd (signal_dspin_cmd_mnic_t); |
---|
| 713 | wt_mnic->p_dspin_rsp (signal_dspin_rsp_mnic_t); |
---|
| 714 | wt_mnic->p_vci (signal_vci_tgt_mnic); |
---|
| 715 | |
---|
[345] | 716 | std::cout << " - MNIC connected" << std::endl; |
---|
| 717 | |
---|
[475] | 718 | // CHBUF |
---|
| 719 | chbuf->p_clk (this->p_clk); |
---|
| 720 | chbuf->p_resetn (this->p_resetn); |
---|
| 721 | chbuf->p_vci_target (signal_vci_tgt_chbuf); |
---|
| 722 | chbuf->p_vci_initiator (signal_vci_ini_chbuf); |
---|
[485] | 723 | for ( size_t i=0 ; i < chbufdma_channels ; i++ ) |
---|
[475] | 724 | { |
---|
| 725 | chbuf->p_irq[i] (signal_irq_chbuf[i]); |
---|
| 726 | } |
---|
| 727 | |
---|
| 728 | // wrapper tgt CHBUF |
---|
| 729 | wt_chbuf->p_clk (this->p_clk); |
---|
| 730 | wt_chbuf->p_resetn (this->p_resetn); |
---|
| 731 | wt_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_t); |
---|
| 732 | wt_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_t); |
---|
| 733 | wt_chbuf->p_vci (signal_vci_tgt_chbuf); |
---|
| 734 | |
---|
| 735 | // wrapper ini CHBUF |
---|
| 736 | wi_chbuf->p_clk (this->p_clk); |
---|
| 737 | wi_chbuf->p_resetn (this->p_resetn); |
---|
| 738 | wi_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_i); |
---|
| 739 | wi_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_i); |
---|
| 740 | wi_chbuf->p_vci (signal_vci_ini_chbuf); |
---|
| 741 | |
---|
| 742 | std::cout << " - CHBUF connected" << std::endl; |
---|
| 743 | |
---|
[345] | 744 | // BROM |
---|
| 745 | brom->p_clk (this->p_clk); |
---|
| 746 | brom->p_resetn (this->p_resetn); |
---|
| 747 | brom->p_vci (signal_vci_tgt_brom); |
---|
| 748 | |
---|
[360] | 749 | // wrapper tgt BROM |
---|
| 750 | wt_brom->p_clk (this->p_clk); |
---|
| 751 | wt_brom->p_resetn (this->p_resetn); |
---|
| 752 | wt_brom->p_dspin_cmd (signal_dspin_cmd_brom_t); |
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| 753 | wt_brom->p_dspin_rsp (signal_dspin_rsp_brom_t); |
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| 754 | wt_brom->p_vci (signal_vci_tgt_brom); |
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| 755 | |
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[345] | 756 | std::cout << " - BROM connected" << std::endl; |
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| 757 | |
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| 758 | // MTTY |
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| 759 | mtty->p_clk (this->p_clk); |
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| 760 | mtty->p_resetn (this->p_resetn); |
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| 761 | mtty->p_vci (signal_vci_tgt_mtty); |
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| 762 | for ( size_t i=0 ; i<nb_ttys ; i++ ) |
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| 763 | { |
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[428] | 764 | mtty->p_irq[i] (signal_irq_mtty[i]); |
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[345] | 765 | } |
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| 766 | |
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[360] | 767 | // wrapper tgt MTTY |
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| 768 | wt_mtty->p_clk (this->p_clk); |
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| 769 | wt_mtty->p_resetn (this->p_resetn); |
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| 770 | wt_mtty->p_dspin_cmd (signal_dspin_cmd_mtty_t); |
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| 771 | wt_mtty->p_dspin_rsp (signal_dspin_rsp_mtty_t); |
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| 772 | wt_mtty->p_vci (signal_vci_tgt_mtty); |
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| 773 | |
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[345] | 774 | std::cout << " - MTTY connected" << std::endl; |
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| 775 | } |
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| 776 | } // end constructor |
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| 777 | |
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[396] | 778 | }} |
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[345] | 779 | |
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| 780 | // Local Variables: |
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| 781 | // tab-width: 3 |
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| 782 | // c-basic-offset: 3 |
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| 783 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 784 | // indent-tabs-mode: nil |
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| 785 | // End: |
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| 786 | |
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| 787 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
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| 788 | |
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| 789 | |
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| 790 | |
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