1 | \author: Cesar Fuguet |
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2 | \date : July 24, 2014 |
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3 | |
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4 | TSAR BOOT-LOADER |
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5 | |
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6 | Files: |
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7 | src/ Source files |
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8 | The entry point of this boot loader is the file reset.S |
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9 | |
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10 | include/ Header files |
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11 | |
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12 | driver/ Drivers source files and headers |
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13 | |
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14 | conf/ Platform specific files |
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15 | |
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16 | For each platform, we must define a new directory. |
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17 | Mandatory files: |
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18 | |
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19 | - hard_config.h (can be generated using giet-vm genmap tool) |
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20 | |
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21 | This file contains all physical segments addresses and sizes of |
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22 | the hardware platform. It also contains other configuration |
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23 | definitions as the disk controller type, mesh size, etc. |
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24 | Examples can be found in the conf/ directory. |
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25 | |
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26 | Optional files: |
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27 | |
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28 | - platform.dts (platform device tree) |
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29 | |
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30 | Makefile Makefile to compile the boot loader. |
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31 | Mandatory arguments: |
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32 | |
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33 | - HARD_CONFIG_PATH=<platform_dir> |
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34 | |
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35 | Defines the directory where to find the hard_config.h file |
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36 | |
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37 | Optional arguments: |
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38 | |
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39 | - USE_DT=<value> |
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40 | |
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41 | Value can be 1 or 0. If a device tree file is not used, set |
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42 | this flag to 0. It is set by default to 1. |
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43 | |
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44 | - SYSTEM_CLK=<platform clock frequency> |
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45 | |
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46 | Platform clock frequency in KHz |
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47 | |
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48 | - DTS=<file.dts> |
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49 | |
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50 | Platform device tree (by default is platform.dts) |
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51 | |
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52 | Important characteristics of this preloader: |
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53 | |
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54 | - Processor 0 performs loading of Operating System Boot Loader which must |
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55 | be an ELF file located at the third block of the disk. |
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56 | |
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57 | - Other processors wait to be waken up through an interruption generated |
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58 | from a XICU mailbox. Each processor other than 0 has its own mailbox |
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59 | in the local XICU. |
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60 | |
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61 | - Stack allocation is only made for processor 0. The loaded Operating System |
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62 | boot loader or kernel must perform stack allocation for other processors. |
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63 | |
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64 | - Stack for processor 0 is allocated at the end of RAM segment in the cluster |
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65 | (0,0). |
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66 | |
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67 | Examples: |
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68 | |
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69 | make HARD_CONFIG_PATH=<platform_dir> USE_DT=0 |
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70 | |
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71 | Compile for <platform_dir> and do not compile device tree file |
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72 | |
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73 | make HARD_CONFIG_PATH=<platform_dir> DTS=platform_fpga.dts SYSTEM_CLK=25000 |
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74 | |
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75 | Compile for <platform_dir> and compile the 'platform_dpga.dts' |
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76 | device tree file. System clock frequency is 25 MHz |
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77 | |
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78 | make HARD_CONFIG_PATH=<platform_conf> SYSTEM_CLK=25000 |
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79 | |
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80 | Compile for <platform_dir> and compile the 'platform.dts' |
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81 | device tree file (default name). System clock frequency is 25 MHz |
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82 | |
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