- Timestamp:
- Jun 16, 2015, 9:24:36 PM (10 years ago)
- Location:
- branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source
- Files:
-
- 2 edited
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branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r963 r1001 53 53 sc_in<bool> p_resetn; 54 54 55 sc_in<bool> p_false; 56 55 57 // Thes two ports are used to connect IOB to IOX nework in top cell 56 58 soclib::caba::VciInitiator<vci_param_ext>* p_vci_iob_iox_ini; … … 69 71 70 72 // interrupt signals 71 sc_signal<bool> signal_false;72 73 sc_signal<bool> signal_proc_it[16]; 73 74 sc_signal<bool> signal_irq_mdma[8]; … … 75 76 sc_signal<uint32_t> signal_cfg_router_cmd[3]; 76 77 sc_signal<uint32_t> signal_cfg_router_rsp[2]; 78 sc_signal<uint32_t> signal_cfg_xbar_barrier; 77 79 78 80 // INT network DSPIN signals between DSPIN routers and DSPIN local_crossbars -
branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r1000 r1001 93 93 soclib::caba::BaseModule(insname), 94 94 p_clk("clk"), 95 p_resetn("resetn") 95 p_resetn("resetn"), 96 p_false("false") 96 97 { 97 98 … … 201 202 xcu_nb_wti, // number of soft IRQs 202 203 xcu_nb_out, // number of output IRQs 203 5); // number of config regs204 6); // number of config regs 204 205 205 206 //////////// MDMA … … 236 237 nb_direct_initiators, // number of local initiators 237 238 nb_direct_targets, // number of local targets 238 0 ); // default target 239 0, // default target 240 true ); // hardware barrier 239 241 240 242 std::ostringstream s_int_dspin_ini_wrapper_gate_d; … … 269 271 true, // pseudo CMD 270 272 false, // no routing table 271 true ); // broacast 273 true, // broacast 274 true ); // hardware barrier 272 275 273 276 std::ostringstream s_int_xbar_p2m_c; … … 283 286 false, // pseudo RSP 284 287 false, // no routing table 285 false ); // no broacast 288 false, // no broacast 289 true ); // hardware barrier 286 290 287 291 std::ostringstream s_int_xbar_clack_c; … … 297 301 true, // CMD 298 302 false, // no routing table 299 false); // broadcast 303 false, // broadcast 304 true ); // hardware barrier 300 305 301 306 const bool ROUTER_CONFIG_SUPPORTED = true; … … 470 475 int_router_rsp[1]->p_in[4] (signal_int_dspin_p2m_l2g_c); 471 476 472 ///////////////////// CMD DSPIN local crossbar direct477 ///////////////////// CMD & RSP local crossbar 473 478 int_xbar_d->p_clk (this->p_clk); 474 479 int_xbar_d->p_resetn (this->p_resetn); 480 (*int_xbar_d->p_barrier_enable) (signal_cfg_xbar_barrier); 475 481 int_xbar_d->p_initiator_to_up (signal_int_vci_l2g); 476 482 int_xbar_d->p_target_to_up (signal_int_vci_g2l); … … 505 511 int_xbar_m2p_c->p_clk (this->p_clk); 506 512 int_xbar_m2p_c->p_resetn (this->p_resetn); 513 (*int_xbar_m2p_c->p_barrier_enable) (signal_cfg_xbar_barrier); 507 514 int_xbar_m2p_c->p_global_out (signal_int_dspin_m2p_l2g_c); 508 515 int_xbar_m2p_c->p_global_in (signal_int_dspin_m2p_g2l_c); … … 514 521 int_xbar_p2m_c->p_clk (this->p_clk); 515 522 int_xbar_p2m_c->p_resetn (this->p_resetn); 523 (*int_xbar_p2m_c->p_barrier_enable) (signal_cfg_xbar_barrier); 516 524 int_xbar_p2m_c->p_global_out (signal_int_dspin_p2m_l2g_c); 517 525 int_xbar_p2m_c->p_global_in (signal_int_dspin_p2m_g2l_c); … … 523 531 int_xbar_clack_c->p_clk (this->p_clk); 524 532 int_xbar_clack_c->p_resetn (this->p_resetn); 533 (*int_xbar_clack_c->p_barrier_enable) (signal_cfg_xbar_barrier); 525 534 int_xbar_clack_c->p_global_out (signal_int_dspin_clack_l2g_c); 526 535 int_xbar_clack_c->p_global_in (signal_int_dspin_clack_g2l_c); … … 547 556 else 548 557 { 549 proc[p]->p_irq[j] ( signal_false);558 proc[p]->p_irq[j] (this->p_false); 550 559 } 551 560 } … … 564 573 if ( i == 0 ) xicu->p_hwi[i] (signal_irq_memc); 565 574 else if ( i <= nb_dmas ) xicu->p_hwi[i] (signal_irq_mdma[i-1]); 566 else xicu->p_hwi[i] ( signal_false);575 else xicu->p_hwi[i] (this->p_false); 567 576 } 568 577 xicu->p_cfg[0] (signal_cfg_router_cmd[0]); // CMD … … 571 580 xicu->p_cfg[3] (signal_cfg_router_rsp[1]); // P2M 572 581 xicu->p_cfg[4] (signal_cfg_router_cmd[2]); // CLACK 582 xicu->p_cfg[5] (signal_cfg_xbar_barrier); // CLACK 573 583 574 584 ///////////////////////////////////// MEMC
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