Changeset 1064 for trunk/platforms/tsar_generic_iob/top.cpp
- Timestamp:
- Oct 10, 2020, 5:50:32 PM (4 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/tsar_generic_iob/top.cpp
r1062 r1064 119 119 // 120 120 // The NIC controler has one VCI target port, and one VCI initiator port, 121 // but it uses two different LOCAL_SRCID values to distinguish TX and TX122 // transactions,because there is not enough bits in 4 bits TRDID field.121 // but it uses several LOCAL_SRCID values to distinguish channels. 122 // because there is not enough bits in 4 bits TRDID field. 123 123 ///////////////////////////////////////////////////////////////////////// 124 124 … … 221 221 #define MEMC_SETS 256 222 222 223 #define MNIC_MAC_4 0x33445566 // 32 LSB bits224 #define MNIC_MAC_2 0X1122 // 16 MSB bits225 226 223 #define L1_IWAYS 4 227 224 #define L1_ISETS 64 … … 261 258 // - The 8 MSB bits define the cluster index. 262 259 // - The 6 LSB bits define the local index. 260 // 263 261 // Two different initiators cannot have the same SRCID, but a given 264 262 // initiator can have two alias SRCIDs: 265 263 // - Internal initiators (procs, mdma) are replicated in all clusters, 266 264 // and each initiator has one single SRCID. 267 // - External initiators ( disk, cdma) are not replicated, but can be268 // accessed in 2 clusters : cluster_iob0 and cluster_iob1.265 // - External initiators (DISK,IOPI,MNIC) are not replicated, but can 266 // be accessed in 2 clusters : cluster_iob0 and cluster_iob1. 269 267 // They have the same local index, but two different cluster indexes. 268 // As cluster_iob0 and cluster_iob1 contain both internal initiators 269 // and external initiators, they must have different local indexes. 270 // - Moreover, the MNIC has one single initiator port but can starts 271 // 64 parallel transactions: 8 channels * 4 bursts * 2 directions. 272 // The direction and burst index are specified in the TRDID field, 273 // but the channel is specified in the SRCID field (8 values for 274 // one single port). 270 275 // 271 // As cluster_iob0 and cluster_iob1 contain both internal initiators272 // and external initiators, they must have different local indexes.273 276 // Consequence: For a local interconnect, the INI_ID port index 274 277 // is NOT equal to the SRCID local index, and the local interconnect … … 276 279 //////////////////////////////////////////////////////////////////////// 277 280 278 #define PROC_LOCAL_SRCID 0x0 // from 0 to 7 279 #define MDMA_LOCAL_SRCID 0x8 280 #define IOBX_LOCAL_SRCID 0x9 281 #define MEMC_LOCAL_SRCID 0xA 282 #define DISK_LOCAL_SRCID 0xC 283 #define IOPI_LOCAL_SRCID 0xD 284 #define MNRX_LOCAL_SRCID 0xE // NIC_RX transactions 285 #define MNTX_LOCAL_SRCID 0xF // NIC_TX transactions 281 #define PROC_LOCAL_SRCID 0x00 // from 0x0 to 0x7 282 #define MDMA_LOCAL_SRCID 0x08 283 #define IOBX_LOCAL_SRCID 0x09 284 #define MEMC_LOCAL_SRCID 0x0A 285 #define DISK_LOCAL_SRCID 0x0C 286 #define IOPI_LOCAL_SRCID 0x0D 287 288 #define MNI0_LOCAL_SRCID 0x10 // NIC channel 0 289 #define MNI1_LOCAL_SRCID 0x11 // NIC channel 1 290 #define MNI2_LOCAL_SRCID 0x12 // NIC channel 2 291 #define MNI3_LOCAL_SRCID 0x13 // NIC channel 3 292 #define MNI4_LOCAL_SRCID 0x14 // NIC channel 4 293 #define MNI5_LOCAL_SRCID 0x15 // NIC channel 5 294 #define MNI6_LOCAL_SRCID 0x16 // NIC channel 6 295 #define MNI7_LOCAL_SRCID 0x17 // NIC channel 7 286 296 287 297 /////////////////////////////////////////////////////////////////////// … … 338 348 char disk_name[256] = DISK_IMAGE_NAME; // pathname: disk image 339 349 ssize_t threads = 1; // simulator's threads number 340 bool debug_ok = false; // trace activated 350 bool debug_ok = false; // trace activated when non-zero 351 uint32_t debug_from = 0; // trace start cycle 352 uint32_t debug_order = 0; // ln2( trace_period ) 353 uint32_t debug_mask = 0; // trace_period - 1 341 354 uint32_t debug_memc_id = 0xFFFFFFFF; // index of traced memc 342 355 uint32_t debug_proc_id = 0xFFFFFFFF; // index of traced proc 343 bool debug_iob = false; // trace iob0 & iob1 when true 344 uint32_t debug_from = 0; // trace start cycle 356 bool debug_iob = false; // trace iob0 (& iob1) when true 357 bool debug_ioc = false; // trace disk when true 358 bool debug_nic = false; // trace mnic when true 359 bool debug_txt = false; // trace mtty when true 360 bool debug_fbf = false; // trace fbuf when true 345 361 uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor 346 362 size_t cluster_iob0 = cluster(0,0); // cluster containing IOB0 … … 375 391 debug_ok = true; 376 392 debug_from = atoi(argv[n+1]); 393 } 394 else if ((strcmp(argv[n],"-ORDER") == 0) && (n+1<argc) ) 395 { 396 debug_order = atoi(argv[n+1]); 397 debug_mask = (1<<debug_order) - 1; 377 398 } 378 399 else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) … … 397 418 { 398 419 debug_iob = atoi(argv[n+1]); 420 } 421 else if ((strcmp(argv[n],"-IOC") == 0) && (n+1<argc) ) 422 { 423 debug_ioc = atoi(argv[n+1]); 424 } 425 else if ((strcmp(argv[n],"-NIC") == 0) && (n+1<argc) ) 426 { 427 debug_nic = atoi(argv[n+1]); 428 } 429 else if ((strcmp(argv[n],"-TXT") == 0) && (n+1<argc) ) 430 { 431 debug_txt = atoi(argv[n+1]); 432 } 433 else if ((strcmp(argv[n],"-FBF") == 0) && (n+1<argc) ) 434 { 435 debug_fbf = atoi(argv[n+1]); 399 436 } 400 437 else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) … … 434 471 std::cout << " - PROCID index_proc_to_be_traced" << std::endl; 435 472 std::cout << " - IOB non_zero_value" << std::endl; 473 std::cout << " - IOC non_zero_value" << std::endl; 474 std::cout << " - NIC non_zero_value" << std::endl; 475 std::cout << " - TXT non_zero_value" << std::endl; 476 std::cout << " - FBF non_zero_value" << std::endl; 436 477 exit(0); 437 478 } … … 464 505 "Error in tsar_generic_iob : NB_TXT_CHANNELS parameter cannot be larger than 16" ); 465 506 466 assert( (NB_NIC_CHANNELS <= 4) and507 assert( (NB_NIC_CHANNELS <= 8) and 467 508 "Error in tsar_generic_iob : NB_NIC_CHANNELS parameter cannot be larger than 4" ); 468 509 … … 658 699 maptab_ram.srcid_map( IntTab( cluster_iob0, DISK_LOCAL_SRCID ), 659 700 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 660 661 701 maptab_ram.srcid_map( IntTab( cluster_iob1, DISK_LOCAL_SRCID ), 662 702 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); … … 664 704 maptab_ram.srcid_map( IntTab( cluster_iob0, IOPI_LOCAL_SRCID ), 665 705 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 666 667 706 maptab_ram.srcid_map( IntTab( cluster_iob1, IOPI_LOCAL_SRCID ), 668 707 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 669 708 670 maptab_ram.srcid_map( IntTab( cluster_iob0, MN RX_LOCAL_SRCID ),709 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI0_LOCAL_SRCID ), 671 710 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 672 673 maptab_ram.srcid_map( IntTab( cluster_iob1, MNRX_LOCAL_SRCID ), 711 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI0_LOCAL_SRCID ), 674 712 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 675 713 676 maptab_ram.srcid_map( IntTab( cluster_iob0, MN TX_LOCAL_SRCID ),714 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI1_LOCAL_SRCID ), 677 715 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 678 679 maptab_ram.srcid_map( IntTab( cluster_iob1, MNTX_LOCAL_SRCID ), 716 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI1_LOCAL_SRCID ), 717 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 718 719 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI2_LOCAL_SRCID ), 720 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 721 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI2_LOCAL_SRCID ), 722 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 723 724 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI3_LOCAL_SRCID ), 725 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 726 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI3_LOCAL_SRCID ), 727 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 728 729 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI4_LOCAL_SRCID ), 730 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 731 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI4_LOCAL_SRCID ), 732 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 733 734 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI5_LOCAL_SRCID ), 735 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 736 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI5_LOCAL_SRCID ), 737 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 738 739 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI6_LOCAL_SRCID ), 740 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 741 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI6_LOCAL_SRCID ), 742 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 743 744 maptab_ram.srcid_map( IntTab( cluster_iob0, MNI7_LOCAL_SRCID ), 745 IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); 746 maptab_ram.srcid_map( IntTab( cluster_iob1, MNI7_LOCAL_SRCID ), 680 747 IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); 681 748 682 749 maptab_ram.srcid_map( IntTab( cluster_iob0, MEMC_LOCAL_SRCID ), 683 750 IntTab( cluster_iob0, RAM_MEMC_INI_ID ) ); 684 685 751 maptab_ram.srcid_map( IntTab( cluster_iob1, MEMC_LOCAL_SRCID ), 686 752 IntTab( cluster_iob1, RAM_MEMC_INI_ID ) ); … … 798 864 IntTab( 0, IOX_IOB0_INI_ID ) ); 799 865 800 maptab_iox.srcid_map( IntTab( 0, MN RX_LOCAL_SRCID ) ,866 maptab_iox.srcid_map( IntTab( 0, MNI0_LOCAL_SRCID ) , 801 867 IntTab( 0, IOX_MNIC_INI_ID ) ); 802 803 maptab_iox.srcid_map( IntTab( 0, MNTX_LOCAL_SRCID ) , 868 maptab_iox.srcid_map( IntTab( 0, MNI1_LOCAL_SRCID ) , 869 IntTab( 0, IOX_MNIC_INI_ID ) ); 870 maptab_iox.srcid_map( IntTab( 0, MNI2_LOCAL_SRCID ) , 871 IntTab( 0, IOX_MNIC_INI_ID ) ); 872 maptab_iox.srcid_map( IntTab( 0, MNI3_LOCAL_SRCID ) , 873 IntTab( 0, IOX_MNIC_INI_ID ) ); 874 maptab_iox.srcid_map( IntTab( 0, MNI4_LOCAL_SRCID ) , 875 IntTab( 0, IOX_MNIC_INI_ID ) ); 876 maptab_iox.srcid_map( IntTab( 0, MNI5_LOCAL_SRCID ) , 877 IntTab( 0, IOX_MNIC_INI_ID ) ); 878 maptab_iox.srcid_map( IntTab( 0, MNI6_LOCAL_SRCID ) , 879 IntTab( 0, IOX_MNIC_INI_ID ) ); 880 maptab_iox.srcid_map( IntTab( 0, MNI7_LOCAL_SRCID ) , 804 881 IntTab( 0, IOX_MNIC_INI_ID ) ); 805 882 … … 1016 1093 mnic = new VciMasterNic<vci_param_ext>( "mnic", 1017 1094 maptab_iox, 1018 IntTab(0, MNRX_LOCAL_SRCID), 1019 IntTab(0, MNTX_LOCAL_SRCID), 1095 IntTab(0, MNI0_LOCAL_SRCID), 1020 1096 IntTab(0, IOX_MNIC_TGT_ID), 1021 1097 NB_NIC_CHANNELS, 1022 64, // burst length 1023 MNIC_MAC_4, // default MAC address (LSB) 1024 MNIC_MAC_2, // default MAC address (MSB) 1098 6, // burst order 1025 1099 1, // NIC_MODE_SYNTHESIS 1026 1100 12); // INTER_FRAME_GAP … … 1656 1730 1657 1731 // Monitor a specific address for one L1 data cache 1658 // clusters[0][ 1]->proc[0]->cache_monitor( 0x10003ddb4ULL );1732 // clusters[0][0]->proc[0]->cache_monitor( 0x100055574ULL ); 1659 1733 1660 1734 // Monitor a specific address for L2 cache (single word if second argument true) 1661 // clusters[0][0]->memc->cache_monitor( 0xcfe90ULL , true );1735 clusters[0][0]->memc->cache_monitor( 0x001EE87CULL , true ); 1662 1736 1663 1737 // Monitor a specific address for one XRAM 1664 // clusters[0][1]->xram->start_monitor( 0x100094000ULL , 64);1738 clusters[0][0]->xram->start_monitor( 0x001EE87CULL , 4 ); 1665 1739 1666 1740 // Monitor the MMU for one L1 cache 1667 1741 // clusters[0][0]->proc[0]->mmu_monitor(); 1668 1742 1669 if ( debug_ok and (n > debug_from) )1743 if ( debug_ok and (n >= debug_from) and ((n & debug_mask) == 0) ) 1670 1744 { 1671 1745 std::cout << "****************** cycle " << std::dec << n ; … … 1689 1763 size_t y = cluster_xy & 0xF; 1690 1764 /* 1691 size_t l = 0;1692 size_t x 1693 size_t y ;1765 size_t l; 1766 size_t x = 0; 1767 size_t y = 0; 1694 1768 1695 for( y = 0 ; y < 2 ; y++ )1769 for( l = 0 ; l < 2 ; l++ ) 1696 1770 { 1697 1771 */ … … 1762 1836 if ( debug_iob ) 1763 1837 { 1764 // clusters[0][0]->iob->print_trace(); 1765 // clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0_INT_TGT"); 1766 // clusters[0][0]->signal_int_vci_ini_iobx.print_trace( "[SIG]IOB0_INT_INI"); 1767 // clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI"); 1768 // signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI"); 1769 // signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); 1770 1771 // brom->print_trace(); 1772 // signal_vci_tgt_brom.print_trace("[SIG]BROM_TGT"); 1773 1774 // mtty->print_trace( 1 ); 1775 // signal_vci_tgt_mtty.print_trace("[SIG]MTTY_TGT"); 1776 1777 disk->print_trace(); 1778 signal_vci_tgt_disk.print_trace("[SIG]DISK_TGT"); 1779 signal_vci_ini_disk.print_trace("[SIG]DISK_INI"); 1780 1781 #if ( USE_IOC_SDC ) 1782 // card->print_trace(); 1783 #endif 1784 1785 // mnic->print_trace( 0 ); 1786 // signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); 1787 // signal_vci_ini_mnic.print_trace("[SIG]MNIC_INI"); 1788 1789 // fbuf->print_trace(); 1790 // signal_vci_tgt_fbuf.print_trace("[SIG]FBUF_TGT"); 1791 1792 iopi->print_trace(); 1793 signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); 1794 signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); 1795 1796 // iox_network->print_trace(); 1797 1798 // interrupts 1799 if ( signal_irq_disk.read() ) 1800 std::cout << "### IRQ_DISK ACTIVE" << std::endl; 1838 clusters[0][0]->iob->print_trace(); 1839 clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0_INT_TGT"); 1840 clusters[0][0]->signal_int_vci_ini_iobx.print_trace( "[SIG]IOB0_INT_INI"); 1841 clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI"); 1842 signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI"); 1843 signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); 1844 1845 iox_network->print_trace(); 1846 } 1847 1848 if ( debug_txt ) 1849 { 1850 mtty->print_trace( 1 ); 1851 signal_vci_tgt_mtty.print_trace("[SIG]MTTY_TGT"); 1801 1852 1802 1853 for( size_t k = 0 ; k < NB_TXT_CHANNELS ; k++ ) … … 1808 1859 std::cout << "### IRQ_MTTY_TX[" << k << "] ACTIVE" << std::endl; 1809 1860 } 1810 1811 for( size_t k = 0 ; k < NB_NIC_CHANNELS ; k++ ) 1861 } 1862 1863 if ( debug_ioc ) 1864 { 1865 disk->print_trace(); 1866 signal_vci_tgt_disk.print_trace("[SIG]DISK_TGT"); 1867 signal_vci_ini_disk.print_trace("[SIG]DISK_INI"); 1868 1869 #if ( USE_IOC_SDC ) 1870 card->print_trace(); 1871 #endif 1872 if ( signal_irq_disk.read() ) 1873 std::cout << "### IRQ_DISK ACTIVE" << std::endl; 1874 } 1875 1876 if ( debug_nic ) 1877 { 1878 mnic->print_trace( 1879 NIC_MODE_TX_DMA | 1880 NIC_MODE_RX_DMA | 1881 NIC_MODE_RX_CHBUF | 1882 NIC_MODE_TX_CHBUF | 1883 NIC_MODE_VCI_CMD | 1884 NIC_MODE_VCI_RSP 1885 ); 1886 1887 signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); 1888 signal_vci_ini_mnic.print_trace("[SIG]MNIC_INI"); 1889 1890 for( size_t k = 0 ; k < NB_TXT_CHANNELS ; k++ ) 1812 1891 { 1813 if ( signal_irq_m nic_rx[k].read() )1814 std::cout << "### IRQ_M NIC_RX[" << k << "] ACTIVE" << std::endl;1815 1816 if ( signal_irq_m nic_tx[k].read() )1817 std::cout << "### IRQ_M NIC_TX[" << k << "] ACTIVE" << std::endl;1892 if ( signal_irq_mtty_rx[k].read() ) 1893 std::cout << "### IRQ_MTTY_RX[" << k << "] ACTIVE" << std::endl; 1894 1895 if ( signal_irq_mtty_tx[k].read() ) 1896 std::cout << "### IRQ_MTTY_TX[" << k << "] ACTIVE" << std::endl; 1818 1897 } 1819 1898 } 1820 } 1899 1900 if ( debug_fbf ) 1901 { 1902 fbuf->print_trace(); 1903 signal_vci_tgt_fbuf.print_trace("[SIG]FBUF_TGT"); 1904 1905 iopi->print_trace(); 1906 signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); 1907 signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); 1908 } 1909 } // end if debug 1821 1910 1822 1911 sc_start(sc_core::sc_time(simul_period, SC_NS));
Note: See TracChangeset
for help on using the changeset viewer.