- Timestamp:
- Dec 23, 2010, 3:29:34 PM (14 years ago)
- File:
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- 1 edited
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trunk/platforms/caba-vdspin-vci_synthetic_initiator/top.cpp
r112 r121 16 16 17 17 // MESH SIZE 18 #define X_MAX 219 #define Y_MAX 218 #define X_MAX 16 19 #define Y_MAX 16 20 20 #define N_CLUSTERS X_MAX*Y_MAX 21 21 // FLIT_WIDTH … … 42 42 #define TARGET_ADDR 0x00000000 43 43 #define TARGET_SIZE 0x400 44 // FIFO depth in the gateways 45 #define DEPTH 2 46 // LENGTH of packets 47 #define PACKET_LENGTH 2 48 // FIFO depth in the routers 49 #define DSPIN_FIFO 4 50 // DEBUG MODE : 0 OFF, 1 only the initiators and the targets, 2 only network 51 #define DEBUG 0 44 52 45 53 … … 65 73 wrplen_width> vci_param; 66 74 67 //soclib::common::Loader loader();68 75 // Mapping table primary network 69 76 soclib::common::MappingTable maptab0(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), … … 83 90 84 91 85 std::cout << maptab0 << std::endl; 86 // Signals 92 // std::cout << maptab0 << std::endl; 87 93 88 94 sc_clock signal_clk("clk"); … … 95 101 // one level for Y length in the mesh, last level for each port of the router 96 102 /////////////////////////////////////////////////////////////// 97 soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_0", 2, Y_MAX, X_MAX, 5 ); 98 soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_1", 2, Y_MAX, X_MAX, 5 ); 99 soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_0", 2, Y_MAX, X_MAX, 5 ); 100 soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_2", 2, Y_MAX, X_MAX, 5 ); 101 102 //soclib::caba::VciSignals<vci_param> * signal_vci_tgt_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_tgt_proc", N_CLUSTERS); 103 soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); 104 soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_1", 2, X_MAX, Y_MAX, 5 ); 105 soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); 106 soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_2", 2, X_MAX, Y_MAX, 5 ); 107 103 108 104 109 // N_CLUSTERS ring. … … 106 111 soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c1 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; 107 112 for(int i = 0 ; i < N_CLUSTERS ; i++){ // ringid, fifo, fifo, nb_init, nb_tgt 108 std::cout << "Passe " << i << " pour instanciation ring" << std::endl;109 113 std::ostringstream str0; 110 114 std::ostringstream str1; … … 115 119 IntTab(i), 116 120 2, 117 18,121 DEPTH, 118 122 1, 119 123 1); … … 122 126 IntTab(i), 123 127 2, 124 18,128 DEPTH, 125 129 1, 126 130 1); … … 135 139 routers_rsp[i] = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP>) * Y_MAX); 136 140 for(int j = 0; j < Y_MAX; j++){ 137 std::cout << "Passe " << i << j << " pour instanciation vdspin" << std::endl;138 141 std::ostringstream str0; 139 142 std::ostringstream str1; 140 143 str0 << "VDspinRouterCMD" << i << j; 141 144 str1 << "VDspinRouterRSP" << i << j; 142 new(&routers_cmd[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_CMD> (str0.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), 4, 4);143 new(&routers_rsp[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_RSP> (str1.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), 4, 4);145 new(&routers_cmd[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_CMD> (str0.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); 146 new(&routers_rsp[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_RSP> (str1.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); 144 147 } 145 148 } … … 155 158 for(int i = 0 ; i < X_MAX; i++) 156 159 for(int j = 0 ; j < Y_MAX ; j++){ 157 std::cout << "Passe " << i << j << " pour instanciation synthetic_init" << std::endl;158 160 std::ostringstream str0; 159 161 std::ostringstream str1; 160 162 str0 << "Initiator_c0_" << (i*Y_MAX+j) ; 161 163 str1 << "Initiator_c1_" << (i*Y_MAX+j) ; 162 if( (i == X_MAX-1) && (j == Y_MAX-1)){163 new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j) ,0), 16, 900, 2, X_MAX, Y_MAX, 25, 0, X_MAX, 0, Y_MAX); //, 0, 0, 0, 0, 0);164 new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j) ,0), 16, 900, 2, X_MAX, Y_MAX, 25, 0, X_MAX, 0, Y_MAX); //, 0, 0, 0, 0, 0);165 } else {166 new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j),0), 16, 500, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0);167 new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j),0), 16, 500, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0);168 }164 //if( (i == X_MAX-1) && (j == Y_MAX-1)){ 165 new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, 40, 8, X_MAX, Y_MAX); //, 250, 0, X_MAX, 0, Y_MAX); 166 new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, 40, 8, X_MAX, Y_MAX); //, 250, 0, X_MAX, 0, Y_MAX); 167 //} else { 168 // new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j),0), 16, 50, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0); 169 // new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j),0), 16, 50, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0); 170 //} 169 171 } 170 172 … … 173 175 for(int i = 0 ; i < X_MAX ; i++) 174 176 for(int j = 0 ; j < Y_MAX ; j++){ 175 std::cout << "Passe " << i << j << " pour instanciation Ram" << std::endl;176 177 std::ostringstream str0; 177 178 std::ostringstream str1; … … 226 227 local_ring_c0[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c0[1][i][j][LOCAL]); 227 228 local_ring_c1[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c1[1][i][j][LOCAL]); 228 std::cout << "Ring to DSPIN Connection done" << std::endl;229 229 for(int k = 0; k < 5; k++){ 230 230 if(j == 0){ … … 304 304 } 305 305 306 //////////////////////////////////////////////////////// 307 for(int i = 0; i < Y_MAX ; i++){ 306 //////////////////////////////////////////////// 307 // Simulation Loop // 308 //////////////////////////////////////////////// 309 int ncycles; 310 311 312 if(argc == 2){ 313 ncycles = std::atoi(argv[1]); 314 } else { 315 exit(1); 316 } 317 sc_start(sc_core::sc_time(0, SC_NS)); 318 signal_resetn = false; 319 320 for(int i = 0; i < X_MAX ; i++){ 308 321 for(int j = 0; j < Y_MAX ; j++){ 309 if( i== 0){322 if(j == 0){ 310 323 dspin_signals_cmd_c0[0][i][j][SOUTH].read = true ; 311 324 dspin_signals_cmd_c0[1][i][j][SOUTH].write = false ; … … 317 330 dspin_signals_rsp_c1[1][i][j][SOUTH].write = false ; 318 331 } 319 if( i== Y_MAX-1){332 if(j == Y_MAX-1){ 320 333 dspin_signals_cmd_c0[0][i][j][NORTH].read = true ; 321 334 dspin_signals_cmd_c0[1][i][j][NORTH].write = false ; … … 327 340 dspin_signals_rsp_c1[1][i][j][NORTH].write = false ; 328 341 } 329 if( j== 0){342 if(i == 0){ 330 343 dspin_signals_cmd_c0[0][i][j][WEST].read = true ; 331 344 dspin_signals_cmd_c0[1][i][j][WEST].write = false ; … … 337 350 dspin_signals_rsp_c1[1][i][j][WEST].write = false ; 338 351 } 339 if( j== X_MAX-1){352 if(i == X_MAX-1){ 340 353 dspin_signals_cmd_c0[0][i][j][EAST].read = true ; 341 354 dspin_signals_cmd_c0[1][i][j][EAST].write = false ; … … 348 361 } 349 362 } 350 } 351 352 353 354 //////////////////////////////////////////////// 355 // Simulation Loop // 356 //////////////////////////////////////////////// 357 //int ncycles; 358 359 sc_start(sc_core::sc_time(0, SC_NS)); 360 signal_resetn = false; 363 } 361 364 362 365 sc_start(sc_core::sc_time(1, SC_NS)); 363 366 signal_resetn = true; 364 367 365 while(1){368 for(int t = 0; t < ncycles; t++){ 366 369 sc_start(sc_time(1, SC_NS)); 367 std::cout << "Synthetic initiators signals ------------------------------" << std::endl; 368 for(int i = 0 ; i < N_CLUSTERS ; i++){ 369 initiator_c0[i].print_trace(); 370 std::cout << std::hex; 371 std::cout << "synt_cmdval = " << signal_vci_ini_synth_c0[0][i].cmdval.read() << std::endl; 372 std::cout << "synt_address = " << signal_vci_ini_synth_c0[0][i].address.read() << std::endl; 373 std::cout << "synt_cmd = " << signal_vci_ini_synth_c0[0][i].cmd.read() << std::endl; 374 std::cout << "synt_srcid = " << signal_vci_ini_synth_c0[0][i].srcid.read() << std::endl; 375 std::cout << "synt_plen = " << signal_vci_ini_synth_c0[0][i].plen.read() << std::endl; 376 std::cout << "synt_eop = " << signal_vci_ini_synth_c0[0][i].eop.read() << std::endl; 377 std::cout << "synt_rspval = " << signal_vci_ini_synth_c0[0][i].rspval.read() << std::endl; 378 std::cout << "synt_rerror = " << signal_vci_ini_synth_c0[0][i].rerror.read() << std::endl; 379 std::cout << "synt_reop = " << signal_vci_ini_synth_c0[0][i].reop.read() << std::endl; 380 } 381 std::cout << "RAM signals -----------------------------------------------" << std::endl; 382 for(int i = 0 ; i < N_CLUSTERS ; i++){ 383 ram_c0[i].print_trace(); 384 std::cout << std::hex; 385 std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i].cmdval.read() << std::endl; 386 std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i].address.read() << std::endl; 387 std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i].cmd.read() << std::endl; 388 std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i].srcid.read() << std::endl; 389 std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i].plen.read() << std::endl; 390 std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i].eop.read() << std::endl; 391 std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i].rspval.read() << std::endl; 392 std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c0[1][i].rsrcid.read() << std::endl; 393 std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i].rerror.read() << std::endl; 394 std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i].reop.read() << std::endl; 395 } 396 std::cout << "Local_ring ------------------------------------------------" << std::endl; 397 for(int i = 0 ; i < N_CLUSTERS ; i++){ 398 local_ring_c0[i].print_trace(); 399 } 400 std::cout << "Routers CMD -----------------------------------------------" << std::endl; 370 #if defined(DEBUG) 401 371 for(int i = 0 ; i < Y_MAX ; i++){ 402 372 for(int j = 0 ; j < X_MAX ; j++){ 403 routers_cmd[i][j].printTrace(0); 373 #endif 374 #if DEBUG==1 375 initiator_c0[i*Y_MAX+j].print_trace(); 376 std::cout << std::hex; 377 std::cout << "synt_cmdval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdval.read() << std::endl; 378 std::cout << "synt_cmdack = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdack.read() << std::endl; 379 std::cout << "synt_address = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].address.read() << std::endl; 380 std::cout << "synt_cmd = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmd.read() << std::endl; 381 std::cout << "synt_srcid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].srcid.read() << std::endl; 382 std::cout << "synt_plen = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].plen.read() << std::endl; 383 std::cout << "synt_eop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].eop.read() << std::endl; 384 std::cout << "synt_rspval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rspval.read() << std::endl; 385 std::cout << "synt_rerror = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rerror.read() << std::endl; 386 std::cout << "synt_reop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].reop.read() << std::endl; 387 ram_c0[i*Y_MAX+j].print_trace(); 388 std::cout << std::hex; 389 std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmdval.read() << std::endl; 390 std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].address.read() << std::endl; 391 std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmd.read() << std::endl; 392 std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].srcid.read() << std::endl; 393 std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].plen.read() << std::endl; 394 std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].eop.read() << std::endl; 395 std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspval.read() << std::endl; 396 std::cout << "ram_rspack = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspack.read() << std::endl; 397 std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rsrcid.read() << std::endl; 398 std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rerror.read() << std::endl; 399 std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].reop.read() << std::endl; 400 #endif 401 #if DEBUG==2 402 local_ring_c0[i*Y_MAX+j].print_trace(); 403 routers_cmd[i][j].print_trace(0); 404 std::cout << std::dec << t << " ns" << std::endl; 405 routers_rsp[i][j].print_trace(0); 406 #endif 407 #ifdef DEBUG 404 408 } 405 409 } 406 std::cout << "Routers RSP -----------------------------------------------" << std::endl; 407 for(int i = 0 ; i < Y_MAX ; i++){ 408 for(int j = 0 ; j < X_MAX ; j++){ 409 routers_rsp[i][j].printTrace(0); 410 } 411 } 412 413 //for(int i = 0; i< N_CLUSTERS; i++){ 414 // initiator_c1[i].print_trace(); 415 // std::cout << std::hex; 416 // std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][i].cmdval.read() << std::endl; 417 // std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][i].address.read() << std::endl; 418 // std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][i].cmd.read() << std::endl; 419 // std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][i].srcid.read() << std::endl; 420 // std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][i].plen.read() << std::endl; 421 // std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][i].eop.read() << std::endl; 422 // std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][i].rspval.read() << std::endl; 423 // std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][i].rerror.read() << std::endl; 424 // std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][i].reop.read() << std::endl; 425 //} 426 //for(int i = 0 ; i < N_CLUSTERS ; i++){ 427 // ram_c1[i].print_trace(); 428 // std::cout << std::hex; 429 // std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i].cmdval.read() << std::endl; 430 // std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i].address.read() << std::endl; 431 // std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i].cmd.read() << std::endl; 432 // std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i].srcid.read() << std::endl; 433 // std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i].plen.read() << std::endl; 434 // std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i].eop.read() << std::endl; 435 // std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i].rspval.read() << std::endl; 436 // std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i].rerror.read() << std::endl; 437 // std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i].reop.read() << std::endl; 438 //} 410 #endif 439 411 440 412 } 413 414 std::cout << "Results : " << std::endl; 415 for(int i = 0 ; i < Y_MAX ; i++){ 416 for(int j = 0 ; j < X_MAX ; j++){ 417 initiator_c0[i*Y_MAX+j].printStats(); 418 } 419 } 420 421 422 std::cout << "Simulation Ends" << std::endl; 423 441 424 442 425 return EXIT_SUCCESS; … … 455 438 return 1; 456 439 } 440
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