- Timestamp:
- Jan 24, 2011, 5:36:50 PM (14 years ago)
- File:
-
- 1 edited
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trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/segmentation.h
r107 r134 19 19 // base address required by MIPS processor 20 20 ///////////////////////////////////////////////////////////////// 21 #define MMU22 23 21 #define RESET_BASE 0xBFC00000 24 22 #define RESET_SIZE 0x00010000 … … 29 27 #define TEXT_BASE 0x00400000 30 28 #define TEXT_SIZE 0x00050000 29 31 30 ///////////////////////////////////////////////////////////////// 32 31 // global data segment (initialised) … … 34 33 35 34 #define MC_M_BASE 0x10000000 36 #define MC_M_SIZE 0x00 10000035 #define MC_M_SIZE 0x000F0000 37 36 38 /////////////////////////////////////////////////////////////////39 // page table (initialised)40 /////////////////////////////////////////////////////////////////41 #define PTD_ADDR 0x4040000042 #define PTE_ADDR 0x4040200043 #define IPTE_ADDR 0x4040300044 #define TAB_SIZE 0x0001000045 46 #define V_TTY_BASE 0x0080000047 #define V_TIMER_BASE 0x00C00000 // timer virtual address48 37 ////////////////////////////////////////////////////////// 49 38 // System devices … … 53 42 #define TTY_SIZE 0x00000100 54 43 55 #define TIMER_BASE 0xD020000056 #define TIMER_SIZE 0x0000010044 #define XICU_BASE 0xD0200000 45 #define XICU_SIZE 0x00000100 57 46 58 #define LOCKS_BASE 0xE020000059 #define LOCKS_SIZE 0x0000010047 #define SIMHELPER_BASE 0xF0200000 48 #define SIMHELPER_SIZE 0x00000100 60 49 61 #define C_PROC0_BASE 0x01200000 62 #define C_PROC0_SIZE 0x00000010 63 64 #define C_PROC1_BASE 0x02200000 65 #define C_PROC1_SIZE 0x00000010 66 67 #define C_PROC2_BASE 0x03200000 68 #define C_PROC2_SIZE 0x00000010 69 70 #define C_PROC3_BASE 0x04200000 71 #define C_PROC3_SIZE 0x00000010 72 73 #define C_MC_M_BASE 0x00200000 74 #define C_MC_M_SIZE 0x00000008 75 76 #define XRAM_BASE 0xB0200000 77 #define XRAM_SIZE 0x00000008 50 #define C_PROC_BASE 0x01200000 51 #define C_PROC_SIZE 0x00000010 52 #define C_PROC_SPAN 0x01000000 78 53 79 54 #define MC_R_BASE 0x20200000 80 55 #define MC_R_SIZE 0x00000008 81 56 82 #define CLEANUP_OFFSET 0x20200000 57 //#define C_MC_M_BASE 0x00200000 58 //#define C_MC_M_SIZE 0x00000008 59 60 //#define XRAM_BASE 0xB0200000 61 //#define XRAM_SIZE 0x00000008 62 63 //#define CLEANUP_OFFSET 0x20200000
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