Ignore:
Timestamp:
Feb 18, 2011, 11:10:07 AM (14 years ago)
Author:
guthmull
Message:

Handle bad accesses cleanly : transmit all accesses to the xram and handle rerror in responses. The simulation is no more stopped and gdb can be used for debug.

File:
1 edited

Legend:

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Removed

  • trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h

    r116 r138  
    189189        XRAM_RSP_HEAP_ERASE,
    190190        XRAM_RSP_HEAP_LAST,
     191        XRAM_RSP_ERROR_ERASE,
     192        XRAM_RSP_ERROR_RSP,
    191193      };
    192194
    … …  
    393395      sc_signal<int>         r_tgt_cmd_fsm;
    394396
    395       sc_signal<size_t>      r_index;
    396397      size_t nseg;
    397398      size_t ncseg;
    … …  
    634635      sc_signal<size_t>    r_xram_rsp_to_tgt_rsp_word;  // first word index
    635636      sc_signal<size_t>    r_xram_rsp_to_tgt_rsp_length;// length of the response
     637      sc_signal<bool>      r_xram_rsp_to_tgt_rsp_rerror;// send error to requester
    636638
    637639      // Buffer between XRAM_RSP fsm and INIT_CMD fsm (Inval L1 Caches)
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