Ignore:
Timestamp:
Dec 10, 2012, 6:24:37 PM (12 years ago)
Author:
joannou
Message:

Changed default value to 0 for the L1_MULTI_CACHE define
Fixed some compiling error when the 0 value is used for the L1_MULTI_CACHE define

Location:
trunk/modules/vci_mem_cache_v4/caba/source/include
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h

    r212 r283  
    77#include "arithmetics.h"
    88
    9 #define L1_MULTI_CACHE 1
     9#define L1_MULTI_CACHE 0
    1010//#define RANDOM_EVICTION
    1111

  • trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h

    r273 r283  
    529529      GenericFifo<bool>   m_write_to_init_cmd_inst_fifo;     // fifo for the L1 type
    530530      GenericFifo<size_t> m_write_to_init_cmd_srcid_fifo;    // fifo for srcids
     531#if L1_MULTI_CACHE
    531532      GenericFifo<size_t> m_write_to_init_cmd_cache_id_fifo; // fifo for srcids
     533#endif
    532534
    533535      // Buffer between WRITE fsm and INIT_RSP fsm (Decrement UPT entry)
    … …  
    640642      GenericFifo<bool>   m_sc_to_init_cmd_inst_fifo;     // fifo for the L1 type
    641643      GenericFifo<size_t> m_sc_to_init_cmd_srcid_fifo;    // fifo for srcids
     644#if L1_MULTI_CACHE
    642645      GenericFifo<size_t> m_sc_to_init_cmd_cache_id_fifo; // fifo for srcids
     646#endif
    643647
    644648      // Buffer between SC fsm and INIT_RSP fsm (Decrement UPT entry)
    … …  
    696700      GenericFifo<bool>   m_xram_rsp_to_init_cmd_inst_fifo;     // fifo for the L1 type
    697701      GenericFifo<size_t> m_xram_rsp_to_init_cmd_srcid_fifo;    // fifo for srcids
     702#if L1_MULTI_CACHE
    698703      GenericFifo<size_t> m_xram_rsp_to_init_cmd_cache_id_fifo; // fifo for srcids
     704#endif
    699705
    700706      // Buffer between XRAM_RSP fsm and IXR_CMD fsm (XRAM write)
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