Changeset 284 for trunk/modules/vci_cc_vcache_wrapper_v4
- Timestamp:
- Dec 11, 2012, 6:19:35 PM (12 years ago)
- Location:
- trunk/modules/vci_cc_vcache_wrapper_v4/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h
r247 r284 118 118 //handling dirty bit update 119 119 DCACHE_DIRTY_GET_PTE, 120 DCACHE_DIRTY_ SC_WAIT,120 DCACHE_DIRTY_WAIT, 121 121 // handling processor miss requests 122 122 DCACHE_MISS_VICTIM, … … 142 142 CMD_DATA_UNC, 143 143 CMD_DATA_WRITE, 144 CMD_DATA_ SC,144 CMD_DATA_CAS, 145 145 }; 146 146 … … 152 152 RSP_DATA_UNC, 153 153 RSP_DATA_WRITE, 154 RSP_DATA_SC,155 154 }; 156 155 … … 173 172 TGT_RSP_DCACHE, 174 173 }; 174 175 /* transaction type, pktid field */ 176 enum transaction_type_e 177 { 178 // b3 unused 179 // b2 READ / NOT READ 180 // Si READ 181 // b1 DATA / INS 182 // b0 UNC / MISS 183 // Si NOT READ 184 // b1 accÚs table llsc type SW / other 185 // b2 WRITE/CAS/LL/SC 186 TYPE_READ_DATA_UNC = 0x0, 187 TYPE_READ_DATA_MISS = 0x1, 188 TYPE_READ_INS_UNC = 0x2, 189 TYPE_READ_INS_MISS = 0x3, 190 TYPE_WRITE = 0x4, 191 TYPE_CAS = 0x5, 192 TYPE_LL = 0x6, 193 TYPE_SC = 0x7 194 }; 195 196 /* SC return values */ 197 enum sc_status_type_e 198 { 199 SC_SUCCESS = 0x00000000, 200 SC_FAIL = 0x00000001 201 }; 202 /* 203 this is already in vci_param.h 204 enum { 205 STORE_COND_ATOMIC = 0, 206 STORE_COND_NOT_ATOMIC = 1, 207 }; 208 */ 175 209 176 210 // TLB Mode : ITLB / DTLB / ICACHE / DCACHE -
trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/src/vci_cc_vcache_wrapper_v4.cpp
r262 r284 89 89 90 90 "DCACHE_DIRTY_PTE_GET", 91 "DCACHE_DIRTY_ SC_WAIT",91 "DCACHE_DIRTY_WAIT", 92 92 93 93 "DCACHE_MISS_VICTIM", … … 112 112 "CMD_DATA_UNC", 113 113 "CMD_DATA_WRITE", 114 "CMD_DATA_ SC",114 "CMD_DATA_CAS", 115 115 }; 116 116 const char *rsp_fsm_state_str[] = { … … 3995 3995 r_dcache_vci_sc_old = pte; 3996 3996 r_dcache_vci_sc_new = pte | PTE_D_MASK; 3997 r_dcache_fsm = DCACHE_DIRTY_ SC_WAIT;3997 r_dcache_fsm = DCACHE_DIRTY_WAIT; 3998 3998 3999 3999 #if DEBUG_DCACHE … … 4010 4010 } 4011 4011 ////////////////////////// 4012 case DCACHE_DIRTY_ SC_WAIT: // wait completion of SCfor PTE Dirty bit,4012 case DCACHE_DIRTY_WAIT: // wait completion of CAS for PTE Dirty bit, 4013 4013 // and return to IDLE state when response is received. 4014 // we don't care if the SCis a failure:4015 // - if the SCis a success, the coherence mechanism4014 // we don't care if the CAS is a failure: 4015 // - if the CAS is a success, the coherence mechanism 4016 4016 // updates the local copy. 4017 // - if the SCis a failure, we just retry the write.4017 // - if the CAS is a failure, we just retry the write. 4018 4018 { 4019 4019 // external coherence request … … 4419 4419 else if ( r_dcache_vci_sc_req.read() ) 4420 4420 { 4421 r_vci_cmd_fsm = CMD_DATA_ SC;4421 r_vci_cmd_fsm = CMD_DATA_CAS; 4422 4422 r_dcache_vci_sc_req = false; 4423 4423 r_vci_cmd_cpt = 0; … … 4442 4442 } 4443 4443 ///////////////// 4444 case CMD_DATA_ SC:4444 case CMD_DATA_CAS: 4445 4445 { 4446 4446 // The SC VCI command contains two flits … … 4475 4475 // 4476 4476 // As the VCI_RSP and VCI_CMD are fully desynchronized to support several 4477 // simultaneous VCI transactions, this FSM uses the VCI TRDID field4477 // simultaneous VCI transactions, this FSM uses the VCI RPKTID field 4478 4478 // to identify the transactions. 4479 4479 // … … 4500 4500 r_vci_rsp_cpt = 0; 4501 4501 4502 if ( (p_vci_ini_d.rtrdid.read() >> (vci_param::T-1)) != 0 ) // Write transaction 4503 { 4504 r_vci_rsp_fsm = RSP_DATA_WRITE; 4505 } 4506 else if ( p_vci_ini_d.rtrdid.read() == TYPE_INS_MISS ) 4502 if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_READ_DATA_UNC ) 4503 { 4504 r_vci_rsp_fsm = RSP_DATA_UNC; 4505 } 4506 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_READ_DATA_MISS ) 4507 { 4508 r_vci_rsp_fsm = RSP_DATA_MISS; 4509 } 4510 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_READ_INS_UNC ) 4511 { 4512 r_vci_rsp_fsm = RSP_INS_UNC; 4513 } 4514 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_READ_INS_MISS ) 4507 4515 { 4508 4516 r_vci_rsp_fsm = RSP_INS_MISS; 4509 4517 } 4510 else if ( p_vci_ini_d.rtrdid.read() == TYPE_INS_UNC ) 4511 { 4512 r_vci_rsp_fsm = RSP_INS_UNC; 4513 } 4514 else if ( p_vci_ini_d.rtrdid.read() == TYPE_DATA_MISS ) 4515 { 4516 r_vci_rsp_fsm = RSP_DATA_MISS; 4517 } 4518 else if ( p_vci_ini_d.rtrdid.read() == TYPE_DATA_UNC ) 4518 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_WRITE ) 4519 { 4520 r_vci_rsp_fsm = RSP_DATA_WRITE; 4521 } 4522 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_CAS ) 4519 4523 { 4520 4524 r_vci_rsp_fsm = RSP_DATA_UNC; 4525 } 4526 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_LL ) 4527 { 4528 assert(false and "TODO ! LL NOT IMPLEMENTED YET"); //TODO 4529 //r_vci_rsp_fsm = RSP_DATA_UNC; 4530 } 4531 else if ( (p_vci_ini_d.rpktid.read() & 0x7) == TYPE_SC ) 4532 { 4533 assert(false and "TODO ! SC NOT IMPLEMENTED YET"); //TODO 4534 //r_vci_rsp_fsm = RSP_DATA_UNC; 4521 4535 } 4522 4536 else … … 4850 4864 p_vci_ini_d.pktid = 0; 4851 4865 p_vci_ini_d.srcid = m_srcid_d; 4852 p_vci_ini_d.cons = (r_vci_cmd_fsm.read() == CMD_DATA_ SC);4853 p_vci_ini_d.contig = not (r_vci_cmd_fsm.read() == CMD_DATA_ SC);4866 p_vci_ini_d.cons = (r_vci_cmd_fsm.read() == CMD_DATA_CAS); 4867 p_vci_ini_d.contig = not (r_vci_cmd_fsm.read() == CMD_DATA_CAS); 4854 4868 p_vci_ini_d.wrap = false; 4855 4869 p_vci_ini_d.clen = 0; … … 4864 4878 p_vci_ini_d.be = 0; 4865 4879 p_vci_ini_d.trdid = 0; 4880 p_vci_ini_d.pktid = 0; 4866 4881 p_vci_ini_d.plen = 0; 4867 4882 p_vci_ini_d.cmd = vci_param::CMD_NOP; … … 4874 4889 p_vci_ini_d.wdata = 0; 4875 4890 p_vci_ini_d.be = 0xF; 4876 p_vci_ini_d.trdid = TYPE_INS_MISS; 4891 p_vci_ini_d.trdid = 0; 4892 p_vci_ini_d.pktid = TYPE_READ_INS_MISS; 4877 4893 p_vci_ini_d.plen = m_icache_words<<2; 4878 4894 p_vci_ini_d.cmd = vci_param::CMD_READ; … … 4885 4901 p_vci_ini_d.wdata = 0; 4886 4902 p_vci_ini_d.be = 0xF; 4887 p_vci_ini_d.trdid = TYPE_INS_UNC; 4903 p_vci_ini_d.trdid = 0; 4904 p_vci_ini_d.pktid = TYPE_READ_INS_UNC; 4888 4905 p_vci_ini_d.plen = 4; 4889 4906 p_vci_ini_d.cmd = vci_param::CMD_READ; … … 4896 4913 p_vci_ini_d.wdata = 0; 4897 4914 p_vci_ini_d.be = 0xF; 4898 p_vci_ini_d.trdid = TYPE_DATA_MISS; 4915 p_vci_ini_d.trdid = 0; 4916 p_vci_ini_d.pktid = TYPE_READ_DATA_MISS; 4899 4917 p_vci_ini_d.plen = m_dcache_words << 2; 4900 4918 p_vci_ini_d.cmd = vci_param::CMD_READ; … … 4907 4925 p_vci_ini_d.wdata = 0; 4908 4926 p_vci_ini_d.be = r_dcache_vci_unc_be.read(); 4909 p_vci_ini_d.trdid = TYPE_DATA_UNC; 4927 p_vci_ini_d.trdid = 0; 4928 p_vci_ini_d.pktid = TYPE_READ_DATA_UNC; 4910 4929 p_vci_ini_d.plen = 4; 4911 4930 p_vci_ini_d.cmd = vci_param::CMD_READ; … … 4919 4938 p_vci_ini_d.be = r_wbuf.getBe(r_vci_cmd_cpt.read()); 4920 4939 p_vci_ini_d.trdid = r_wbuf.getIndex() + (1<<(vci_param::T-1)); 4940 p_vci_ini_d.pktid = TYPE_WRITE; 4921 4941 p_vci_ini_d.plen = (r_vci_cmd_max.read() - r_vci_cmd_min.read() + 1) << 2; 4922 4942 p_vci_ini_d.cmd = vci_param::CMD_WRITE; … … 4924 4944 break; 4925 4945 4926 case CMD_DATA_ SC:4946 case CMD_DATA_CAS: 4927 4947 p_vci_ini_d.cmdval = true; 4928 4948 p_vci_ini_d.address = r_dcache_vci_paddr.read() & ~0x3; … … 4930 4950 else p_vci_ini_d.wdata = r_dcache_vci_sc_new.read(); 4931 4951 p_vci_ini_d.be = 0xF; 4932 p_vci_ini_d.trdid = TYPE_DATA_UNC; 4952 p_vci_ini_d.trdid = 0; 4953 p_vci_ini_d.pktid = TYPE_CAS; 4933 4954 p_vci_ini_d.plen = 8; 4934 p_vci_ini_d.cmd = vci_param::CMD_ STORE_COND;4955 p_vci_ini_d.cmd = vci_param::CMD_NOP; 4935 4956 p_vci_ini_d.eop = (r_vci_cmd_cpt.read() == 1); 4936 4957 break;
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