- Timestamp:
- Mar 26, 2013, 11:15:25 AM (12 years ago)
- Location:
- branches/v5/modules
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/v5/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r330 r335 609 609 m_transaction_tab.init(); 610 610 m_update_tab.init(); 611 m_llsc_table.init(); 611 612 612 613 // initializing FIFOs and communication Buffers -
branches/v5/modules/vci_mem_cache_dspin_coherence/caba/source/src/vci_mem_cache_dspin_coherence.cpp
r333 r335 668 668 m_transaction_tab.init(); 669 669 m_update_tab.init(); 670 m_llsc_table.init(); 670 671 671 672 // initializing FIFOs and communication Buffers … … 1335 1336 } 1336 1337 #endif 1337 /* */1338 /* 1338 1339 if(m_monitor_ok) 1339 1340 { … … 1342 1343 check_monitor_read(buf, m_cmd_read_addr_fifo.read()); 1343 1344 } 1344 /**/1345 */ 1345 1346 r_read_fsm = READ_DIR_REQ; 1346 1347 }
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