Changeset 366 for branches/v5/modules/vci_cc_vcache_wrapper/caba/source/src

Timestamp:

Apr 12, 2013, 9:41:35 PM (12 years ago)

Author:

joannou

Message:

In vci_cc_vcache_wrapper v5,

• now using the new generic_cache_tsar write_dir method (that does not affect the tag)

File:

• branches/v5/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp (modified) (12 diffs)

branches/v5/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

@@ -1285 +1285 @@
 #endif
 
-        r_icache.write_dir( 0,
-                            way,
+        r_icache.write_dir( way,
                             set,
                             CACHE_SLOT_STATE_ZOMBI );
@@ -1396 +1395 @@
 m_cpt_icache_dir_write++;
 #endif
-            r_icache.write_dir( 0,
-                                r_icache_miss_way.read(),
+            r_icache.write_dir( r_icache_miss_way.read(),
                                 r_icache_miss_set.read(),
                                 CACHE_SLOT_STATE_ZOMBI );
@@ -1491 +1489 @@
 m_cpt_icache_dir_write++;
 #endif
-        r_icache.write_dir( 0,
-                            r_icache_miss_way.read(),
+        r_icache.write_dir( r_icache_miss_way.read(),
                             r_icache_miss_set.read(),
                             CACHE_SLOT_STATE_ZOMBI);
@@ -1940 +1937 @@
         if (r_icache_cc_need_write.read())
         {
-            r_icache.write_dir( 0,
-                                    r_icache_cc_way.read(),
+            r_icache.write_dir( r_icache_cc_way.read(),
                                     r_icache_cc_set.read(),
                                 CACHE_SLOT_STATE_ZOMBI );
@@ -2150 +2146 @@
                                &cache_word,
                                &cache_state );
+
 #ifdef INSTRUMENTATION
 m_cpt_dcache_dir_read++;
@@ -2370 +2367 @@
                 // checking processor mode:
                 if ( (m_dreq.mode  == iss_t::MODE_USER) &&
-                     (xtn_opcode != iss_t:: XTN_SYNC) &&
+                     (xtn_opcode != iss_t::XTN_SYNC) &&
                      (xtn_opcode != iss_t::XTN_DCACHE_INVAL) &&
                      (xtn_opcode != iss_t::XTN_DCACHE_FLUSH) &&
@@ -2577 +2574 @@
                     // The read requests are taken only if there is no cache update.
                     // We request a VCI transaction to CMD FSM if miss or uncachable
+
                     if ( ((m_dreq.type == iss_t::DATA_READ))
                           and not r_dcache_updt_req.read() )
@@ -3598 +3596 @@
 m_cpt_dcache_dir_write++;
 #endif
-        r_dcache.write_dir( 0,
-                            way,
+        r_dcache.write_dir( way,
                             set,
                             CACHE_SLOT_STATE_ZOMBI );
@@ -3734 +3731 @@
 m_cpt_dcache_dir_write++;
 #endif
-            r_dcache.write_dir( 0,
-                                way,
+            r_dcache.write_dir( way,
                                 set,
                                 CACHE_SLOT_STATE_ZOMBI );
@@ -3871 +3867 @@
 m_cpt_dcache_dir_read++;
 #endif
-        r_dcache.write_dir( 0,
-                            way,
+        r_dcache.write_dir( way,
                             set,
                             CACHE_SLOT_STATE_ZOMBI );
@@ -4675 +4670 @@
 m_cpt_dcache_dir_write++;
 #endif
-                r_dcache.write_dir( 0,
-                                    way,
+                r_dcache.write_dir( way,
                                     set,
                                     CACHE_SLOT_STATE_ZOMBI );
@@ -4877 +4871 @@
                         r_dcache_vci_ll_req.read() or
                         r_dcache_vci_unc_req.read())
-                     or r_vci_cmd_imiss_prio.read() ) ;
+                     or r_vci_cmd_imiss_prio.read() );
+
 
             // 1 - Data Read Miss