Changeset 428 for trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h
- Timestamp:
- Jul 1, 2013, 9:51:00 AM (11 years ago)
- File:
-
- 1 edited
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trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h
r396 r428 1 1 ////////////////////////////////////////////////////////////////////////////// 2 2 // File: tsar_xbar_cluster.h 3 // Author: Alain Greiner 3 // Author: Alain Greiner 4 4 // Copyright: UPMC/LIP6 5 5 // Date : march 2013 … … 38 38 /////////////////////////////////////////////////////////////////////////// 39 39 template<size_t dspin_cmd_width, 40 size_t dspin_rsp_width, 40 size_t dspin_rsp_width, 41 41 typename vci_param_int, 42 typename vci_param_ext> class TsarXbarCluster 42 typename vci_param_ext> class TsarXbarCluster 43 43 /////////////////////////////////////////////////////////////////////////// 44 44 : public soclib::caba::BaseModule … … 46 46 public: 47 47 48 49 sc_in<bool> 50 sc_in<bool> 51 soclib::caba::DspinOutput<dspin_cmd_width>**p_cmd_out;52 soclib::caba::DspinInput<dspin_cmd_width>**p_cmd_in;53 soclib::caba::DspinOutput<dspin_rsp_width> 54 soclib::caba::DspinInput<dspin_rsp_width> 48 // Ports 49 sc_in<bool> p_clk; 50 sc_in<bool> p_resetn; 51 soclib::caba::DspinOutput<dspin_cmd_width> **p_cmd_out; 52 soclib::caba::DspinInput<dspin_cmd_width> **p_cmd_in; 53 soclib::caba::DspinOutput<dspin_rsp_width> **p_rsp_out; 54 soclib::caba::DspinInput<dspin_rsp_width> **p_rsp_in; 55 55 56 56 // interrupt signals 57 sc_signal<bool>signal_false;58 sc_signal<bool>signal_proc_it[8];59 sc_signal<bool>signal_irq_mdma[8];60 sc_signal<bool>signal_irq_mtty[23];61 sc_signal<bool> signal_irq_mnic_rx[8];// unused62 sc_signal<bool> signal_irq_mnic_tx[8];// unused63 sc_signal<bool>signal_irq_bdev;64 65 66 DspinSignals<dspin_cmd_width> signal_dspin_cmd_l2g_d; 67 DspinSignals<dspin_cmd_width> signal_dspin_cmd_g2l_d; 68 DspinSignals<dspin_cmd_width>signal_dspin_m2p_l2g_c;69 DspinSignals<dspin_cmd_width> signal_dspin_m2p_g2l_c; 70 DspinSignals<dspin_rsp_width> signal_dspin_rsp_l2g_d; 71 DspinSignals<dspin_rsp_width> signal_dspin_rsp_g2l_d; 72 DspinSignals<dspin_rsp_width>signal_dspin_p2m_l2g_c;73 DspinSignals<dspin_rsp_width>signal_dspin_p2m_g2l_c;74 75 76 VciSignals<vci_param_int> signal_vci_ini_proc[8]; 77 VciSignals<vci_param_int> signal_vci_ini_mdma; 78 VciSignals<vci_param_int> signal_vci_ini_bdev; 79 80 VciSignals<vci_param_int>signal_vci_tgt_memc;81 VciSignals<vci_param_int>signal_vci_tgt_xicu;82 VciSignals<vci_param_int>signal_vci_tgt_mdma;83 VciSignals<vci_param_int>signal_vci_tgt_mtty;84 VciSignals<vci_param_int>signal_vci_tgt_bdev;85 VciSignals<vci_param_int>signal_vci_tgt_brom;86 VciSignals<vci_param_int>signal_vci_tgt_fbuf;87 VciSignals<vci_param_int>signal_vci_tgt_mnic;88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 57 sc_signal<bool> signal_false; 58 sc_signal<bool> signal_proc_it[8]; 59 sc_signal<bool> signal_irq_mdma[8]; 60 sc_signal<bool> signal_irq_mtty[23]; 61 sc_signal<bool> signal_irq_mnic_rx[8]; // unused 62 sc_signal<bool> signal_irq_mnic_tx[8]; // unused 63 sc_signal<bool> signal_irq_bdev; 64 65 // DSPIN signals between DSPIN routers and local_crossbars 66 DspinSignals<dspin_cmd_width> signal_dspin_cmd_l2g_d; 67 DspinSignals<dspin_cmd_width> signal_dspin_cmd_g2l_d; 68 DspinSignals<dspin_cmd_width> signal_dspin_m2p_l2g_c; 69 DspinSignals<dspin_cmd_width> signal_dspin_m2p_g2l_c; 70 DspinSignals<dspin_rsp_width> signal_dspin_rsp_l2g_d; 71 DspinSignals<dspin_rsp_width> signal_dspin_rsp_g2l_d; 72 DspinSignals<dspin_rsp_width> signal_dspin_p2m_l2g_c; 73 DspinSignals<dspin_rsp_width> signal_dspin_p2m_g2l_c; 74 75 // Direct VCI signals to VCI/DSPIN wrappers 76 VciSignals<vci_param_int> signal_vci_ini_proc[8]; 77 VciSignals<vci_param_int> signal_vci_ini_mdma; 78 VciSignals<vci_param_int> signal_vci_ini_bdev; 79 80 VciSignals<vci_param_int> signal_vci_tgt_memc; 81 VciSignals<vci_param_int> signal_vci_tgt_xicu; 82 VciSignals<vci_param_int> signal_vci_tgt_mdma; 83 VciSignals<vci_param_int> signal_vci_tgt_mtty; 84 VciSignals<vci_param_int> signal_vci_tgt_bdev; 85 VciSignals<vci_param_int> signal_vci_tgt_brom; 86 VciSignals<vci_param_int> signal_vci_tgt_fbuf; 87 VciSignals<vci_param_int> signal_vci_tgt_mnic; 88 89 // Direct DSPIN signals to local crossbars 90 DspinSignals<dspin_cmd_width> signal_dspin_cmd_proc_i[8]; 91 DspinSignals<dspin_rsp_width> signal_dspin_rsp_proc_i[8]; 92 DspinSignals<dspin_cmd_width> signal_dspin_cmd_mdma_i; 93 DspinSignals<dspin_rsp_width> signal_dspin_rsp_mdma_i; 94 DspinSignals<dspin_cmd_width> signal_dspin_cmd_bdev_i; 95 DspinSignals<dspin_rsp_width> signal_dspin_rsp_bdev_i; 96 97 DspinSignals<dspin_cmd_width> signal_dspin_cmd_memc_t; 98 DspinSignals<dspin_rsp_width> signal_dspin_rsp_memc_t; 99 DspinSignals<dspin_cmd_width> signal_dspin_cmd_xicu_t; 100 DspinSignals<dspin_rsp_width> signal_dspin_rsp_xicu_t; 101 DspinSignals<dspin_cmd_width> signal_dspin_cmd_mdma_t; 102 DspinSignals<dspin_rsp_width> signal_dspin_rsp_mdma_t; 103 DspinSignals<dspin_cmd_width> signal_dspin_cmd_mtty_t; 104 DspinSignals<dspin_rsp_width> signal_dspin_rsp_mtty_t; 105 DspinSignals<dspin_cmd_width> signal_dspin_cmd_bdev_t; 106 DspinSignals<dspin_rsp_width> signal_dspin_rsp_bdev_t; 107 DspinSignals<dspin_cmd_width> signal_dspin_cmd_brom_t; 108 DspinSignals<dspin_rsp_width> signal_dspin_rsp_brom_t; 109 DspinSignals<dspin_cmd_width> signal_dspin_cmd_fbuf_t; 110 DspinSignals<dspin_rsp_width> signal_dspin_rsp_fbuf_t; 111 DspinSignals<dspin_cmd_width> signal_dspin_cmd_mnic_t; 112 DspinSignals<dspin_rsp_width> signal_dspin_rsp_mnic_t; 113 114 // Coherence DSPIN signals to local crossbar 115 DspinSignals<dspin_cmd_width> signal_dspin_m2p_memc; 116 DspinSignals<dspin_rsp_width> signal_dspin_p2m_memc; 117 DspinSignals<dspin_cmd_width> signal_dspin_m2p_proc[8]; 118 DspinSignals<dspin_rsp_width> signal_dspin_p2m_proc[8]; 119 120 // external RAM to MEMC VCI signal 121 VciSignals<vci_param_ext> signal_vci_xram; 122 123 123 // Components 124 124 125 VciCcVCacheWrapper<vci_param_int, 125 VciCcVCacheWrapper<vci_param_int, 126 126 dspin_cmd_width, 127 127 dspin_rsp_width, … … 132 132 dspin_rsp_width>* wi_proc[8]; 133 133 134 VciMemCache<vci_param_int, 135 vci_param_ext, 136 dspin_rsp_width, 134 VciMemCache<vci_param_int, 135 vci_param_ext, 136 dspin_rsp_width, 137 137 dspin_cmd_width>* memc; 138 138 … … 201 201 VirtualDspinRouter<dspin_rsp_width>* router_rsp; 202 202 203 204 size_t nb_procs, // processors 205 size_t nb_ttys, // TTY terminals 206 size_t nb_dmas, // DMA channels 203 TsarXbarCluster( sc_module_name insname, 204 size_t nb_procs, // processors 205 size_t nb_ttys, // TTY terminals 206 size_t nb_dmas, // DMA channels 207 207 size_t x, // x coordinate 208 208 size_t y, // y coordinate … … 210 210 const soclib::common::MappingTable &mtd, // internal 211 211 const soclib::common::MappingTable &mtx, // external 212 size_t 213 size_t 214 size_t 215 size_t 216 size_t 212 size_t x_width, // x field bits 213 size_t y_width, // y field bits 214 size_t l_width, // l field bits 215 size_t tgtid_memc, 216 size_t tgtid_xicu, 217 217 size_t tgtid_mdma, 218 218 size_t tgtid_fbuf, … … 224 224 size_t memc_sets, 225 225 size_t l1_i_ways, 226 size_t l1_i_sets, 226 size_t l1_i_sets, 227 227 size_t l1_d_ways, 228 size_t l1_d_sets, 229 size_t xram_latency, // external ram 230 bool io, 228 size_t l1_d_sets, 229 size_t xram_latency, // external ram 230 bool io, // I/O cluster 231 231 size_t xfb, // fbf pixels 232 232 size_t yfb, // fbf lines 233 char* disk_name, // virtual disk 234 size_t block_size, // block size 233 char* disk_name, // virtual disk 234 size_t block_size, // block size 235 235 size_t nic_channels, // number channels 236 char* nic_rx_name, // filename rx 237 char* nic_tx_name, // filename tx 238 uint32_t 239 const Loader &loader, 240 uint32_t frozen_cycles, 236 char* nic_rx_name, // filename rx 237 char* nic_tx_name, // filename tx 238 uint32_t nic_timeout, // cycles 239 const Loader &loader, 240 uint32_t frozen_cycles, 241 241 uint32_t start_debug_cycle, 242 bool memc_debug_ok, 243 bool proc_debug_ok); 242 bool memc_debug_ok, 243 bool proc_debug_ok); 244 244 245 245 };
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