Changeset 440 for branches/v5/modules/vci_mem_cache/caba/source/include/xram_transaction.h

Timestamp:

Jul 17, 2013, 9:24:48 AM (11 years ago)

Author:

cfuguet

Message:

Merging branch/v5/vci_mem_cache with trunk modifications to
start the development of new coherence protocol modifications
in this component

Location:

branches/v5/modules/vci_mem_cache

Files:

• . (modified) (1 prop)
• caba/source/include/xram_transaction.h (modified) (5 diffs)

branches/v5/modules/vci_mem_cache/caba/source/include/xram_transaction.h

@@ -13 +13 @@
 ////////////////////////////////////////////////////////////////////////
 
-class TransactionTabEntry {
-    typedef uint32_t              size_t;
+class TransactionTabEntry 
+{
+    typedef sc_dt::sc_uint<64>    wide_data_t;
+    typedef sc_dt::sc_uint<40>    addr_t;
     typedef uint32_t              data_t;
-    typedef sc_dt::sc_uint<40>    addr_t;
     typedef uint32_t              be_t;
 
@@ -84 +85 @@
     // The print() function prints the entry 
     ////////////////////////////////////////////////////////////////////
-    void print(){
+    void print()
+    {
         std::cout << "valid       = " << valid        << std::endl;
         std::cout << "xram_read   = " << xram_read    << std::endl;
@@ -137 +139 @@
 //                  The transaction tab                              
 ////////////////////////////////////////////////////////////////////////
-class TransactionTab{
-    typedef uint32_t size_t;
-    typedef uint32_t data_t;
-    typedef sc_dt::sc_uint<40> addr_t;
-    typedef uint32_t be_t;
+class TransactionTab
+{
+    typedef sc_dt::sc_uint<64>    wide_data_t;
+    typedef sc_dt::sc_uint<40>    addr_t;
+    typedef uint32_t              data_t;
+    typedef uint32_t              be_t;
 
     private:
-    size_t size_tab;                // The size of the tab
+    const std::string tab_name;                // the name for logs
+    size_t            size_tab;                // the size of the tab
 
     data_t be_to_mask(be_t be)
@@ -176 +180 @@
     }
 
-    TransactionTab(size_t n_entries, size_t n_words)
-    {
-        size_tab = n_entries;
+    TransactionTab(const std::string &name,
+                   size_t            n_entries, 
+                   size_t            n_words )
+    : tab_name( name ),
+      size_tab( n_entries ) 
+    {
         tab = new TransactionTabEntry[size_tab];
-        for ( size_t i=0; i<size_tab; i++) {
+        for ( size_t i=0; i<size_tab; i++) 
+        {
             tab[i].alloc(n_words);
         }
@@ -368 +376 @@
 
     /////////////////////////////////////////////////////////////////////
-    // The write_rsp() function writes a word of the response to an 
-    // XRAM read transaction.
+    // The write_rsp() function writes two 32 bits words of the response 
+    // to a XRAM read transaction.
     // The BE field in TRT is taken into account.
     // Arguments :
     // - index : the index of the transaction in the transaction tab
     // - word_index : the index of the data in the line
-    // - data : the data to write
+    // - data : a 64 bits value
     // - error : invalid data
     /////////////////////////////////////////////////////////////////////
-    void write_rsp(const size_t index,
-            const size_t word,
-            const data_t data,
-            const bool   rerror)
-    {
-        assert( (index < size_tab) 
-                && "Selected entry  out of range in write_rsp() Transaction Tab");
-        assert( (word <= tab[index].wdata_be.size()) 
-                && "Bad word_index in write_rsp() in TransactionTab");
-        assert( tab[index].valid 
-                && "Transaction Tab Entry invalid in write_rsp()");
-        assert( tab[index].xram_read 
-                && "Selected entry is not an XRAM read transaction in write_rsp()");
-
-        data_t mask = be_to_mask(tab[index].wdata_be[word]);
-        tab[index].wdata[word] = (tab[index].wdata[word] & mask) | (data & ~mask);
+    void write_rsp(const size_t      index,
+                   const size_t      word,
+                   const wide_data_t data,
+                   const bool        rerror)
+    {
+        data_t  value;
+        data_t  mask;
+
+        if ( index >= size_tab )
+        { 
+            std::cout << "VCI_MEM_CACHE ERRROR " << tab_name
+                      <<  " TRT entry  out of range in write_rsp()" << std::endl;
+            exit(0);
+        }
+        if ( word > tab[index].wdata_be.size() ) 
+        { 
+            std::cout << "VCI_MEM_CACHE ERRROR " << tab_name
+                      <<  " Bad word_index in write_rsp() in TRT" << std::endl;
+            exit(0);
+        }
+        if ( not tab[index].valid )
+        { 
+            std::cout << "VCI_MEM_CACHE ERRROR " << tab_name
+                      <<  " TRT Entry invalid in write_rsp()" << std::endl;
+            exit(0);
+        }
+        if ( not tab[index].xram_read )
+        { 
+            std::cout << "VCI_MEM_CACHE ERRROR " << tab_name
+                      <<  " TRT entry is not an XRAM GET in write_rsp()" << std::endl;
+            exit(0);
+        }
+
+        // first 32 bits word
+        value = (data_t)data;
+        mask  = be_to_mask(tab[index].wdata_be[word]);
+        tab[index].wdata[word] = (tab[index].wdata[word] & mask) | (value & ~mask);
+
+        // second 32 bits word
+        value = (data_t)(data>>32);
+        mask  = be_to_mask(tab[index].wdata_be[word+1]);
+        tab[index].wdata[word+1] = (tab[index].wdata[word+1] & mask) | (value & ~mask);
+
+        // error update
         tab[index].rerror |= rerror;
     }