- Timestamp:
- Oct 4, 2013, 2:34:03 PM (11 years ago)
- File:
-
- 1 edited
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branches/ODCCP/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r541 r544 3826 3826 // to avoid dead-lock in case of simultaneous ITLB miss 3827 3827 { 3828 // coherence clack request (from DSPIN CLACK) 3829 if ( r_dcache_clack_req.read() ) 3830 { 3831 r_dcache_fsm = DCACHE_CC_CHECK; 3832 r_dcache_fsm_cc_save = r_dcache_fsm.read(); 3833 break; 3834 } 3835 3836 // coherence request (from CC_RECEIVE FSM) 3837 if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read()) 3838 { 3839 r_dcache_fsm = DCACHE_CC_CHECK; 3840 r_dcache_fsm_cc_save = r_dcache_fsm.read(); 3841 break; 3842 } 3843 3828 3844 // itlb miss request 3829 3845 if ( r_icache_tlb_miss_req.read() ) … … 4539 4555 { 4540 4556 r_dcache_content_state[way*m_dcache_sets+set] = LINE_CACHE_DATA_NOT_DIRTY; 4541 r_dcache_tlb_inval_line = r_dcache_cc_send_nline; 4557 if( not r_dcache_cleanup_victim_req.read() ) 4558 r_dcache_tlb_inval_line = r_dcache_cc_send_nline; 4559 else 4560 r_dcache_tlb_inval_line = r_dcache_cleanup_victim_nline.read(); 4542 4561 r_dcache_tlb_inval_set = 0; 4543 4562 r_dcache_fsm_scan_save = DCACHE_MISS_WAIT;
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