Ignore:
Timestamp:
Oct 30, 2013, 11:19:23 AM (11 years ago)
Author:
cfuguet
Message:

Adding support for TSAR platforms using the vci_io_bridge component.

In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/softs/tsar_boot/README.txt

    r554 r568  
    1515             This file is mandatory. This file defines the
    1616             NB_PROCS per cluster, the NB_CLUSTERS and the base address of
    17              the TTY, IOC and XICU devices.
     17             the TTY, IOC, XICU and MEMC (config) devices.
    1818             It defines also:
     19
     20              -> USE_IOB
     21                 This constant is used by the boot_ioc_read function to know
     22                 if the buffer used to store the blocks from the
     23                 block_device must be invalidated in the memory cache after
     24                 the transfert has finished.
    1925
    2026              -> CACHE_COHERENCE
     
    2531
    2632              -> CACHE_LINE_SIZE
    27                  This constant is mandatory if CACHE_COHERENCE=0
     33                 This constant is mandatory if CACHE_COHERENCE=0 or USE_IOB=1
    2834                 This constant defines the size in bytes of a cache line.
    2935
     
    5561                seg_stack_base: Base address of the stack used by processor 0
    5662                during the boot process. read-write data and bss will also
    57                 be there.
     63                be there.
    5864
    5965                seg_boot_base: Base address of the code and read-only data
    60                 defined for this loader
     66                defined for this loader
    6167           
    6268Makefile    Makefile for compile the boot loader.
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