Ignore:
Timestamp:
Oct 30, 2013, 11:19:23 AM (11 years ago)
Author:
cfuguet
Message:

Adding support for TSAR platforms using the vci_io_bridge component.

In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.

File:
1 edited

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