Changeset 586
- Timestamp:
- Dec 4, 2013, 7:59:21 PM (11 years ago)
- Location:
- trunk/softs/tsar_boot
- Files:
-
- 1 added
- 1 deleted
- 6 edited
- 7 moved
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Makefile (modified) (4 diffs)
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conf/platform_tsar_generic_iob/defs_platform.h (modified) (1 diff)
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conf/platform_tsar_generic_iob/ldscript (modified) (1 diff)
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include/defs.h (modified) (1 diff)
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include/reset_ioc.h (moved) (moved from trunk/softs/tsar_boot/include/boot_ioc.h) (2 diffs)
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include/reset_tty.h (moved) (moved from trunk/softs/tsar_boot/include/boot_tty.h) (1 diff)
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include/reset_utils.h (moved) (moved from trunk/softs/tsar_boot/include/boot_utils.h) (2 diffs)
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src/exceptions.c (deleted)
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src/reset.S (modified) (6 diffs)
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src/reset_elf_loader.c (moved) (moved from trunk/softs/tsar_boot/src/boot_elf_loader.c) (14 diffs)
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src/reset_exception.c (added)
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src/reset_ioc.c (moved) (moved from trunk/softs/tsar_boot/src/boot_ioc.c) (12 diffs)
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src/reset_tty.c (moved) (moved from trunk/softs/tsar_boot/src/boot_tty.c) (6 diffs)
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src/reset_utils.c (moved) (moved from trunk/softs/tsar_boot/src/boot_utils.c) (8 diffs)
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src/sdcard.c (modified) (8 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/softs/tsar_boot/Makefile
r502 r586 11 11 DEFS+= -DSOCLIB_IOC 12 12 DTS=platform_soclib.dts 13 $(info Mak ingfor $(PLATFORM_DIR), SocLib variant)13 $(info Make for $(PLATFORM_DIR), SocLib variant) 14 14 else 15 15 DTS=platform_fpga.dts 16 $(info Mak ingfor $(PLATFORM_DIR), FPGA variant)16 $(info Make for $(PLATFORM_DIR), FPGA variant) 17 17 endif 18 18 endif … … 51 51 # ============================================================================= 52 52 53 CFLAGS := -Wall -mno-gpopt -ffreestanding -fomit-frame-pointer -mips32 \ 54 -ggdb -mlong-calls -Werror 53 CFLAGS := -Wall \ 54 -mno-gpopt \ 55 -ffreestanding \ 56 -fomit-frame-pointer \ 57 -mips32 \ 58 -ggdb \ 59 -mlong-calls \ 60 -Werror 55 61 56 C_SRCS := boot_elf_loader.c boot_ioc.c boot_utils.c boot_tty.c exceptions.c 62 C_SRCS := reset_elf_loader.c \ 63 reset_ioc.c \ 64 reset_utils.c \ 65 reset_tty.c \ 66 reset_exception.c 57 67 58 68 ifndef SOCLIB … … 66 76 OBJS := $(addprefix $(BUILD_DIR)/, $(OBJS)) 67 77 68 TARGET := bin.soft78 TARGET := preloader.elf 69 79 70 80 USE_DT ?= 1 … … 72 82 all: $(TARGET) 73 83 74 $(BUILD_DIR)/version.o: $(BUILD_DIR) $(OBJS) version version.sh75 $(ECHO) "[version.sh]"76 ./version.sh > $(BUILD_DIR)/version.c77 $(ECHO) "[ CC ] $(BUILD_DIR)/version.c"78 $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $(BUILD_DIR)/version.c79 $(DU) -D $@ > $@.txt84 # $(BUILD_DIR)/version.o: $(BUILD_DIR) $(OBJS) version version.sh 85 # $(ECHO) "[version.sh]" 86 # ./version.sh > $(BUILD_DIR)/version.c 87 # $(ECHO) "[ CC ] $(BUILD_DIR)/version.c" 88 # $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $(BUILD_DIR)/version.c 89 # $(DU) -D $@ > $@.txt 80 90 81 $(TARGET): $(BUILD_DIR) $( BUILD_DIR)/version.o $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld91 $(TARGET): $(BUILD_DIR) $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld 82 92 $(ECHO) "[ LD ] $@" 83 $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) $(BUILD_DIR)/version.o93 $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) 84 94 $(DU) -D $@ > $@.txt 85 95 -
trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/defs_platform.h
r570 r586 1 #define NB_PROCS 12 #define NB_CLUSTERS 41 #define NB_PROCS 1 2 #define NB_CLUSTERS 4 3 3 4 #define IRQ_PER_PROC 14 #define IRQ_PER_PROC 1 5 5 6 #define USE_IOB 17 #define CACHE_COHERENCE 18 #define CACHE_LINE_SIZE 64//bytes6 #define USE_IOB 1 7 #define CACHE_COHERENCE 1 8 #define CACHE_LINE_SIZE 64 // bytes 9 9 10 #define BOOT_DEBUG 1 11 #define BOOT_DEBUG_IOC 0 10 #define RESET_DEBUG 0 12 11 13 #define ICU_ BASE0xB000000014 #define MCC_ BASE0xB200000015 #define IOC_ BASE0xB300000016 #define TTY_ BASE0xB400000012 #define ICU_PADDR_BASE 0xB0000000 13 #define MCC_PADDR_BASE 0xB2000000 14 #define IOC_PADDR_BASE 0xB3000000 15 #define TTY_PADDR_BASE 0xB4000000 -
trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/ldscript
r570 r586 5 5 **********************************************************/ 6 6 7 /* Definition of the base address for all segments*/7 /* Definition of the base address for code segment */ 8 8 9 seg_stack_base = 0x00040000; 10 seg_boot_base = 0xBFC00000; /* le code de boot */ 9 seg_reset_code_base = 0xBFC00000; 10 11 seg_reset_stack_base = 0x00060000; 12 seg_reset_stack_size = 0x00090000; 11 13 12 14 /* Grouping sections into segments */ 13 15 14 ENTRY(boot) 16 ENTRY(reset) 17 15 18 SECTIONS 16 19 { 17 . = seg_ boot_base;18 .text : {19 *(.boot)20 . = seg_reset_code_base; 21 .text : 22 { 20 23 *(.reset) 21 22 23 24 25 24 *(.rodata) 25 *(.rodata.*) 26 . = ALIGN(0x4); 27 dtb_addr = .; 28 INCLUDE "build/platform.ld"; 26 29 } 27 30 28 . = seg_stack_base; 29 .bss ALIGN(0x4) (NOLOAD) : { 31 . = seg_reset_stack_base; 32 .bss ALIGN(0x4) (NOLOAD) : 33 { 30 34 *(.data) 31 35 *(.bss) -
trunk/softs/tsar_boot/include/defs.h
r425 r586 1 1 #include <defs_platform.h> 2 2 3 #define BOOT_VERSION 0x000100013 #define RESET_VERSION 0x00010002 4 4 5 #define BOOT_STACK_SIZE 0x4000 /* 16 KB*/6 #define BOOT_LOADER_LBA 27 #define PHDR_ARRAY_SIZE 165 #define RESET_STACKS_SIZE 0x11000 /* 64 bytes * 1024 + 4 Kbytes (for P0) = 68 Kbytes */ 6 #define BOOT_LOADER_LBA 2 7 #define PHDR_ARRAY_SIZE 16 8 8 -
trunk/softs/tsar_boot/include/reset_ioc.h
r570 r586 1 #ifndef BOOT_IOC_H2 #define BOOT_IOC_H1 #ifndef RESET_IOC_H 2 #define RESET_IOC_H 3 3 4 4 #ifndef SOCLIB_IOC … … 11 11 12 12 #include <defs.h> 13 #include < boot_tty.h>13 #include <reset_tty.h> 14 14 #include <io.h> 15 15 16 /** 17 * boot_ioc_read() 18 * 19 * Transfer data from a file on the block device to a memory buffer. 20 * 21 * \param lba : first block index on the disk 22 * \param buffer : base address of the memory buffer 23 * \param count : number of blocks to be transfered 24 * 25 * \note This is a blocking function. The function returns once the transfer 26 * has finished 27 */ 28 int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count); 16 extern int reset_ioc_init(); 29 17 30 /** 31 * boot_ioc_init() 32 * 33 * Initialize the SPI controller use to access a SD card 34 */ 35 int boot_ioc_init(); 18 extern int reset_ioc_read( unsigned int lba, 19 void* buffer, 20 unsigned int count ); 36 21 37 /** 38 * boot_dbuf_invalidate() 39 * 40 * Invalidate all data cache lines corresponding to a memory buffer. 41 */ 42 #if (CACHE_COHERENCE == 0) 43 void boot_dbuf_invalidate( 44 const void * buffer, 45 unsigned int line_size, 46 unsigned int size); 47 #endif 22 extern int reset_ioc_completed(); 48 23 49 /** 50 * boot_ioc_write() 51 * 52 * Transfer data from a memory buffer to a file on the block_device. 53 * 54 * \param lba : first block index on the disk 55 * \param buffer : base address of the memory buffer 56 * \param count : number of blocks to be transfered 57 * 58 * \note The source buffer must be in user address space. 59 */ 60 //int boot_ioc_write(unsigned int lba, void* buffer, unsigned int count); 24 extern void reset_buf_invalidate ( const void * buffer, 25 unsigned int line_size, 26 unsigned int size ); 61 27 28 extern void reset_mcc_invalidate( const void * buffer, 29 unsigned int size ); 62 30 #endif 63 31 -
trunk/softs/tsar_boot/include/reset_tty.h
r570 r586 1 #ifndef BOOT_TTY_H2 #define BOOT_TTY_H1 #ifndef RESET_TTY_H 2 #define RESET_TTY_H 3 3 4 #include <io.h> 5 #include <tty.h> 4 # include <tty.h> 6 5 7 void boot_exit();8 int boot_getc(char * c);9 void boot_putc(const char c);10 void boot_puts(const char *buffer);11 void boot_putx(unsigned int val);12 void boot_putd(unsigned int val);6 void reset_exit(); 7 int reset_getc(char * c); 8 void reset_putc(const char c); 9 void reset_puts(const char *buffer); 10 void reset_putx(unsigned int val); 11 void reset_putd(unsigned int val); 13 12 14 13 #endif -
trunk/softs/tsar_boot/include/reset_utils.h
r570 r586 1 /* *2 * \file : boot_utils.h1 /* 2 * \file : reset_utils.h 3 3 * \date : August 2012 4 4 * \author : Cesar Fuguet 5 *6 * Definition of some miscellaneous functions used by the7 * pre-loader8 5 */ 9 6 … … 12 9 13 10 #include <elf-types.h> 14 #include < boot_tty.h>11 #include <reset_tty.h> 15 12 16 /** 17 * memcpy( _dst, _src, size ) 18 * 19 * Transfer data between to memory buffers. 20 * 21 * \param _dst : Destination buffer base address 22 * \param _src : Source buffer base address 23 * \param size : Number of bytes to transfer 24 * 25 */ 26 void * memcpy(void *_dst, const void *_src, unsigned int size); 13 extern unsigned int proctime(); 27 14 28 /** 29 * memset( _dst, value, size ) 30 * 31 * Initialize memory buffers with predefined value. 32 * 33 * \param _dst : Destination buffer base address 34 * \param value : Initialization value 35 * \param size : Number of bytes to initialize 36 * 37 */ 38 void * memset(void *_dst, const int value, unsigned int size); 15 extern void* memcpy(void *_dst, const void *_src, unsigned int size); 39 16 40 /****************************************************************************** 41 * Misc functions for the ELF 42 *****************************************************************************/ 17 extern void* memset(void *_dst, const int value, unsigned int size); 43 18 44 /** 45 * boot_print_elf_phdr( elf_phdr_ptr ) 46 * 47 * Print some fields of a ELF program header 48 * 49 * \param elf_phdr_ptr : Pointer to the ELF program header to print 50 * 51 */ 52 void boot_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr); 19 extern void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr); 53 20 54 21 #endif -
trunk/softs/tsar_boot/src/reset.S
r567 r586 1 /* *1 /* 2 2 * \file : reset.S 3 3 * \date : 01/12/2012 4 4 * \author: Cesar FUGUET & Manuel BOUYER & Alain Greiner 5 5 * 6 * This is a boot code for a generic multi-clusters / multi-processors 7 * TSAR architecture (up to 256 clusters / up to 4 processors per cluster). 8 * There is one XICU, one TTY, one DMA and one stack segment per cluster. 9 * segment base adresses = base + cluster_segment_increment*cluster_id 10 * 11 * - Each processor initializes the Status Register (SR) to disable interrupts. 12 * - Each processor initializes the Count Register. 13 * - Each processor initialises its private XICU Write Triggered Interruption 14 * mask register. 15 * - Only processor 0 initializes the stack pointer ($29). 16 * - Only processor 0 (boot processor) executes the boot_load_elf function to 17 * load in memory the boot loader stored in the block BOOT_LOADER_LBA of 18 * the disk. 19 * - All non-boot processors wait in a low power consumption mode that the 20 * processor 0 wakes them using the IPI (Inter Processor Interruption) 21 * functionality of the XICU device. 6 * This is a generic reset code for a generic multi-clusters / multi-processors 7 * TSAR architecture (up to 256 clusters / up to 4 processors per cluster). 8 * 9 * There is one XICU, one TTY, one DMA, and one memory bank per cluster. 10 * 11 * This preloader uses a stack segment allocated in cluster 0, defined 12 * by the seg_reset_stack_base and seg_reset_stack_size parameters in ldscript. 13 * - Processor 0 uses a larger stack: 64 Kbytes. 14 * - Other processors use a smaller stack: 512 bytes. 15 * => the seg_stack_size cannot be smaller than 0x90000 bytes (576 K). 16 * Those stacks can be used by both the preloader and the boot-loader code. 17 * 18 * The replicated XICU is used to awake the sleeping processors: 19 * xicu_paddr_base = ICU_PADDR_BASE + (cluster_id << 32) 20 * 21 * It is intended to be used with various operating systems or nano kernels, 22 * including NetBSD, ALMOS, and GIET_VM. 23 * 24 * - Each processor initializes its Status Register (SR) to disable interrupts. 25 * - Each processor initializes its Count Register. 26 * - Each processor initialises its private XICU WTI mask register. 27 * - Each processor initializes its Stack Pointer. 28 * - Only processor 0 executes the reset_load_elf function to load into memory 29 * the system specific boot-loader stored on disk at BOOT_LOADER_LBA 30 * - All other processors wait in a low power consumption mode that the 31 * processor 0 wakes them using an IPI (Inter Processor Interruption) 22 32 */ 23 33 … … 25 35 #include <mips32_registers.h> 26 36 27 .section .boot,"ax",@progbits 28 29 .extern seg_stack_base 37 /* These define should be consistent with values defined in ma;xml file */ 38 39 .extern seg_reset_stack_base 40 .extern seg_reset_stack_size 41 42 .section .reset,"ax",@progbits 30 43 31 44 .extern dtb_addr 32 .extern boot_putc33 .extern boot_getc34 .extern boot_ioc_read35 .extern boot_elf_loader45 .extern reset_putc 46 .extern reset_getc 47 .extern reset_ioc_read 48 .extern reset_elf_loader 36 49 .extern memcpy 37 .extern boot_puts38 .extern boot_putx39 .extern boot_putd40 .extern boot_ioc_init50 .extern reset_puts 51 .extern reset_putx 52 .extern reset_putd 53 .extern reset_ioc_init 41 54 .extern versionstr 42 55 43 .globl boot /* Makereset an external symbol */44 .ent boot56 .globl reset /* Makes reset an external symbol */ 57 .ent reset 45 58 46 59 .align 2 47 60 .set noreorder 48 61 49 boot:50 b _ boot/* 0xbfc0000 */62 reset: 63 b _reset /* 0xbfc0000 */ 51 64 nop /* 0xbfc0004 */ 52 65 53 /* Addresses of the functions provided by this pre-loader*/54 55 .word BOOT_VERSION/* 0xbfc0008 */66 /* Addresses of the functions provided by this reset code */ 67 68 .word RESET_VERSION /* 0xbfc0008 */ 56 69 .word dtb_addr /* 0xbfc000c */ 57 .word boot_putc/* 0xbfc0010 */58 .word boot_getc/* 0xbfc0014 */59 .word boot_ioc_read/* 0xbfc0018 */60 .word boot_elf_loader/* 0xbfc001C */70 .word reset_putc /* 0xbfc0010 */ 71 .word reset_getc /* 0xbfc0014 */ 72 .word reset_ioc_read /* 0xbfc0018 */ 73 .word reset_elf_loader /* 0xbfc001C */ 61 74 .word memcpy /* 0xbfc0020 */ 62 .word boot_puts /* 0xbfc0024 */ 63 .word boot_putx /* 0xbfc0028 */ 64 .word boot_putd /* 0xbfc002C */ 65 66 _boot: 67 /* Disable interruptions, keep STATUSbev enabled */ 75 .word reset_puts /* 0xbfc0024 */ 76 .word reset_putx /* 0xbfc0028 */ 77 .word reset_putd /* 0xbfc002C */ 78 79 _reset: 80 81 /* All processors Disable interruptions, keep STATUSbev enabled */ 68 82 69 83 li k0, (1 << 22) 70 84 mtc0 k0, CP0_STATUS 71 85 72 /* Computes proc_id, local_id, cluster_id, andcluster_increment */86 /* All processors compute proc_id, local_id, cluster_id, cluster_increment */ 73 87 74 88 mfc0 k0, CP0_EBASE … … 85 99 sll k1, t2, 8 /* k1 <= 256*cluster_id */ 86 100 div k1, k0 /* LO <= cluster_id * 256 / NB_CLUSTERS */ 87 mflo k1 /* k1<= physical address extension (8 MSB) */88 89 /* Initialization of the count register in the coprocessor0 */101 mflo t7 /* t7 <= physical address extension (8 MSB) */ 102 103 /* All processors initialise the count register in CP0 */ 90 104 91 105 mtc0 zero, CP0_COUNT 92 106 93 /** 94 * Compute the output index for the Write Triggered Interruption mask. 95 * Each processor enable the WTI for its irq output 96 * Each processor may have IRQ_PER_PROC private irq outputs from the XICU 97 * In each cluster, the ICU base address depends on the cluster_id 98 */ 99 100 la t3, ICU_BASE 101 move t4, t1 /* t4 <= local_id */ 102 li t5, IRQ_PER_PROC /* t5 <= IRQ_PER_PROC */ 107 /* 108 * All processors enable the WTI for XICU 109 * Each processor may have IRQ_PER_PROC irq outputs from the XICU 110 * In each cluster, the XICU base address depends on the cluster_id 111 */ 112 113 la t3, ICU_PADDR_BASE /* t3 <= ICU base address */ 114 move t4, t1 /* t4 <= local_id */ 115 li t5, IRQ_PER_PROC /* t5 <= IRQ_PER_PROC */ 103 116 multu t4, t5 104 mflo t6 /* t6 <= IRQ_PER_PROC * local_id */105 sll t4, t6, 2 /* t4 <= OUT_INDEX = t6 * 4 */106 107 li t5, (0xC << 7) /* t5 <= FUNC = XICU_MSK_WTI */108 or t4, t4, t5 /* t4 <= FUNC | INDEX | 00 */109 or t5, t3, t4 /* t5 <= &XICU[MSK_WTI][OUT_INDEX] */117 mflo t6 /* t6 <= IRQ_PER_PROC * local_id */ 118 sll t4, t6, 2 /* t4 <= OUT_INDEX = t6 * 4 */ 119 120 li t5, (0xC << 7) /* t5 <= FUNC = XICU_MSK_WTI */ 121 or t4, t4, t5 /* t4 <= FUNC | INDEX | 00 */ 122 or t5, t3, t4 /* t5 <= &XICU[MSK_WTI][OUT_INDEX] */ 110 123 111 /* Compute andset WTI mask using the physical address extension */124 /* All processors set WTI mask using the physical address extension */ 112 125 113 126 li t4, 1 114 sllv t4, t4, t1 /* Set XICU[MSK_WTI][INDEX][local_id] */ 115 116 mtc2 k1, CP2_PADDR_EXT /* set PADDR extension */ 117 sw t4, 0(t3) /* XICU[MSK_WTI][INDEX] <= t4 */ 118 mtc2 zero, CP2_PADDR_EXT /* reset PADDR extension */ 119 120 /** 127 sllv t4, t4, t1 /* Set XICU[MSK_WTI][INDEX][local_id] */ 128 129 mtc2 t7, CP2_PADDR_EXT /* set PADDR extension */ 130 sw t4, 0(t5) /* XICU[MSK_WTI][INDEX] <= t4 */ 131 mtc2 zero, CP2_PADDR_EXT /* reset PADDR extension */ 132 133 /* All processors initializes stack pointer, depending on proc_id */ 134 135 la k0, seg_reset_stack_base 136 li k1, 0x10000 /* k1 <= P0 stack size == 64 Kbytes */ 137 addu sp, k0, k1 /* P0 stack from base to (base + 64K) */ 138 139 li k1, 0x200 /* k1 <= Pi stack size == 512 bytes */ 140 multu k1, t0 141 mflo k0 /* k0 <= 256 * proc_id */ 142 addu sp, sp, k1 143 addu sp, sp, k0 /* Pi stacks from base + 64K + proc_id*256 */ 144 145 /* 146 * Only processor 0 in cluster 0 loads and executes the boot-loader 121 147 * We have: 122 * t0: global id123 * t1: local id148 * t0: global proc_id 149 * t1: local proc_id 124 150 * t2: cluster id 125 * t3: xicu base address 126 * k1: Paddr extension depending on cluster_id 127 * 128 * Only processor 0 in cluster 0 executes the boot loader 151 * t3: xicu physical base address in cluster 0 152 * t7: paddr extension depending on cluster_id 129 153 */ 130 154 … … 132 156 nop 133 157 134 /* Initializes stack pointer */ 135 136 la sp, stk 137 138 la a0, versionstr 139 la k0, boot_puts 158 /* Processor 0 displays version for this reset code */ 159 160 # la a0, versionstr 161 # la k0, reset_puts 162 # jalr k0 163 # nop 164 165 166 #ifndef SOCLIB_IOC 167 168 /* Processor 0 Initialize the block device if required */ 169 170 la k0, reset_ioc_init 140 171 jalr k0 141 172 nop 142 173 143 #ifndef SOCLIB_IOC144 145 /* Initialize the block device */146 147 la k0, boot_ioc_init148 jalr k0149 nop150 151 174 #endif 152 175 153 /** 154 * Jump to the boot elf loader routine 155 * Passing as argument the block number in which it must be 156 * the executable elf file to load 157 */ 158 159 la k0, boot_elf_loader 176 /* 177 * Processor 0 jumps to the reset_elf_loader routine 178 * Passing as argument the block number in which is loaded the .elf file 179 */ 180 181 la k0, reset_elf_loader 160 182 li a0, BOOT_LOADER_LBA 161 183 jalr k0 162 184 nop 163 185 164 /* *165 * We jump to the entry point address defined in the166 * ELF file. This address is returned by boot_elf_loader function.186 /* 187 * Processor O jumps to the entry address defined in the .elf file, 188 * and returned by reset_elf_loader function. 167 189 * All function arguments are 0 168 190 */ … … 175 197 nop 176 198 177 /** 178 * Wait in low power consumption mode until the application wakes us. 179 * The application wakes up the non-boot CPUs using a IPI with a non-0 180 * value in the mailbox. This non-0 value is the address to jump to. 181 */ 182 183 _reset_wait: 184 /** 199 /* 200 * All processor (but processor 0) wait in low power mode 201 * until processor 0 wakes them using an IPI. 185 202 * We have: 186 203 * t0: global id 187 204 * t1: local id 188 205 * t2: cluster id 189 * t3: xicu base address 190 * k1: Paddr extension depending on cluster_id 191 */ 192 193 sll t4, t1, 2 /* t4 <= local_id * 4 */ 194 addu t5, t4, t3 /* t5 <= &XICU[WTI_REG][local_id] */ 206 * t3: xicu physical base address in cluster 0 207 * t7: Paddr extension depending on cluster_id 208 */ 209 210 _reset_wait: 211 212 sll t4, t1, 2 /* t4 <= local_id * 4 */ 213 addu t5, t4, t3 /* t5 <= &XICU[WTI_REG][local_id] */ 195 214 196 215 wait 197 216 198 /* read the address to jump with a physical read */ 199 200 mtc2 k1, CP2_PADDR_EXT /* set PADDR extension */ 217 /* 218 * All other processors, when exiting wait mode, 219 * read from XICU the address to jump. 220 * This address is the boot-loader entry address that has been 221 * written in the mailbox by the IPI sent by processor 0 222 */ 223 224 mtc2 t7, CP2_PADDR_EXT /* set PADDR extension */ 201 225 lw k0, 0(t5) /* k0 <= XICU[WTI_REG][local_id] */ 202 226 mtc2 zero, CP2_PADDR_EXT /* reset PADDR extension */ … … 206 230 207 231 /* Exception entry point */ 232 208 233 .org 0x0380 209 234 _excep: 210 mfc0 a0, CP0_STATUS /* first arg is status */211 mfc0 a1, CP0_CAUSE /* second arg is cause */212 mfc0 a2, CP0_EPC /* third argc is epc */235 mfc0 a0, CP0_STATUS /* first arg is status */ 236 mfc0 a1, CP0_CAUSE /* second arg is cause */ 237 mfc0 a2, CP0_EPC /* third argc is epc */ 213 238 nop 214 239 j handle_except 215 240 nop 216 241 217 .end boot242 .end reset 218 243 219 244 .set reorder 220 221 .section .data222 .space BOOT_STACK_SIZE223 stk:224 .space 1225 245 226 246 /* -
trunk/softs/tsar_boot/src/reset_elf_loader.c
r570 r586 1 1 /** 2 * \file : boot_elf_loader.c2 * \file : reset_elf_loader.c 3 3 * \date : August 2012 4 4 * \author : Cesar Fuguet 5 5 * 6 * This file defines an elf file loader which reads an executable elf file7 * starting at a sector passed as argument o fa disk and copy the different6 * This file defines an elf file loader which reads an executable .elf file 7 * starting at a sector passed as argument on a disk and copy the different 8 8 * ELF program segments in the appropriate memory address using as information 9 * the virtual address read from the elf file.9 * the virtual address read from the .elf file. 10 10 */ 11 11 12 #include < boot_ioc.h>12 #include <reset_ioc.h> 13 13 #include <elf-types.h> 14 #include < boot_tty.h>15 #include < boot_utils.h>14 #include <reset_tty.h> 15 #include <reset_utils.h> 16 16 #include <defs.h> 17 17 18 #if (BOOT_DEBUG == 1) 19 static char const * const init_state_str[] = { 18 #if (RESET_DEBUG == 1) 19 static char const * const init_state_str[] = 20 { 20 21 "ELF_HEADER_STATE", 21 22 "ELF_PROGRAM_HEADER_STATE", … … 26 27 #endif 27 28 28 unsigned char boot_elf_loader_buffer[512] __attribute__((aligned(CACHE_LINE_SIZE))); 29 30 void * boot_elf_loader(unsigned int lba) 29 unsigned char reset_elf_loader_buffer[512] __attribute__((aligned(CACHE_LINE_SIZE))); 30 31 ///////////////////////////////////////////////////////////////////////////////////// 32 void * reset_elf_loader(unsigned int lba) 33 ///////////////////////////////////////////////////////////////////////////////////// 31 34 { 32 35 /* 33 * Temporary variables used by the bootloader36 * Temporary variables used by the loader 34 37 */ 35 38 Elf32_Ehdr elf_header; … … 67 70 init_state = ELF_HEADER_STATE; 68 71 69 #if ( BOOT_DEBUG == 1)72 #if (RESET_DEBUG == 1) 70 73 elf_loader_t init_state_debug; 71 74 init_state_debug = ELF_END_STATE; 72 75 #endif 73 76 74 boot_puts("Starting boot_elf_loader function...\n\r"); 77 reset_puts("\n[RESET] Start reset_elf_loader at cycle "); 78 reset_putd( proctime() ); 79 reset_puts("\n"); 75 80 76 81 nb_block = lba; … … 86 91 if (nb_available == 0 ) 87 92 { 88 buffer_ptr = & boot_elf_loader_buffer[0];89 90 if ( boot_ioc_read(nb_block , buffer_ptr, 1))93 buffer_ptr = &reset_elf_loader_buffer[0]; 94 95 if (reset_ioc_read(nb_block , buffer_ptr, 1)) 91 96 { 92 boot_puts ( 93 "ERROR: " 94 "boot_ioc_read() failed" 95 "\n" 96 ); 97 98 boot_exit(); 97 reset_puts ("[RESET ERROR] reset_ioc_read() failed\n"); 98 reset_exit(); 99 99 } 100 100 … … 106 106 offset += nb_read; 107 107 108 #if ( BOOT_DEBUG == 1)108 #if (RESET_DEBUG == 1) 109 109 if (init_state != init_state_debug) 110 110 { 111 boot_puts("\ninit_state = ");112 boot_puts(init_state_str[init_state]);113 boot_puts("\n");111 reset_puts("\ninit_state = "); 112 reset_puts(init_state_str[init_state]); 113 reset_puts("\n"); 114 114 init_state_debug = init_state; 115 115 } … … 129 129 { 130 130 nb_rest = elf_ehdr_ptr->e_phnum * elf_ehdr_ptr->e_phentsize; 131 132 131 /* 133 132 * Verification of ELF Magic Number … … 138 137 (elf_ehdr_ptr->e_ident[EI_MAG3] != ELFMAG3) ) 139 138 { 140 boot_puts( 141 "ERROR: " 142 "Input file does not use ELF format" 143 "\n" 144 ); 145 146 boot_exit(); 139 reset_puts("[RESET ERROR] boot-loader file is not an ELF format\n"); 140 reset_exit(); 147 141 } 148 142 … … 154 148 if (elf_ehdr_ptr->e_phnum > PHDR_ARRAY_SIZE) 155 149 { 156 boot_puts( 157 "ERROR: " 158 "ELF PHDR table size is bigger than the allocated" 159 "work space" 160 "\n" 161 ); 162 163 boot_exit(); 150 reset_puts("[RESET ERROR] ELF PHDR table size too large\n"); 151 reset_exit(); 164 152 } 165 153 … … 191 179 if(elf_phdr_ptr[pseg].p_type == PT_LOAD) 192 180 { 193 #if ( BOOT_DEBUG == 1)194 boot_puts("loadable segment found:\n");195 boot_print_elf_phdr(&elf_phdr_ptr[pseg]);181 #if (RESET_DEBUG == 1) 182 reset_puts("loadable segment found:\n"); 183 reset_print_elf_phdr(&elf_phdr_ptr[pseg]); 196 184 #endif 197 185 if (elf_phdr_ptr[pseg].p_offset < offset) … … 218 206 if (pseg == elf_ehdr_ptr->e_phnum) 219 207 { 220 boot_puts( 221 "ERROR: " 222 "No PT_LOAD found" 223 "\n" 224 ); 225 boot_exit(); 208 reset_puts("[RESET ERROR] No PT_LOAD found\n"); 209 reset_exit(); 226 210 } 227 211 … … 270 254 (pseg_start < 0xBFC00000 && pseg_end > 0xBFC10000)) 271 255 { 272 boot_puts( 273 "ERROR: " 274 "Program segment conflits with pre-loader memory space" 275 "\n" 276 ); 277 boot_exit(); 256 reset_puts("[RESET ERROR] conflict with pre-loader memory space\n"); 257 reset_exit(); 278 258 } 279 259 … … 304 284 elf_phdr_ptr[pseg].p_filesz ; 305 285 306 memset(pseg_ptr, 0, pseg_remainder); 307 308 boot_puts("Copied segment at address "); 309 boot_putx(elf_phdr_ptr[pseg].p_vaddr); 310 boot_puts("\n"); 286 // memset(pseg_ptr, 0, pseg_remainder); 287 288 reset_puts("\n[RESET] Segment loaded : address = "); 289 reset_putx(elf_phdr_ptr[pseg].p_vaddr); 290 reset_puts(" / size = "); 291 reset_putx(elf_phdr_ptr[pseg].p_filesz); 292 reset_puts("\n"); 311 293 312 294 /* … … 317 299 if(elf_phdr_ptr[pseg].p_type == PT_LOAD) 318 300 { 319 #if ( BOOT_DEBUG == 1)320 boot_puts("loadable segment found:\n");321 boot_print_elf_phdr(&elf_phdr_ptr[pseg]);301 #if (RESET_DEBUG == 1) 302 reset_puts("loadable segment found:\n"); 303 reset_print_elf_phdr(&elf_phdr_ptr[pseg]); 322 304 #endif 323 305 nb_rest = elf_phdr_ptr[pseg].p_offset - offset; … … 347 329 } 348 330 349 boot_puts ( 350 "Finishing boot_elf_loader function.\n" 351 "Entry point address: " 352 ); 353 354 boot_putx(elf_ehdr_ptr->e_entry); 355 boot_puts("\n"); 331 reset_puts("\n[RESET] Complete reset_elf_loader at cycle "); 332 reset_putd( proctime() ); 333 reset_puts(" / boot entry = "); 334 reset_putx( (unsigned int)(elf_ehdr_ptr->e_entry) ); 335 reset_puts("\n"); 356 336 357 337 return ((void *) elf_ehdr_ptr->e_entry); -
trunk/softs/tsar_boot/src/reset_ioc.c
r570 r586 1 #include < boot_ioc.h>1 #include <reset_ioc.h> 2 2 3 3 #ifndef SOCLIB_IOC 4 4 5 static struct sdcard_dev _sdcard_device;5 static struct sdcard_dev _sdcard_device; 6 6 static struct spi_dev *const _spi_device = ( struct spi_dev * )IOC_BASE; 7 7 8 #endif // end ifndef SOCLIB_IOC 9 10 #define SDCARD_RESET_ITER_MAX 4 11 12 inline void boot_sleep(int cycles) 8 #endif 9 10 #define SDCARD_RESET_ITER_MAX 4 11 12 /////////////////////////////////// 13 inline void reset_sleep(int cycles) 13 14 { 14 15 int i; … … 16 17 } 17 18 18 #if (BOOT_DEBUG == 1 && BOOT_DEBUG_IOC == 1) 19 inline unsigned int boot_proctime() 19 #if RESET_DEBUG 20 //////////////////////////////////// 21 inline unsigned int reset_proctime() 20 22 { 21 23 unsigned int ret; … … 26 28 27 29 #ifndef SOCLIB_IOC 28 int boot_ioc_init() 30 ///////////////////////////////////////////////////////////////////////////////// 31 // reset_ioc_init 32 // This function initializes the SDCARD / required for FPGA. 33 ///////////////////////////////////////////////////////////////////////////////// 34 int reset_ioc_init() 29 35 { 30 36 unsigned char sdcard_rsp; 31 37 32 boot_puts("Initializing block device\n\r");38 reset_puts("Initializing block device\n\r"); 33 39 34 40 /** … … 50 56 while(1) 51 57 { 52 boot_puts("Trying to initialize SD card... ");58 reset_puts("Trying to initialize SD card... "); 53 59 54 60 sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); 55 61 if (sdcard_rsp == 0) 56 62 { 57 boot_puts("OK\n");63 reset_puts("OK\n"); 58 64 break; 59 65 } 60 66 61 boot_puts("KO\n");62 boot_sleep(1000);67 reset_puts("KO\n"); 68 reset_sleep(1000); 63 69 if (++iter >= SDCARD_RESET_ITER_MAX) 64 70 { 65 boot_puts("\nERROR: During SD card reset to IDLE state\n"71 reset_puts("\nERROR: During SD card reset to IDLE state\n" 66 72 "/ card response = "); 67 boot_putx(sdcard_rsp);68 boot_puts("\n");69 boot_exit();73 reset_putx(sdcard_rsp); 74 reset_puts("\n"); 75 reset_exit(); 70 76 } 71 77 } … … 77 83 if (sdcard_rsp) 78 84 { 79 boot_puts("ERROR: During SD card blocklen initialization\n");80 boot_exit();85 reset_puts("ERROR: During SD card blocklen initialization\n"); 86 reset_exit(); 81 87 } 82 88 … … 93 99 ); 94 100 95 boot_puts("Finish block device initialization\n\r");101 reset_puts("Finish block device initialization\n\r"); 96 102 97 103 return 0; 98 } 99 #endif // end ifndef SOCLIB_IOC 100 101 /** 102 * _boot_ioc_completed() 103 * 104 * This blocking function checks completion of an I/O transfer and reports errors. 105 * 106 * \note It returns 0 if the transfer is successfully completed. 107 * It returns -1 if an error has been reported. 108 */ 104 } // end reset_ioc_init() 105 #endif 106 109 107 #ifdef SOCLIB_IOC 110 static int _boot_ioc_completed() 108 ///////////////////////////////////////////////////////////////////////////////////// 109 // reset_ioc_completed() 110 // This blocking function checks completion of an I/O transfer and reports errors. 111 // It returns 0 if the transfer is successfully completed. 112 // It returns -1 if an error has been reported. 113 ///////////////////////////////////////////////////////////////////////////////////// 114 int reset_ioc_completed() 111 115 { 112 116 unsigned int status = 0; 113 117 114 115 unsigned int * ioc_address = ( unsigned int * )IOC_BASE; 118 unsigned int * ioc_address = ( unsigned int * )IOC_PADDR_BASE; 116 119 117 120 while ( 1 ) … … 125 128 126 129 return status; 127 } 128 #endif 129 130 /** 131 * boot_ioc_read() 132 * 133 * Transfer data from a file on the block device to a memory buffer. 134 * 135 * \param lba : first block index on the disk 136 * \param buffer : base address of the memory buffer 137 * \param count : number of blocks to be transfered 138 * 139 * \note This is a blocking function. The function returns once the transfer 140 * has finished 141 */ 130 } // end reset_ioc_completed() 131 #endif 142 132 143 133 #ifdef SOCLIB_IOC 144 /////////////////////////////////////////////////////////////////////////////// 145 // SOCLIB version of the boot_ioc_read function 146 147 void boot_buf_invalidate ( 148 const void * buffer, 149 unsigned int line_size, 150 unsigned int size); 151 152 void boot_mcc_invalidate ( 153 const void * buffer, 154 unsigned int size); 155 156 int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count) 157 { 158 159 unsigned int * ioc_address = (unsigned int*)IOC_BASE; 160 161 #if (BOOT_DEBUG == 1 && BOOT_DEBUG_IOC == 1) 134 ///////////////////////////////////////////////////////////////////////////////////// 135 // reset_ioc_read() 136 // Transfer data the block device to a memory buffer: SOCLIB version 137 // - param lba : first block index on the disk 138 // - param buffer : base address of the memory buffer 139 // - param count : number of blocks to be transfered 140 // This is a blocking function. The function returns once the transfer is completed. 141 ///////////////////////////////////////////////////////////////////////////////////// 142 int reset_ioc_read( unsigned int lba, 143 void* buffer, 144 unsigned int count ) 145 { 146 147 unsigned int * ioc_address = (unsigned int*)IOC_PADDR_BASE; 148 149 #if RESET_DEBUG 162 150 unsigned int start_time; 163 151 unsigned int end_time; 164 boot_puts("[ DEBUG] Reading blocks ");165 boot_putd(lba);166 boot_puts(" to ");167 boot_putd(lba + count - 1);168 169 start_time = boot_proctime();152 reset_puts("[RESET DEBUG] Reading blocks "); 153 reset_putd(lba); 154 reset_puts(" to "); 155 reset_putd(lba + count - 1); 156 157 start_time = reset_proctime(); 170 158 #endif 171 159 … … 186 174 ( unsigned int ) BLOCK_DEVICE_READ ); 187 175 188 _boot_ioc_completed();176 reset_ioc_completed(); 189 177 190 178 #if (CACHE_COHERENCE == 0) || (USE_IOB == 1) 191 boot_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512); 192 #endif 193 194 #if (USE_IOB == 1) 195 boot_mcc_invalidate(buffer, count * 512); 196 #endif 197 198 #if (BOOT_DEBUG == 1 && BOOT_DEBUG_IOC == 1) 199 end_time = boot_proctime(); 200 201 boot_puts(" / cycles for transfert: "); 202 boot_putd(end_time - start_time); 203 boot_puts("\n"); 179 reset_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512); 180 #endif 181 182 #if USE_IOB 183 reset_mcc_invalidate(buffer, count * 512); 184 #endif 185 186 #if RESET_DEBUG 187 end_time = reset_proctime(); 188 reset_puts(" / cycles for transfert: "); 189 reset_putd(end_time - start_time); 190 reset_puts("\n"); 204 191 #endif 205 192 206 193 return 0; 207 } 194 } // end reset_ioc_read() 208 195 209 196 #else 210 197 211 /////////////////////////////////////////////////////////////////////////////// 212 // FPGA version of the boot_ioc_read function 213 214 int boot_ioc_read(unsigned int lba, void* buffer, unsigned int count) 198 ///////////////////////////////////////////////////////////////////////////////////// 199 // reset_ioc_read() 200 // Transfer data the block device to a memory buffer: FPGA version 201 // - param lba : first block index on the disk 202 // - param buffer : base address of the memory buffer 203 // - param count : number of blocks to be transfered 204 // This is a blocking function. The function returns once the transfer is completed. 205 ///////////////////////////////////////////////////////////////////////////////////// 206 int reset_ioc_read( unsigned int lba, 207 void* buffer, 208 unsigned int count ) 215 209 { 216 210 unsigned int sdcard_rsp; … … 219 213 sdcard_dev_lseek(&_sdcard_device, lba); 220 214 221 #if (BOOT_DEBUG ==1 && BOOT_DEBUG_IOC == 1)215 #if RESET_DEBUG 222 216 unsigned int start_time; 223 217 unsigned int end_time; 224 boot_puts("[ DEBUG ] Reading blocks "); 225 boot_putd(lba); 226 boot_puts(" to "); 227 boot_putd(lba + count - 1); 228 229 start_time = boot_proctime(); 218 reset_puts("[RESET DEBUG] Reading blocks "); 219 reset_putd(lba); 220 reset_puts(" to "); 221 reset_putd(lba + count - 1); 222 start_time = reset_proctime(); 230 223 #endif 231 224 … … 239 232 )) 240 233 { 241 boot_puts("ERROR during read on the SDCARD device. Code: ");242 boot_putx(sdcard_rsp);243 boot_puts("\n\r");234 reset_puts("ERROR during read on the SDCARD device. Code: "); 235 reset_putx(sdcard_rsp); 236 reset_puts("\n\r"); 244 237 245 238 return 1; … … 247 240 } 248 241 249 #if (BOOT_DEBUG == 1 && BOOT_DEBUG_IOC == 1) 250 end_time = boot_proctime(); 251 252 boot_puts(" / cycles for transfert: "); 253 boot_putd(end_time - start_time); 254 boot_puts("\n"); 242 #if RESET_DEBUG 243 end_time = reset_proctime(); 244 reset_puts(" / cycles for transfert: "); 245 reset_putd(end_time - start_time); 246 reset_puts("\n"); 255 247 #endif 256 248 257 249 return 0; 258 } 259 #endif 260 261 /** 262 * _dcache_buf_invalidate() 263 * 264 * Invalidate all data cache lines corresponding to a memory 265 * buffer (identified by an address and a size). 266 */ 250 } // end reset_ioc_read() 251 #endif 252 253 ////////////////////////////////////////////////////////////////////////////// 254 // reset_dcache_buf_invalidate() 255 // Invalidate all data cache lines corresponding to a memory buffer 256 // (identified by an address and a size) in L1 cache. 257 ///////////////////////////////////////////////////////////////////////////// 267 258 #if (CACHE_COHERENCE == 0) || (USE_IOB == 1) 268 void boot_buf_invalidate ( 269 const void * buffer, 270 unsigned int line_size, 271 unsigned int size) 259 void reset_buf_invalidate ( const void * buffer, 260 unsigned int line_size, 261 unsigned int size) 272 262 { 273 263 unsigned int i; 274 264 275 265 // iterate on cache lines 276 for (i = 0; i <= size; i += line_size) { 266 for (i = 0; i <= size; i += line_size) 267 { 277 268 asm volatile( 278 269 " cache %0, %1" … … 284 275 #endif 285 276 286 /** 287 * boot_mcc_inval() 288 * 289 * Invalidate all data cache lines corresponding to a memory 290 * buffer (identified by an address and a size). 291 */ 292 #if (USE_IOB == 1) 293 void boot_mcc_invalidate ( 294 const void * buffer, 295 unsigned int size) 296 { 297 unsigned int * mcc_address = (unsigned int *)MCC_BASE; 277 ////////////////////////////////////////////////////////////////////////////// 278 // reset_mcc_inval() 279 // Invalidate all data cache lines corresponding to a memory buffer 280 // (identified by an address and a size) in L2 cache. 281 ///////////////////////////////////////////////////////////////////////////// 282 #if USE_IOB 283 void reset_mcc_invalidate ( const void * buffer, 284 unsigned int size) 285 { 286 unsigned int * mcc_address = (unsigned int *)MCC_PADDR_BASE; 298 287 299 288 // get the hard lock assuring exclusive access to MEMC -
trunk/softs/tsar_boot/src/reset_tty.c
r570 r586 1 #include <boot_tty.h> 1 #include <reset_tty.h> 2 #include <io.h> 2 3 #include <defs.h> 3 4 4 int boot_getc(char *c) 5 /////////////////////// 6 int reset_getc(char *c) 5 7 { 6 unsigned int* tty_address = (unsigned int*) TTY_ BASE;8 unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE; 7 9 if (ioread32(&tty_address[TTY_STATUS]) == 0) 8 10 return 0; … … 12 14 } 13 15 14 void boot_putc(const char c) 16 ///////////////////////////// 17 void reset_putc(const char c) 15 18 { 16 unsigned int* tty_address = (unsigned int*) TTY_ BASE;19 unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE; 17 20 iowrite32(&tty_address[TTY_WRITE], (unsigned int)c); 18 21 … … 23 26 } 24 27 25 void boot_puts(const char *buffer) 28 /////////////////////////////////// 29 void reset_puts(const char *buffer) 26 30 { 27 31 unsigned int n; … … 31 35 if (buffer[n] == 0) break; 32 36 33 boot_putc(buffer[n]);37 reset_putc(buffer[n]); 34 38 } 35 39 } 36 40 37 void boot_putx(unsigned int val) 41 ///////////////////////////////// 42 void reset_putx(unsigned int val) 38 43 { 39 44 static const char HexaTab[] = "0123456789ABCDEF"; … … 50 55 val = val >> 4; 51 56 } 52 boot_puts(buf);57 reset_puts(buf); 53 58 } 54 59 55 void boot_putd(unsigned int val) 60 ///////////////////////////////// 61 void reset_putd(unsigned int val) 56 62 { 57 63 static const char DecTab[] = "0123456789"; … … 75 81 val /= 10; 76 82 } 77 boot_puts( &buf[first] );83 reset_puts( &buf[first] ); 78 84 } 79 85 80 void boot_exit() 86 ///////////////// 87 void reset_exit() 81 88 { 82 89 register int pid; 83 90 asm volatile( "mfc0 %0, $15, 1": "=r"(pid) ); 84 91 85 boot_puts("\n!!! Exit Processor ");86 boot_putx(pid);87 boot_puts(" !!!\n");92 reset_puts("\n!!! Exit Processor "); 93 reset_putx(pid); 94 reset_puts(" !!!\n"); 88 95 89 96 while(1) asm volatile("nop"); // infinite loop... 90 97 } 91 98 99 100 -
trunk/softs/tsar_boot/src/reset_utils.c
r570 r586 1 1 /** 2 * \file : boot_utils.c2 * \file : reset_utils.c 3 3 * \date : August 2012 4 4 * \author : Cesar Fuguet 5 5 * 6 * Definition of some miscellaneous functions used in by the 7 * pre-loader 6 * Definition of utilities functions used by the TSAR pre-loader 8 7 */ 9 8 10 #include < boot_utils.h>9 #include <reset_utils.h> 11 10 12 /** 11 /***************************************** 12 * proctime() 13 * 14 * Returns processor local time. 15 ****************************************/ 16 inline unsigned int proctime() 17 { 18 unsigned int ret; 19 asm volatile ("mfc0 %0, $9":"=r" (ret)); 20 return ret; 21 } 22 23 /***************************************** 13 24 * memcpy( _dst, _src, size ) 14 25 * 15 * Transfer data between t o memory buffers.26 * Transfer data between two memory buffers. 16 27 * 17 28 * \param _dst : Destination buffer base address … … 19 30 * \param size : Number of bytes to transfer 20 31 * 21 * /32 ****************************************/ 22 33 void * memcpy(void *_dst, const void *_src, unsigned int size) 23 34 { … … 25 36 const unsigned int *src = _src; 26 37 if ( ! ((unsigned int)dst & 3) && ! ((unsigned int)src & 3) ) 27 while (size > 3) { 38 while (size > 3) 39 { 28 40 *dst++ = *src++; 29 41 size -= 4; … … 33 45 unsigned char *csrc = (unsigned char*) src; 34 46 35 while (size--) { 47 while (size--) 48 { 36 49 *cdst++ = *csrc++; 37 50 } … … 39 52 } 40 53 41 /** 54 /***************************************** 42 55 * memset( _dst, value, size ) 43 56 * … … 48 61 * \param size : Number of bytes to initialize 49 62 * 50 * /63 ****************************************/ 51 64 void * memset(void *_dst, const int value, unsigned int size) 52 65 { … … 58 71 } 59 72 60 /* 61 * Misc functions for the ELF format 62 */ 63 64 /** 65 * boot_print_elf_phdr( elf_phdr_ptr ) 73 /***************************************** 74 * reset_print_elf_phdr( elf_phdr_ptr ) 66 75 * 67 76 * Print some fields of a ELF program header … … 69 78 * \param elf_phdr_ptr : Pointer to the ELF program header to print 70 79 * 71 * /72 void boot_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr)80 ****************************************/ 81 void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr) 73 82 { 74 boot_puts("- type : ");75 boot_putx(elf_phdr_ptr->p_type);83 reset_puts("- type : "); 84 reset_putx(elf_phdr_ptr->p_type); 76 85 77 boot_puts("\n- offset : ");78 boot_putx(elf_phdr_ptr->p_offset);86 reset_puts("\n- offset : "); 87 reset_putx(elf_phdr_ptr->p_offset); 79 88 80 boot_puts("\n- vaddr : ");81 boot_putx(elf_phdr_ptr->p_vaddr);89 reset_puts("\n- vaddr : "); 90 reset_putx(elf_phdr_ptr->p_vaddr); 82 91 83 boot_puts("\n- paddr : ");84 boot_putx(elf_phdr_ptr->p_paddr);92 reset_puts("\n- paddr : "); 93 reset_putx(elf_phdr_ptr->p_paddr); 85 94 86 boot_puts("\n- filesz : ");87 boot_putx(elf_phdr_ptr->p_filesz);95 reset_puts("\n- filesz : "); 96 reset_putx(elf_phdr_ptr->p_filesz); 88 97 89 boot_puts("\n- memsz : ");90 boot_putx(elf_phdr_ptr->p_memsz);98 reset_puts("\n- memsz : "); 99 reset_putx(elf_phdr_ptr->p_memsz); 91 100 92 boot_puts("\n- flags : ");93 boot_putx(elf_phdr_ptr->p_flags);101 reset_puts("\n- flags : "); 102 reset_putx(elf_phdr_ptr->p_flags); 94 103 95 boot_puts("\n- align : ");96 boot_putx(elf_phdr_ptr->p_align);104 reset_puts("\n- align : "); 105 reset_putx(elf_phdr_ptr->p_align); 97 106 } 98 107 -
trunk/softs/tsar_boot/src/sdcard.c
r501 r586 8 8 9 9 #include <sdcard.h> 10 #include < boot_tty.h>10 #include <reset_tty.h> 11 11 12 12 /** … … 184 184 if ( sdcard_rsp != 0x01 ) 185 185 { 186 boot_puts("card CMD0 failed ");186 reset_puts("card CMD0 failed "); 187 187 return sdcard_rsp; 188 188 } … … 200 200 sdcard_rsp = _sdcard_send_command(sdcard, 8, SDCARD_CMD, args, 0x63); 201 201 if (!SDCARD_CHECK_R1_VALID(sdcard_rsp)) { 202 boot_puts("card CMD8 failed ");202 reset_puts("card CMD8 failed "); 203 203 return sdcard_rsp; 204 204 } … … 211 211 if ((ersp & 0xffff) != 0x0101) { 212 212 /* voltage mismatch */ 213 boot_puts("card CMD8 mismatch: ");214 boot_putx(ersp);213 reset_puts("card CMD8 mismatch: "); 214 reset_putx(ersp); 215 215 return sdcard_rsp; 216 216 } 217 boot_puts("v2 or later ");217 reset_puts("v2 or later "); 218 218 sdcard->sdhc = 1; 219 219 } else if ((sdcard_rsp & SDCARD_R1_ILLEGAL_CMD) == 0) { 220 220 /* other error */ 221 boot_puts("card CMD8 error ");221 reset_puts("card CMD8 error "); 222 222 return sdcard_rsp; 223 223 } else { … … 246 246 _sdcard_disable(sdcard); 247 247 if (sdcard_rsp) { 248 boot_puts("SD ACMD41 failed ");248 reset_puts("SD ACMD41 failed "); 249 249 return sdcard_rsp; 250 250 } … … 259 259 args, 0x00); 260 260 if (sdcard_rsp) { 261 boot_puts("SD CMD58 failed ");261 reset_puts("SD CMD58 failed "); 262 262 return sdcard_rsp; 263 263 } … … 267 267 ersp = (ersp << 8) | _sdcard_receive_char(sdcard); 268 268 if (ersp & 0x40000000) { 269 boot_puts("SDHC ");269 reset_puts("SDHC "); 270 270 } else { 271 271 sdcard->sdhc = 0; … … 273 273 _sdcard_disable(sdcard); 274 274 } 275 boot_puts("card detected ");275 reset_puts("card detected "); 276 276 return 0; 277 277 }
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