Changeset 628 for trunk

Timestamp:

Feb 12, 2014, 9:43:49 AM (11 years ago)

Author:

alain

Message:

Introducing the vci_iopic component in the tsar_generic_leti plat-form.
This platform has been tested wit three distributed applications
running on top of the giet_tsar:

• soft_hello_giet
• soft_transpose_giet
• soft_sort_giet

Location:

trunk/platforms/tsar_generic_leti

Files:

• Makefile (modified) (1 diff)
• top.cpp (modified) (29 diffs)
• top.desc (modified) (1 diff)
• tsar_leti_cluster/caba/metadata/tsar_leti_cluster.sd (modified) (5 diffs)
• tsar_leti_cluster/caba/source/include/tsar_leti_cluster.h (modified) (11 diffs)
• tsar_leti_cluster/caba/source/src/tsar_leti_cluster.cpp (modified) (21 diffs)

trunk/platforms/tsar_generic_leti/Makefile

@@ -4 +4 @@
 clean:
         soclib-cc -x -p top.desc -I.
-        rm -rf *.o *.x term*
+        rm -rf *.o *.x term* tty* ext* temp

trunk/platforms/tsar_generic_leti/top.cpp

@@ -3 +3 @@
 // Author: Alain Greiner 
 // Copyright: UPMC/LIP6
-// Date : may 2013
+// Date : february 2014
 // This program is released under the GNU public license
 /////////////////////////////////////////////////////////////////////////
@@ -13 +13 @@
 // to be 0xBFC00000 and 0x80000000.
 //
-// It does not use an external ROM, as the boot code is stored
+// It does not use an external ROM, as the boot code must be (pre)loaded
 // in cluster (0,0) memory.
 //
@@ -19 +19 @@
 // The 8 address MSB bits define the cluster index.
 //
+// The main hardware parameters are the mesh size (X_SIZE / Y_SIZE),
+// and the number of ptocessors per cluster (NB_PROCS_MAX).
 // The number of clusters cannot be larger than 256.
 // The number of processors per cluster cannot be larger than 4.
 // 
-// - It uses four dspin_local_crossbar per cluster as local interconnect 
-// - It uses two virtual_dspin routers per cluster as global interconnect
-// - It uses the vci_cc_vcache_wrapper 
-// - It uses the vci_mem_cache
-// - It contains one vci_xicu per cluster.
-// - It contains one vci_multi_dma per cluster.
-// - It contains one vci_simple_ram per cluster to model the L3 cache.
+// Each cluster contains:
+// - 5 dspin_local_crossbar (local interconnect)
+// - 5 dspin_router (global interconnect)
+// - up to 4 vci_cc_vcache wrapping a MIPS32 processor
+// - 1 vci_mem_cache
+// - 1 vci_xicu
+// - 1 vci_simple_ram (to model the L3 cache).
 //
-// The communication between the MemCache and the Xram is 64 bits.
+// Each processor receive 4 consecutive IRQ lines from the local XICU.
+// In all clusters, the MEMC IRQ line (signaling a late write error)
+// is connected to XICU HWI[8]
 //
-// All clusters are identical, but the cluster 0 (called io_cluster), 
-// contains 6 extra components:
-// - the disk controller (BDEV)
-// - the multi-channel network controller (MNIC)
-// - the multi-channel chained buffer dma controller (CDMA)
-// - the multi-channel tty controller (MTTY)
-// - the frame buffer controller (FBUF)
+// The cluster 0 contains two more peripherals:
+// - one block device controller, whose IRQ is connected to XICU HWI[9].
+// - one single channel TTY controller, whose IRQ is connected to XICU HWI[10].
 //
-// It is build with one single component implementing a cluster,
-// defined in files tsar_leti_cluster.* (with * = cpp, h, sd)
+// The cluster internal architecture is defined in file tsar_leti_cluster,
+// that must be considered as an extension of this top.cpp file.
 //
-// The IRQs are connected to XICUs as follow:
-// - The BDEV IRQ is connected to IRQ_IN[0] in I/O cluster.
-// - The IRQ_IN[1] to IRQ_IN[7] ports are not used in all clusters.
-// - The DMA IRQs are connected to IRQ_IN[8:11] in all clusters.
-// - The MEMC IRQ is connected to IRQ_IN[12] in all clusters.
-// - The TTY IRQs are connected to IRQ_IN[16:31] in I/O cluster.
-// 
-// Some hardware parameters are used when compiling the OS, and are used 
-// by this top.cpp file. They must be defined in the hard_config.h file :
+// Besides the hardware components contained in clusters, external peripherals 
+// are connected to an external IO bus (implemented as a vci_local_crossbar):
+// - one disk controller 
+// - one multi-channel ethernet controller 
+// - one multi-channel chained buffer dma controller
+// - one multi-channel tty controller 
+// - one frame buffer controller 
+// - one 16 channels iopic controller
+//
+// This IOBUS is connected to the north  port of the DIR_CMD 
+// and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-1).
+// For all external peripherals, the hardware interrupts (HWI) are
+// translated to software interrupts (SWI) by the iopic component:
+// - IRQ_MNIC_RX[1:0]   connected to IOPIC HWI[1:0]
+// - IRQ_MNIC_TX[1:0]   connected to IOPIC HWI[3:2]
+// - IRQ_CDMA[3:0]      connected to IOPIC HWI[7:4]
+// - IRQ_BDEV           connected to IOPIC HWI[9] 
+// - IRQ_MTTY[3:0]      connected to IOPIC HWI[15:12]
+////////////////////////////////////////////////////////////////////////////
+// The following parameters must be defined in the hard_config.h file :
 // - X_WIDTH          : number of bits for x coordinate (must be 4)
 // - Y_WIDTH          : number of bits for y coordinate (must be 4)
 // - X_SIZE           : number of clusters in a row 
 // - Y_SIZE           : number of clusters in a column 
-// - NB_PROCS_MAX     : number of processors per cluster (power of 2)
-// - NB_DMA_CHANNELS  : number of DMA channels per cluster (< 9)
-// - NB_TTY_CHANNELS  : number of TTY channels in I/O cluster (< 17)
-// - NB_NIC_CHANNELS  : number of NIC channels in I/O cluster (< 9)
+// - NB_PROCS_MAX     : number of processors per cluster (1, 2 or 4)
+// - NB_CMA_CHANNELS  : number of CMA channels in I/0 cluster (8 max)
+// - NB_TTY_CHANNELS  : number of TTY channels in I/O cluster (16 max)
+// - NB_NIC_CHANNELS  : number of NIC channels in I/O cluster (2 max)
+// - USE_EXT_IO       : use external peripherals if non zero
 // 
 // Some other hardware parameters are not used when compiling the OS,
-// and can be directly defined in this top.cpp file:
+// and are only defined in this top.cpp file:
 // - XRAM_LATENCY     : external ram latency 
 // - MEMC_WAYS        : L2 cache number of ways
 // - MEMC_SETS        : L2 cache number of sets
-// - L1_IWAYS     
-// - L1_ISETS    
-// - L1_DWAYS   
-// - L1_DSETS  
+// - L1_IWAYS         : L1 cache instruction number of ways
+// - L1_ISETS         : L1 cache instruction number of sets
+// - L1_DWAYS         : L1 cache data number of ways
+// - L1_DSETS         : L1 cache data number of sets
 // - FBUF_X_SIZE      : width of frame buffer (pixels)
 // - FBUF_Y_SIZE      : heigth of frame buffer (lines)
-// - BDEV_SECTOR_SIZE : block size for block drvice
 // - BDEV_IMAGE_NAME  : file pathname for block device 
 // - NIC_RX_NAME      : file pathname for NIC received packets
 // - NIC_TX_NAME      : file pathname for NIC transmited packets
-// - NIC_TIMEOUT      : max number of cycles before closing a container
+// - NIC_MAC4         : MAC address
+// - NIC_MAC2         : MAC address
 /////////////////////////////////////////////////////////////////////////
 // General policy for 40 bits physical address decoding:
@@ -103 +115 @@
 #include "mapping_table.h"
 #include "tsar_leti_cluster.h"
+#include "vci_local_crossbar.h"
+#include "vci_dspin_initiator_wrapper.h"
+#include "vci_dspin_target_wrapper.h"
+#include "vci_multi_tty.h"
+#include "vci_multi_nic.h"
+#include "vci_chbuf_dma.h"
+#include "vci_block_device_tsar.h"
+#include "vci_framebuffer.h"
+#include "vci_iopic.h"
 #include "alloc_elems.h"
 
@@ -150 +171 @@
 #define vci_cell_width_int    4
 #define vci_cell_width_ext    8
-
-#if USE_ALMOS
-#define vci_address_width     32
-#endif
-
-#if (USE_GIET_VM or USE_GIET_TSAR)
 #define vci_address_width     40
-#endif
-
 #define vci_plen_width        8
 #define vci_rerror_width      1
@@ -177 +190 @@
 
 #if USE_GIET_TSAR
-#include "../../softs/soft_hello_giet/hard_config.h"
+#include "../../softs/soft_transpose_giet/hard_config.h"
 #endif
-
 
 ////////////////////////////////////////////////////////////
@@ -201 +213 @@
 #define FBUF_Y_SIZE           128
 
-#define BDEV_SECTOR_SIZE      512
-#define BDEV_IMAGE_NAME       "../../softs/soft_hello_giet/fake"
-
-#define NIC_TIMEOUT           10000
+#define BDEV_IMAGE_NAME       "../../softs/soft_transpose_giet/images.raw"
+
+#define NIC_MAC4              0XBABEF00D
+#define NIC_MAC2              0xBEEF
 #define NIC_RX_NAME           "../../softs/soft_hello_giet/fake"
 #define NIC_TX_NAME           "../../softs/soft_hello_giet/fake"
@@ -222 +234 @@
 
 #if USE_GIET_TSAR
-#define loader_args          "../../softs/soft_hello_giet/bin.soft"
+#define loader_args          "../../softs/soft_transpose_giet/bin.soft"
 #endif
 
@@ -229 +241 @@
 //////////////////////i/////////////////////////////////////
 
-#define MAX_FROZEN_CYCLES     1000000
+#define MAX_FROZEN_CYCLES     10000
 
 ////////////////////////////////////////////////////////////////////
-//     TGTID definition in direct space
+//     LOCAL TGTID & SRCID definition 
 // For all components:  global TGTID = global SRCID = cluster_index
 ////////////////////////////////////////////////////////////////////
@@ -238 +250 @@
 #define MEMC_TGTID      0
 #define XICU_TGTID      1
-#define MDMA_TGTID      2
-#define MTTY_TGTID      3
+#define MTTY_TGTID      2
+#define BDEV_TGTID      3
 #define FBUF_TGTID      4
-#define BDEV_TGTID      5
-#define MNIC_TGTID      6
-#define CDMA_TGTID      7
-#define SIMH_TGTID      8
-
-///////////////////////////////////////////////////////////////
+#define MNIC_TGTID      5
+#define CDMA_TGTID      6
+#define IOPI_TGTID      7
+
+#define BDEV_SRCID      NB_PROCS_MAX
+#define CDMA_SRCID      NB_PROCS_MAX + 1
+#define IOPI_SRCID      NB_PROCS_MAX + 2
+
+/////////////////////////////////////////////////////////////////////
 //    Physical segments definition
-///////////////////////////////////////////////////////////////
-// There is 4 segments replicated in all clusters,
-// and 5 specific segments in cluster 0 (IO cluster) 
-// The following values are for segments in cluster 0.
-// These 32 bits values must be concatenate with the cluster 
+/////////////////////////////////////////////////////////////////////
+// - 3 segments are replicated in all clusters
+// - 2 segments are replicated in cluster[0,0] & [X_SIZE-1,Y_SIZE-1] 
+// - 4 segments are only in cluster [X_SIZE-1,Y_SIZE] 
+// The following values are for segments in cluster 0,
+// and these 32 bits values must be concatenate with the cluster 
 // index (on 8 bits) to obtain the 40 bits address.
-///////////////////////////////////////////////////////////////
-
-   // non replicated segments / only in cluster(0,0)
+/////////////////////////////////////////////////////////////////////
+
+   // in cluster [0,0] & [X_SIZE-1,Y_SIZE] 
+
+   #define MTTY_BASE    0xF4000000
+   #define MTTY_SIZE    0x00001000   // 4 Kbytes
+
+   #define BDEV_BASE    0xF2000000
+   #define BDEV_SIZE    0x00001000   // 4 Kbytes
+
+   // in cluster [X_SIZE-1,Y_SIZE]
 
    #define FBUF_BASE    0xF3000000
    #define FBUF_SIZE    (FBUF_X_SIZE * FBUF_Y_SIZE * 2)
 
-   #define BDEV_BASE    0xF4000000
-   #define BDEV_SIZE    0x00001000   // 4 Kbytes
-
-   #define MTTY_BASE    0xF2000000
-   #define MTTY_SIZE    0x00001000   // 4 Kbytes
-
-   #define MNIC_BASE    0xF5000000
+   #define MNIC_BASE    0xF7000000
    #define MNIC_SIZE    0x00800000   // 512 Kbytes (for 8 channels)
 
-   #define CDMA_BASE    0xF6000000
+   #define CDMA_BASE    0xF8000000
    #define CDMA_SIZE    0x00004000 * NB_CMA_CHANNELS
 
+   #define IOPI_BASE    0xF9000000
+   #define IOPI_SIZE    0x00001000   // 4 Kbytes 
+   
    // replicated segments : address is extended to 40 bits by cluster_xy
 
@@ -278 +299 @@
    #define MEMC_SIZE    0x01000000   // 16 Mbytes per cluster
 
+   #define MCFG_BASE    0xE0000000
+   #define MCFG_SIZE    0x00001000   // 4 Kbytes per cluster
+
    #define XICU_BASE    0xF0000000
-   #define XICU_SIZE    0x00001000   // 4 Kbytes
-
-   #define MDMA_BASE    0xF1000000
-   #define MDMA_SIZE    0x00001000 * NB_DMA_CHANNELS  // 4 Kbytes per channel
-
-   #define SIMH_BASE    0xFF000000
-   #define SIMH_SIZE    0x00001000   // 4 Kbytes
+   #define XICU_SIZE    0x00001000   // 4 Kbytes per cluster
 
 bool stop_called = false;
@@ -296 +314 @@
    using namespace soclib::common;
 
-   uint64_t ncycles          = 0xFFFFFFFFFFFFFFFF; // simulated cycles
-   char     disk_name[256]   = BDEV_IMAGE_NAME;    // pathname to the disk image
-   char     nic_rx_name[256] = NIC_RX_NAME;        // pathname to the rx packets file
-   char     nic_tx_name[256] = NIC_TX_NAME;        // pathname to the tx packets file
-   size_t   threads_nr       = 1;                  // simulator's threads number
+   uint32_t ncycles          = 0xFFFFFFFF;         // max simulated cycles
+   size_t   threads          = 1;                  // simulator's threads number
    bool     trace_ok         = false;              // trace activated
    uint32_t trace_from       = 0;                  // trace start cycle
@@ -319 +334 @@
          {
             ncycles = (uint64_t) strtol(argv[n + 1], NULL, 0);
-         }
-         else if ((strcmp(argv[n],"-DISK") == 0) && (n + 1 < argc))
-         {
-            strcpy(disk_name, argv[n + 1]);
          }
          else if ((strcmp(argv[n],"-DEBUG") == 0) && (n + 1 < argc))
@@ -352 +363 @@
          else if ((strcmp(argv[n], "-THREADS") == 0) && ((n + 1) < argc))
          {
-            threads_nr = (ssize_t) strtol(argv[n + 1], NULL, 0);
-            threads_nr = (threads_nr < 1) ? 1 : threads_nr;
+            threads = (size_t) strtol(argv[n + 1], NULL, 0);
+            threads = (threads < 1) ? 1 : threads;
          }
          else if ((strcmp(argv[n], "-FROZEN") == 0) && (n + 1 < argc))
@@ -364 +375 @@
             std::cout << "   The order is not important." << std::endl;
             std::cout << "   Accepted arguments are :" << std::endl << std::endl;
-            std::cout << "     -DISK pathname_for_disk_image" << std::endl;
             std::cout << "     -NCYCLES number_of_simulated_cycles" << std::endl;
             std::cout << "     -DEBUG debug_start_cycle" << std::endl;
@@ -385 +395 @@
 
     assert( (NB_PROCS_MAX <= 8) and
-            "The NB_PROCS_MAX parameter cannot be larger than 8" );
-
-    assert( (NB_DMA_CHANNELS < 9) and
-            "The NB_DMA_CHANNELS parameter cannot be larger than 8" );
-
-    assert( (NB_TTY_CHANNELS <= 16) and
-            "The NB_TTY_CHANNELS parameter cannot be larger than 16" );
-
-    assert( (NB_NIC_CHANNELS < 9) and
-            "The NB_NIC_CHANNELS parameter cannot be larger than 8" );
+            "The NB_PROCS_MAX parameter cannot be larger than 4" );
+
+    assert( (NB_CMA_CHANNELS <= 4) and
+            "The NB_CMA_CHANNELS parameter cannot be larger than 4" );
+
+    assert( (NB_TTY_CHANNELS <= 4) and
+            "The NB_TTY_CHANNELS parameter cannot be larger than 4" );
+
+    assert( (NB_NIC_CHANNELS <= 2) and
+            "The NB_NIC_CHANNELS parameter cannot be larger than 2" );
 
     assert( (vci_address_width == 40) and
@@ -416 +426 @@
     std::cout << " - MAX_CYCLES       = " << ncycles << std::endl;
     std::cout << " - RESET_ADDRESS    = " << RESET_ADDRESS << std::endl;
+    std::cout << " - SOFT_FILENAME    = " << loader_args << std::endl;
 
     std::cout << std::endl;
@@ -444 +455 @@
 #if USE_OPENMP
    omp_set_dynamic(false);
-   omp_set_num_threads(threads_nr);
+   omp_set_num_threads(threads);
    std::cerr << "Built with openmp version " << _OPENMP << std::endl;
 #endif
 
 
-   /////////////////////
-   //  Mapping Tables
-   /////////////////////
-
-   // internal network
+   ///////////////////////////////////////
+   //  Direct Network Mapping Table
+   ///////////////////////////////////////
+
    MappingTable maptabd(vci_address_width, 
                         IntTab(X_WIDTH + Y_WIDTH, 16 - X_WIDTH - Y_WIDTH), 
                         IntTab(X_WIDTH + Y_WIDTH, vci_srcid_width - X_WIDTH - Y_WIDTH), 
-                        0xFF800000);
-
+                        0x00FF000000ULL);
+
+   // replicated segments
    for (size_t x = 0; x < X_SIZE; x++)
    {
@@ -464 +475 @@
       {
          sc_uint<vci_address_width> offset;
-         offset = (sc_uint<vci_address_width>)cluster(x,y) 
-                   << (vci_address_width-X_WIDTH-Y_WIDTH);
+         offset = ((sc_uint<vci_address_width>)cluster(x,y)) << 32;
 
          std::ostringstream    si;
@@ -473 +483 @@
 
          std::ostringstream    sd;
-         sd << "seg_mdma_" << x << "_" << y;
-         maptabd.add(Segment(sd.str(), MDMA_BASE + offset, MDMA_SIZE, 
-                  IntTab(cluster(x,y),MDMA_TGTID), false));
+         sd << "seg_mcfg_" << x << "_" << y;
+         maptabd.add(Segment(sd.str(), MCFG_BASE + offset, MCFG_SIZE, 
+                  IntTab(cluster(x,y),MEMC_TGTID), false));
 
          std::ostringstream    sh;
@@ -481 +491 @@
          maptabd.add(Segment(sh.str(), MEMC_BASE + offset, MEMC_SIZE, 
                   IntTab(cluster(x,y),MEMC_TGTID), true));
-
-         if ( cluster(x,y) == 0 )
-         {
-            maptabd.add(Segment("seg_mtty", MTTY_BASE, MTTY_SIZE, 
-                        IntTab(cluster(x,y),MTTY_TGTID), false));
-            maptabd.add(Segment("seg_fbuf", FBUF_BASE, FBUF_SIZE, 
-                        IntTab(cluster(x,y),FBUF_TGTID), false));
-            maptabd.add(Segment("seg_bdev", BDEV_BASE, BDEV_SIZE, 
-                        IntTab(cluster(x,y),BDEV_TGTID), false));
-            maptabd.add(Segment("seg_mnic", MNIC_BASE, MNIC_SIZE, 
-                        IntTab(cluster(x,y),MNIC_TGTID), false));
-            maptabd.add(Segment("seg_cdma", CDMA_BASE, CDMA_SIZE, 
-                        IntTab(cluster(x,y),CDMA_TGTID), false));
-            maptabd.add(Segment("seg_simh", SIMH_BASE, SIMH_SIZE, 
-                        IntTab(cluster(x,y),SIMH_TGTID), false));
-         }
       }
    }
+
+   // segments in cluster(0,0)
+   maptabd.add(Segment("seg_tty0", MTTY_BASE, MTTY_SIZE, 
+               IntTab(cluster(0,0),MTTY_TGTID), false));
+
+   maptabd.add(Segment("seg_ioc0", BDEV_BASE, BDEV_SIZE, 
+               IntTab(cluster(0,0),BDEV_TGTID), false));
+
+   // segments in cluster_io (X_SIZE-1,Y_SIZE)
+   sc_uint<vci_address_width> offset;
+   offset = ((sc_uint<vci_address_width>)cluster(X_SIZE-1,Y_SIZE)) << 32;
+
+   maptabd.add(Segment("seg_mtty", MTTY_BASE + offset, MTTY_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),MTTY_TGTID), false));
+
+   maptabd.add(Segment("seg_fbuf", FBUF_BASE + offset, FBUF_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),FBUF_TGTID), false));
+
+   maptabd.add(Segment("seg_bdev", BDEV_BASE + offset, BDEV_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),BDEV_TGTID), false));
+
+   maptabd.add(Segment("seg_mnic", MNIC_BASE + offset, MNIC_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),MNIC_TGTID), false));
+
+   maptabd.add(Segment("seg_cdma", CDMA_BASE + offset, CDMA_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),CDMA_TGTID), false));
+
+   maptabd.add(Segment("seg_iopi", IOPI_BASE + offset, IOPI_SIZE, 
+               IntTab(cluster(X_SIZE-1, Y_SIZE),IOPI_TGTID), false));
+
    std::cout << maptabd << std::endl;
 
-   // external network
-   MappingTable maptabx(vci_address_width, 
-                        IntTab(X_WIDTH+Y_WIDTH), 
-                        IntTab(X_WIDTH+Y_WIDTH), 
-                        0xFFFF000000ULL);
-
-   for (size_t x = 0; x < X_SIZE; x++)
-   {
-      for (size_t y = 0; y < Y_SIZE ; y++)
-      { 
-
-         sc_uint<vci_address_width> offset;
-         offset = (sc_uint<vci_address_width>)cluster(x,y) 
-                   << (vci_address_width-X_WIDTH-Y_WIDTH);
-
-         std::ostringstream sh;
-         sh << "x_seg_memc_" << x << "_" << y;
-
-         maptabx.add(Segment(sh.str(), MEMC_BASE + offset, 
+    /////////////////////////////////////////////////
+    // Ram network mapping table
+    /////////////////////////////////////////////////
+
+    MappingTable maptabx(vci_address_width, 
+                         IntTab(X_WIDTH+Y_WIDTH), 
+                         IntTab(X_WIDTH+Y_WIDTH), 
+                         0x00FF000000ULL);
+
+    for (size_t x = 0; x < X_SIZE; x++)
+    {
+        for (size_t y = 0; y < Y_SIZE ; y++)
+        { 
+            sc_uint<vci_address_width> offset;
+            offset = (sc_uint<vci_address_width>)cluster(x,y) 
+                      << (vci_address_width-X_WIDTH-Y_WIDTH);
+
+            std::ostringstream sh;
+            sh << "x_seg_memc_" << x << "_" << y;
+
+            maptabx.add(Segment(sh.str(), MEMC_BASE + offset, 
                      MEMC_SIZE, IntTab(cluster(x,y)), false));
-      }
-   }
-   std::cout << maptabx << std::endl;
-
-   ////////////////////
-   // Signals
-   ///////////////////
-
-   sc_clock           signal_clk("clk");
-   sc_signal<bool>    signal_resetn("resetn");
+        }
+    }
+    std::cout << maptabx << std::endl;
+
+    ////////////////////
+    // Signals
+    ///////////////////
+
+    sc_clock                          signal_clk("clk");
+    sc_signal<bool>                   signal_resetn("resetn");
+
+    // IRQs from external peripherals
+    sc_signal<bool>                   signal_irq_bdev;
+    sc_signal<bool>                   signal_irq_mnic_rx[NB_NIC_CHANNELS];
+    sc_signal<bool>                   signal_irq_mnic_tx[NB_NIC_CHANNELS];
+    sc_signal<bool>                   signal_irq_mtty[NB_TTY_CHANNELS];
+    sc_signal<bool>                   signal_irq_cdma[NB_CMA_CHANNELS];
+    sc_signal<bool>                   signal_irq_false;
 
    // Horizontal inter-clusters DSPIN signals
-   DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_inc =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE, 3);
-   DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_dec =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE, 3);
-   DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_inc =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE, 2);
-   DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_dec =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE, 2);
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE);
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE);
+
+   DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_inc =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE);
+   DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_dec =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE);
+
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_inc", X_SIZE-1, Y_SIZE);
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_dec", X_SIZE-1, Y_SIZE);
+
+   DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_inc =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_inc", X_SIZE-1, Y_SIZE);
+   DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_dec =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_dec", X_SIZE-1, Y_SIZE);
+
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_inc", X_SIZE-1, Y_SIZE);
+   DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_dec", X_SIZE-1, Y_SIZE);
 
    // Vertical inter-clusters DSPIN signals
-   DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_inc =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-1, 3);
-   DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_dec =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-1, 3);
-   DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_inc =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-1, 2);
-   DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_dec =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-1, 2);
-
-   // Mesh boundaries DSPIN signals
-   DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_in =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_in" , X_SIZE, Y_SIZE, 4, 3);
-   DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_out =
-      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_out", X_SIZE, Y_SIZE, 4, 3);
-   DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_in =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_in" , X_SIZE, Y_SIZE, 4, 2);
-   DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_out =
-      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_out", X_SIZE, Y_SIZE, 4, 2);
-
-
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-1);
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-1);
+
+   DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_inc =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-1);
+   DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_dec =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-1);
+
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_inc", X_SIZE, Y_SIZE-1);
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_dec", X_SIZE, Y_SIZE-1);
+
+   DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_inc =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_inc", X_SIZE, Y_SIZE-1);
+   DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_dec =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_dec", X_SIZE, Y_SIZE-1);
+
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_inc =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_inc", X_SIZE, Y_SIZE-1);
+   DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_dec =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_dec", X_SIZE, Y_SIZE-1);
+
+   // Mesh boundaries DSPIN signals (Most of those signals are not used...)
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_in =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_in" , X_SIZE, Y_SIZE, 4);
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_out =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_out", X_SIZE, Y_SIZE, 4);
+
+   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_in =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_in" , X_SIZE, Y_SIZE, 4);
+   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_out =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_out", X_SIZE, Y_SIZE, 4);
+
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_in =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_in" , X_SIZE, Y_SIZE, 4);
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_out =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_out", X_SIZE, Y_SIZE, 4);
+
+   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_in =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_in" , X_SIZE, Y_SIZE, 4);
+   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_out =
+      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_out", X_SIZE, Y_SIZE, 4);
+
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_in =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_in" , X_SIZE, Y_SIZE, 4);
+   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_out =
+      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_out", X_SIZE, Y_SIZE, 4);
+
+   // VCI signals for iobus and peripherals
+   VciSignals<vci_param_int>    signal_vci_ini_bdev("signal_vci_ini_bdev");
+   VciSignals<vci_param_int>    signal_vci_ini_cdma("signal_vci_ini_cdma");
+   VciSignals<vci_param_int>    signal_vci_ini_iopi("signal_vci_ini_iopi");
+
+   VciSignals<vci_param_int>*   signal_vci_ini_proc = 
+       alloc_elems<VciSignals<vci_param_int> >("signal_vci_ini_proc", NB_PROCS_MAX );
+
+   VciSignals<vci_param_int>    signal_vci_tgt_memc("signal_vci_tgt_memc");
+   VciSignals<vci_param_int>    signal_vci_tgt_xicu("signal_vci_tgt_xicu");
+   VciSignals<vci_param_int>    signal_vci_tgt_bdev("signal_vci_tgt_bdev");
+   VciSignals<vci_param_int>    signal_vci_tgt_mtty("signal_vci_tgt_mtty");
+   VciSignals<vci_param_int>    signal_vci_tgt_fbuf("signal_vci_tgt_fbuf");
+   VciSignals<vci_param_int>    signal_vci_tgt_mnic("signal_vci_tgt_mnic");
+   VciSignals<vci_param_int>    signal_vci_tgt_cdma("signal_vci_tgt_cdma");
+   VciSignals<vci_param_int>    signal_vci_tgt_iopi("signal_vci_tgt_iopi");
+
+   VciSignals<vci_param_int>    signal_vci_cmd_to_noc("signal_vci_cmd_to_noc");
+   VciSignals<vci_param_int>    signal_vci_cmd_from_noc("signal_vci_cmd_from_noc");
+   
    ////////////////////////////
    //      Loader    
@@ -596 +697 @@
 #endif
             std::cout << std::endl;
-            std::cout << "Cluster_" << x << "_" << y 
-                      << " with cluster_xy = " << cluster(x,y) << std::endl;
+            std::cout << "Cluster_" << std::dec << x << "_" << y 
+                      << " with cluster_xy = " << std::hex << cluster(x,y) << std::endl;
             std::cout << std::endl;
 
-            std::ostringstream sc;
-            sc << "cluster_" << x << "_" << y;
             clusters[x][y] = new TsarLetiCluster<dspin_cmd_width,
                                                  dspin_rsp_width,
@@ -607 +706 @@
                                                  vci_param_ext>
             (
-                sc.str().c_str(),
+                "cluster",
                 NB_PROCS_MAX,
-                NB_TTY_CHANNELS,  
-                NB_DMA_CHANNELS, 
                 x,
                 y,
@@ -622 +719 @@
                 MEMC_TGTID,
                 XICU_TGTID,
-                MDMA_TGTID,
-                FBUF_TGTID,
                 MTTY_TGTID,
-                MNIC_TGTID,
-                CDMA_TGTID,
                 BDEV_TGTID,
-                SIMH_TGTID,
+                BDEV_IMAGE_NAME,
                 MEMC_WAYS,
                 MEMC_SETS,
@@ -636 +729 @@
                 L1_DSETS,
                 XRAM_LATENCY,
-                (cluster(x,y) == 0),
-                FBUF_X_SIZE,
-                FBUF_Y_SIZE,
-                disk_name,
-                BDEV_SECTOR_SIZE,
-                NB_NIC_CHANNELS,
-                nic_rx_name,
-                nic_tx_name,
-                NIC_TIMEOUT,
-                NB_CMA_CHANNELS,
                 loader,
                 frozen_cycles,
@@ -663 +746 @@
 #endif
 
-   ///////////////////////////////////////////////////////////////
-   //     Net-list 
-   ///////////////////////////////////////////////////////////////
-
-   // Clock & RESET
-   for (size_t x = 0; x < (X_SIZE); x++){
-      for (size_t y = 0; y < Y_SIZE; y++){
-         clusters[x][y]->p_clk                         (signal_clk);
-         clusters[x][y]->p_resetn                      (signal_resetn);
-      }
-   }
-
-   // Inter Clusters horizontal connections
-   if (X_SIZE > 1){
-      for (size_t x = 0; x < (X_SIZE-1); x++){
-         for (size_t y = 0; y < Y_SIZE; y++){
-            for (size_t k = 0; k < 3; k++){
-               clusters[x][y]->p_cmd_out[EAST][k]      (signal_dspin_h_cmd_inc[x][y][k]);
-               clusters[x+1][y]->p_cmd_in[WEST][k]     (signal_dspin_h_cmd_inc[x][y][k]);
-               clusters[x][y]->p_cmd_in[EAST][k]       (signal_dspin_h_cmd_dec[x][y][k]);
-               clusters[x+1][y]->p_cmd_out[WEST][k]    (signal_dspin_h_cmd_dec[x][y][k]);
+    //////////////////////////////////////////////////////////////////
+    // IO bus and external peripherals in cluster[X_SIZE-1,Y_SIZE]
+    //////////////////////////////////////////////////////////////////
+
+    size_t cluster_io = cluster(X_SIZE-1, Y_SIZE);
+
+    //////////// vci_local_crossbar  
+    VciLocalCrossbar<vci_param_int>*
+    iobus = new VciLocalCrossbar<vci_param_int>(
+                "iobus",
+                maptabd,                      // mapping table
+                cluster_io,                   // cluster_xy
+                NB_PROCS_MAX + 3,             // number of local initiators
+                8,                            // number of local targets
+                BDEV_TGTID );                 // default target index
+
+    //////////// vci_framebuffer                        
+    VciFrameBuffer<vci_param_int>*
+    fbuf = new VciFrameBuffer<vci_param_int>(
+                "fbuf",
+                IntTab(cluster_io, FBUF_TGTID),
+                maptabd,
+                FBUF_X_SIZE, FBUF_Y_SIZE );
+
+    ////////////  vci_block_device               
+    VciBlockDeviceTsar<vci_param_int>*
+    bdev = new VciBlockDeviceTsar<vci_param_int>(
+                "bdev",
+                maptabd,
+                IntTab(cluster_io, BDEV_SRCID),
+                IntTab(cluster_io, BDEV_TGTID),
+                BDEV_IMAGE_NAME,
+                512,                          // block size
+                64 );                         // burst size
+
+    //////////// vci_multi_nic               
+    VciMultiNic<vci_param_int>*
+    mnic = new VciMultiNic<vci_param_int>(
+                "mnic",
+                IntTab(cluster_io, MNIC_TGTID),
+                maptabd,
+                NB_NIC_CHANNELS,
+                NIC_MAC4,
+                NIC_MAC2,
+                NIC_RX_NAME,
+                NIC_TX_NAME );
+
+    ///////////// vci_chbuf_dma                   
+    VciChbufDma<vci_param_int>*
+    cdma = new VciChbufDma<vci_param_int>(
+                "cdma",
+                maptabd,
+                IntTab(cluster_io, CDMA_SRCID),
+                IntTab(cluster_io, CDMA_TGTID),
+                64,                          // burst size
+                NB_CMA_CHANNELS ); 
+
+    ////////////// vci_multi_tty
+    std::vector<std::string> vect_names;
+    for (size_t id = 0; id < NB_TTY_CHANNELS; id++)
+    {
+        std::ostringstream term_name;
+        term_name <<  "ext_" << id;
+        vect_names.push_back(term_name.str().c_str());
+    }
+
+    VciMultiTty<vci_param_int>* 
+    mtty = new VciMultiTty<vci_param_int>(
+                "mtty",
+                IntTab(cluster_io, MTTY_TGTID),
+                maptabd,
+                vect_names );
+
+    ///////////// vci_iopic
+    VciIopic<vci_param_int>*
+    iopic = new VciIopic<vci_param_int>(
+                "iopic",
+                maptabd,
+                IntTab(cluster_io, IOPI_SRCID),
+                IntTab(cluster_io, IOPI_TGTID),
+                16 );
+
+    ////////////// vci_dspin wrappers 
+    VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>*
+    wt_iobus = new VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>(
+                "wt_bdev",
+                vci_srcid_width );
+
+    VciDspinInitiatorWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>*
+    wi_iobus = new VciDspinInitiatorWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>(
+                "wi_bdev",
+                vci_srcid_width );
+
+    ///////////////////////////////////////////////////////////////
+    //     Net-list 
+    ///////////////////////////////////////////////////////////////
+
+    // iobus 
+    iobus->p_clk                       (signal_clk);  
+    iobus->p_resetn                    (signal_resetn);
+
+    iobus->p_target_to_up              (signal_vci_cmd_from_noc);
+    iobus->p_initiator_to_up           (signal_vci_cmd_to_noc);
+
+    iobus->p_to_target[MEMC_TGTID]     (signal_vci_tgt_memc);
+    iobus->p_to_target[XICU_TGTID]     (signal_vci_tgt_xicu);
+    iobus->p_to_target[MTTY_TGTID]     (signal_vci_tgt_mtty);
+    iobus->p_to_target[FBUF_TGTID]     (signal_vci_tgt_fbuf);
+    iobus->p_to_target[MNIC_TGTID]     (signal_vci_tgt_mnic);
+    iobus->p_to_target[BDEV_TGTID]     (signal_vci_tgt_bdev);
+    iobus->p_to_target[CDMA_TGTID]     (signal_vci_tgt_cdma);
+    iobus->p_to_target[IOPI_TGTID]     (signal_vci_tgt_iopi);
+
+    for( size_t p=0 ; p<NB_PROCS_MAX ; p++ )
+    {
+        iobus->p_to_initiator[p]       (signal_vci_ini_proc[p]);
+    }
+    iobus->p_to_initiator[BDEV_SRCID]  (signal_vci_ini_bdev);
+    iobus->p_to_initiator[CDMA_SRCID]  (signal_vci_ini_cdma);
+    iobus->p_to_initiator[IOPI_SRCID]  (signal_vci_ini_iopi);
+
+    std::cout << "  - IOBUS connected" << std::endl;
+
+    // block_device
+    bdev->p_clk                        (signal_clk);
+    bdev->p_resetn                     (signal_resetn);
+    bdev->p_vci_target                 (signal_vci_tgt_bdev);
+    bdev->p_vci_initiator              (signal_vci_ini_bdev);
+    bdev->p_irq                        (signal_irq_bdev);
+
+    std::cout << "  - BDEV connected" << std::endl;
+
+    // frame_buffer
+    fbuf->p_clk                        (signal_clk);
+    fbuf->p_resetn                     (signal_resetn);
+    fbuf->p_vci                        (signal_vci_tgt_fbuf);
+
+    std::cout << "  - FBUF connected" << std::endl;
+
+    // multi_nic
+    mnic->p_clk                        (signal_clk);
+    mnic->p_resetn                     (signal_resetn);
+    mnic->p_vci                        (signal_vci_tgt_mnic);
+    for ( size_t i=0 ; i<NB_NIC_CHANNELS ; i++ )
+    {
+         mnic->p_rx_irq[i]             (signal_irq_mnic_rx[i]);
+         mnic->p_tx_irq[i]             (signal_irq_mnic_tx[i]);
+    }
+
+    std::cout << "  - MNIC connected" << std::endl;
+
+    // chbuf_dma
+    cdma->p_clk                        (signal_clk);
+    cdma->p_resetn                     (signal_resetn);
+    cdma->p_vci_target                 (signal_vci_tgt_cdma);
+    cdma->p_vci_initiator              (signal_vci_ini_cdma);
+    for ( size_t i=0 ; i<NB_CMA_CHANNELS ; i++)
+    {
+        cdma->p_irq[i]                 (signal_irq_cdma[i]);
+    }
+
+    std::cout << "  - CDMA connected" << std::endl;
+
+    // multi_tty
+    mtty->p_clk                        (signal_clk);
+    mtty->p_resetn                     (signal_resetn);
+    mtty->p_vci                        (signal_vci_tgt_mtty);
+    for ( size_t i=0 ; i<NB_TTY_CHANNELS ; i++ )
+    {
+        mtty->p_irq[i]                  (signal_irq_mtty[i]);
+    }
+
+    std::cout << "  - MTTY connected" << std::endl;
+
+    // iopic
+    iopic->p_clk                       (signal_clk);
+    iopic->p_resetn                    (signal_resetn);
+    iopic->p_vci_target                (signal_vci_tgt_iopi);
+    iopic->p_vci_initiator             (signal_vci_ini_iopi);
+    for ( size_t i=0 ; i<16 ; i++)
+    {
+       if     (i < NB_NIC_CHANNELS)    iopic->p_hwi[i] (signal_irq_mnic_rx[i]);
+       else if(i < 2 )                 iopic->p_hwi[i] (signal_irq_false);
+       else if(i < 2+NB_NIC_CHANNELS)  iopic->p_hwi[i] (signal_irq_mnic_tx[i-2]);
+       else if(i < 4 )                 iopic->p_hwi[i] (signal_irq_false);
+       else if(i < 4+NB_CMA_CHANNELS)  iopic->p_hwi[i] (signal_irq_cdma[i-4]);
+       else if(i < 9)                  iopic->p_hwi[i] (signal_irq_false);
+       else if(i == 9)                 iopic->p_hwi[i] (signal_irq_bdev);
+       else if(i < 12)                 iopic->p_hwi[i] (signal_irq_false);
+       else if(i < 12+NB_TTY_CHANNELS) iopic->p_hwi[i] (signal_irq_mtty[i-12]);
+       else                            iopic->p_hwi[i] (signal_irq_false);
+    }
+
+    // vci/dspin wrappers
+    wi_iobus->p_clk                    (signal_clk);
+    wi_iobus->p_resetn                 (signal_resetn);
+    wi_iobus->p_vci                    (signal_vci_cmd_to_noc);
+    wi_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-1][NORTH]);
+    wi_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-1][NORTH]);
+
+    // vci/dspin wrappers
+    wt_iobus->p_clk                    (signal_clk);
+    wt_iobus->p_resetn                 (signal_resetn);
+    wt_iobus->p_vci                    (signal_vci_cmd_from_noc);
+    wt_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-1][NORTH]);
+    wt_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-1][NORTH]);
+
+    // Clock & RESET for clusters
+    for (size_t x = 0; x < (X_SIZE); x++)
+    {
+        for (size_t y = 0; y < Y_SIZE; y++)
+        {
+            clusters[x][y]->p_clk                    (signal_clk);
+            clusters[x][y]->p_resetn                 (signal_resetn);
+        }
+    }
+
+    // Inter Clusters horizontal connections
+    if (X_SIZE > 1)
+    {
+        for (size_t x = 0; x < (X_SIZE-1); x++)
+        {
+            for (size_t y = 0; y < Y_SIZE; y++)
+            {
+                clusters[x][y]->p_cmd_out[EAST]      (signal_dspin_h_cmd_inc[x][y]);
+                clusters[x+1][y]->p_cmd_in[WEST]     (signal_dspin_h_cmd_inc[x][y]);
+                clusters[x][y]->p_cmd_in[EAST]       (signal_dspin_h_cmd_dec[x][y]);
+                clusters[x+1][y]->p_cmd_out[WEST]    (signal_dspin_h_cmd_dec[x][y]);
+
+                clusters[x][y]->p_rsp_out[EAST]      (signal_dspin_h_rsp_inc[x][y]);
+                clusters[x+1][y]->p_rsp_in[WEST]     (signal_dspin_h_rsp_inc[x][y]);
+                clusters[x][y]->p_rsp_in[EAST]       (signal_dspin_h_rsp_dec[x][y]);
+                clusters[x+1][y]->p_rsp_out[WEST]    (signal_dspin_h_rsp_dec[x][y]);
+
+                clusters[x][y]->p_m2p_out[EAST]      (signal_dspin_h_m2p_inc[x][y]);
+                clusters[x+1][y]->p_m2p_in[WEST]     (signal_dspin_h_m2p_inc[x][y]);
+                clusters[x][y]->p_m2p_in[EAST]       (signal_dspin_h_m2p_dec[x][y]);
+                clusters[x+1][y]->p_m2p_out[WEST]    (signal_dspin_h_m2p_dec[x][y]);
+
+                clusters[x][y]->p_p2m_out[EAST]      (signal_dspin_h_p2m_inc[x][y]);
+                clusters[x+1][y]->p_p2m_in[WEST]     (signal_dspin_h_p2m_inc[x][y]);
+                clusters[x][y]->p_p2m_in[EAST]       (signal_dspin_h_p2m_dec[x][y]);
+                clusters[x+1][y]->p_p2m_out[WEST]    (signal_dspin_h_p2m_dec[x][y]);
+
+                clusters[x][y]->p_cla_out[EAST]      (signal_dspin_h_cla_inc[x][y]);
+                clusters[x+1][y]->p_cla_in[WEST]     (signal_dspin_h_cla_inc[x][y]);
+                clusters[x][y]->p_cla_in[EAST]       (signal_dspin_h_cla_dec[x][y]);
+                clusters[x+1][y]->p_cla_out[WEST]    (signal_dspin_h_cla_dec[x][y]);
             }
-
-            for (size_t k = 0; k < 2; k++){
-               clusters[x][y]->p_rsp_out[EAST][k]      (signal_dspin_h_rsp_inc[x][y][k]);
-               clusters[x+1][y]->p_rsp_in[WEST][k]     (signal_dspin_h_rsp_inc[x][y][k]);
-               clusters[x][y]->p_rsp_in[EAST][k]       (signal_dspin_h_rsp_dec[x][y][k]);
-               clusters[x+1][y]->p_rsp_out[WEST][k]    (signal_dspin_h_rsp_dec[x][y][k]);
+        }
+    }
+    std::cout << std::endl << "Horizontal connections done" << std::endl;   
+
+    // Inter Clusters vertical connections
+    if (Y_SIZE > 1) 
+    {
+        for (size_t y = 0; y < (Y_SIZE-1); y++)
+        {
+            for (size_t x = 0; x < X_SIZE; x++)
+            {
+                clusters[x][y]->p_cmd_out[NORTH]     (signal_dspin_v_cmd_inc[x][y]);
+                clusters[x][y+1]->p_cmd_in[SOUTH]    (signal_dspin_v_cmd_inc[x][y]);
+                clusters[x][y]->p_cmd_in[NORTH]      (signal_dspin_v_cmd_dec[x][y]);
+                clusters[x][y+1]->p_cmd_out[SOUTH]   (signal_dspin_v_cmd_dec[x][y]);
+
+                clusters[x][y]->p_rsp_out[NORTH]     (signal_dspin_v_rsp_inc[x][y]);
+                clusters[x][y+1]->p_rsp_in[SOUTH]    (signal_dspin_v_rsp_inc[x][y]);
+                clusters[x][y]->p_rsp_in[NORTH]      (signal_dspin_v_rsp_dec[x][y]);
+                clusters[x][y+1]->p_rsp_out[SOUTH]   (signal_dspin_v_rsp_dec[x][y]);
+
+                clusters[x][y]->p_m2p_out[NORTH]     (signal_dspin_v_m2p_inc[x][y]);
+                clusters[x][y+1]->p_m2p_in[SOUTH]    (signal_dspin_v_m2p_inc[x][y]);
+                clusters[x][y]->p_m2p_in[NORTH]      (signal_dspin_v_m2p_dec[x][y]);
+                clusters[x][y+1]->p_m2p_out[SOUTH]   (signal_dspin_v_m2p_dec[x][y]);
+
+                clusters[x][y]->p_p2m_out[NORTH]     (signal_dspin_v_p2m_inc[x][y]);
+                clusters[x][y+1]->p_p2m_in[SOUTH]    (signal_dspin_v_p2m_inc[x][y]);
+                clusters[x][y]->p_p2m_in[NORTH]      (signal_dspin_v_p2m_dec[x][y]);
+                clusters[x][y+1]->p_p2m_out[SOUTH]   (signal_dspin_v_p2m_dec[x][y]);
+
+                clusters[x][y]->p_cla_out[NORTH]     (signal_dspin_v_cla_inc[x][y]);
+                clusters[x][y+1]->p_cla_in[SOUTH]    (signal_dspin_v_cla_inc[x][y]);
+                clusters[x][y]->p_cla_in[NORTH]      (signal_dspin_v_cla_dec[x][y]);
+                clusters[x][y+1]->p_cla_out[SOUTH]   (signal_dspin_v_cla_dec[x][y]);
             }
-         }
-      }
-   }
-   std::cout << std::endl << "Horizontal connections established" << std::endl;   
-
-   // Inter Clusters vertical connections
-   if (Y_SIZE > 1) {
-      for (size_t y = 0; y < (Y_SIZE-1); y++){
-         for (size_t x = 0; x < X_SIZE; x++){
-            for (size_t k = 0; k < 3; k++){
-               clusters[x][y]->p_cmd_out[NORTH][k]     (signal_dspin_v_cmd_inc[x][y][k]);
-               clusters[x][y+1]->p_cmd_in[SOUTH][k]    (signal_dspin_v_cmd_inc[x][y][k]);
-               clusters[x][y]->p_cmd_in[NORTH][k]      (signal_dspin_v_cmd_dec[x][y][k]);
-               clusters[x][y+1]->p_cmd_out[SOUTH][k]   (signal_dspin_v_cmd_dec[x][y][k]);
+        }
+    }
+    std::cout << std::endl << "Vertical connections done" << std::endl;
+
+    // East & West boundary cluster connections
+    for (size_t y = 0; y < Y_SIZE; y++)
+    {
+        clusters[0][y]->p_cmd_in[WEST]           (signal_dspin_bound_cmd_in[0][y][WEST]);
+        clusters[0][y]->p_cmd_out[WEST]          (signal_dspin_bound_cmd_out[0][y][WEST]);
+        clusters[X_SIZE-1][y]->p_cmd_in[EAST]    (signal_dspin_bound_cmd_in[X_SIZE-1][y][EAST]);
+        clusters[X_SIZE-1][y]->p_cmd_out[EAST]   (signal_dspin_bound_cmd_out[X_SIZE-1][y][EAST]);
+
+        clusters[0][y]->p_rsp_in[WEST]           (signal_dspin_bound_rsp_in[0][y][WEST]);
+        clusters[0][y]->p_rsp_out[WEST]          (signal_dspin_bound_rsp_out[0][y][WEST]);
+        clusters[X_SIZE-1][y]->p_rsp_in[EAST]    (signal_dspin_bound_rsp_in[X_SIZE-1][y][EAST]);
+        clusters[X_SIZE-1][y]->p_rsp_out[EAST]   (signal_dspin_bound_rsp_out[X_SIZE-1][y][EAST]);
+
+        clusters[0][y]->p_m2p_in[WEST]           (signal_dspin_bound_m2p_in[0][y][WEST]);
+        clusters[0][y]->p_m2p_out[WEST]          (signal_dspin_bound_m2p_out[0][y][WEST]);
+        clusters[X_SIZE-1][y]->p_m2p_in[EAST]    (signal_dspin_bound_m2p_in[X_SIZE-1][y][EAST]);
+        clusters[X_SIZE-1][y]->p_m2p_out[EAST]   (signal_dspin_bound_m2p_out[X_SIZE-1][y][EAST]);
+
+        clusters[0][y]->p_p2m_in[WEST]           (signal_dspin_bound_p2m_in[0][y][WEST]);
+        clusters[0][y]->p_p2m_out[WEST]          (signal_dspin_bound_p2m_out[0][y][WEST]);
+        clusters[X_SIZE-1][y]->p_p2m_in[EAST]    (signal_dspin_bound_p2m_in[X_SIZE-1][y][EAST]);
+        clusters[X_SIZE-1][y]->p_p2m_out[EAST]   (signal_dspin_bound_p2m_out[X_SIZE-1][y][EAST]);
+
+        clusters[0][y]->p_cla_in[WEST]           (signal_dspin_bound_cla_in[0][y][WEST]);
+        clusters[0][y]->p_cla_out[WEST]          (signal_dspin_bound_cla_out[0][y][WEST]);
+        clusters[X_SIZE-1][y]->p_cla_in[EAST]    (signal_dspin_bound_cla_in[X_SIZE-1][y][EAST]);
+        clusters[X_SIZE-1][y]->p_cla_out[EAST]   (signal_dspin_bound_cla_out[X_SIZE-1][y][EAST]);
+    }
+
+    // North & South boundary clusters connections
+    for (size_t x = 0; x < X_SIZE; x++)
+    {
+        clusters[x][0]->p_cmd_in[SOUTH]          (signal_dspin_bound_cmd_in[x][0][SOUTH]);
+        clusters[x][0]->p_cmd_out[SOUTH]         (signal_dspin_bound_cmd_out[x][0][SOUTH]);
+        clusters[x][Y_SIZE-1]->p_cmd_in[NORTH]   (signal_dspin_bound_cmd_in[x][Y_SIZE-1][NORTH]);
+        clusters[x][Y_SIZE-1]->p_cmd_out[NORTH]  (signal_dspin_bound_cmd_out[x][Y_SIZE-1][NORTH]);
+
+        clusters[x][0]->p_rsp_in[SOUTH]          (signal_dspin_bound_rsp_in[x][0][SOUTH]);
+        clusters[x][0]->p_rsp_out[SOUTH]         (signal_dspin_bound_rsp_out[x][0][SOUTH]);
+        clusters[x][Y_SIZE-1]->p_rsp_in[NORTH]   (signal_dspin_bound_rsp_in[x][Y_SIZE-1][NORTH]);
+        clusters[x][Y_SIZE-1]->p_rsp_out[NORTH]  (signal_dspin_bound_rsp_out[x][Y_SIZE-1][NORTH]);
+
+        clusters[x][0]->p_m2p_in[SOUTH]          (signal_dspin_bound_m2p_in[x][0][SOUTH]);
+        clusters[x][0]->p_m2p_out[SOUTH]         (signal_dspin_bound_m2p_out[x][0][SOUTH]);
+        clusters[x][Y_SIZE-1]->p_m2p_in[NORTH]   (signal_dspin_bound_m2p_in[x][Y_SIZE-1][NORTH]);
+        clusters[x][Y_SIZE-1]->p_m2p_out[NORTH]  (signal_dspin_bound_m2p_out[x][Y_SIZE-1][NORTH]);
+
+        clusters[x][0]->p_p2m_in[SOUTH]          (signal_dspin_bound_p2m_in[x][0][SOUTH]);
+        clusters[x][0]->p_p2m_out[SOUTH]         (signal_dspin_bound_p2m_out[x][0][SOUTH]);
+        clusters[x][Y_SIZE-1]->p_p2m_in[NORTH]   (signal_dspin_bound_p2m_in[x][Y_SIZE-1][NORTH]);
+        clusters[x][Y_SIZE-1]->p_p2m_out[NORTH]  (signal_dspin_bound_p2m_out[x][Y_SIZE-1][NORTH]);
+
+        clusters[x][0]->p_cla_in[SOUTH]          (signal_dspin_bound_cla_in[x][0][SOUTH]);
+        clusters[x][0]->p_cla_out[SOUTH]         (signal_dspin_bound_cla_out[x][0][SOUTH]);
+        clusters[x][Y_SIZE-1]->p_cla_in[NORTH]   (signal_dspin_bound_cla_in[x][Y_SIZE-1][NORTH]);
+        clusters[x][Y_SIZE-1]->p_cla_out[NORTH]  (signal_dspin_bound_cla_out[x][Y_SIZE-1][NORTH]);
+    }
+
+    std::cout << std::endl << "North, South, West, East connections done" << std::endl;
+    std::cout << std::endl;
+
+    ////////////////////////////////////////////////////////
+    //   Simulation
+    ///////////////////////////////////////////////////////
+
+    sc_start(sc_core::sc_time(0, SC_NS));
+    signal_resetn    = false;
+    signal_irq_false = false;
+
+    // set network boundaries signals default values
+    // for all boundary clusters but the IO cluster
+    for (size_t x = 0; x < X_SIZE ; x++)
+    {
+        for (size_t y = 0; y < Y_SIZE ; y++)
+        {
+            for (size_t face = 0; face < 4; face++)
+            {
+                if ( (x != X_SIZE-1) or (y != Y_SIZE-1) or (face != NORTH) )
+                {
+                    signal_dspin_bound_cmd_in [x][y][face].write = false;
+                    signal_dspin_bound_cmd_in [x][y][face].read  = true;
+                    signal_dspin_bound_cmd_out[x][y][face].write = false;
+                    signal_dspin_bound_cmd_out[x][y][face].read  = true;
+
+                    signal_dspin_bound_rsp_in [x][y][face].write = false;
+                    signal_dspin_bound_rsp_in [x][y][face].read  = true;
+                    signal_dspin_bound_rsp_out[x][y][face].write = false;
+                    signal_dspin_bound_rsp_out[x][y][face].read  = true;
+                }
+
+                signal_dspin_bound_m2p_in [x][y][face].write = false;
+                signal_dspin_bound_m2p_in [x][y][face].read  = true;
+                signal_dspin_bound_m2p_out[x][y][face].write = false;
+                signal_dspin_bound_m2p_out[x][y][face].read  = true;
+
+                signal_dspin_bound_p2m_in [x][y][face].write = false;
+                signal_dspin_bound_p2m_in [x][y][face].read  = true;
+                signal_dspin_bound_p2m_out[x][y][face].write = false;
+                signal_dspin_bound_p2m_out[x][y][face].read  = true;
+
+                signal_dspin_bound_cla_in [x][y][face].write = false;
+                signal_dspin_bound_cla_in [x][y][face].read  = true;
+                signal_dspin_bound_cla_out[x][y][face].write = false;
+                signal_dspin_bound_cla_out[x][y][face].read  = true;
             }
-
-            for (size_t k = 0; k < 2; k++){
-               clusters[x][y]->p_rsp_out[NORTH][k]     (signal_dspin_v_rsp_inc[x][y][k]);
-               clusters[x][y+1]->p_rsp_in[SOUTH][k]    (signal_dspin_v_rsp_inc[x][y][k]);
-               clusters[x][y]->p_rsp_in[NORTH][k]      (signal_dspin_v_rsp_dec[x][y][k]);
-               clusters[x][y+1]->p_rsp_out[SOUTH][k]   (signal_dspin_v_rsp_dec[x][y][k]);
-            }
-         }
-      }
-   }
-   std::cout << "Vertical connections established" << std::endl;
-
-   // East & West boundary cluster connections
-   for (size_t y = 0; y < Y_SIZE; y++)
-   {
-      for (size_t k = 0; k < 3; k++)
-      {
-         clusters[0][y]->p_cmd_in[WEST][k]        (signal_dspin_false_cmd_in[0][y][WEST][k]);
-         clusters[0][y]->p_cmd_out[WEST][k]       (signal_dspin_false_cmd_out[0][y][WEST][k]);
-         clusters[X_SIZE-1][y]->p_cmd_in[EAST][k]   (signal_dspin_false_cmd_in[X_SIZE-1][y][EAST][k]);
-         clusters[X_SIZE-1][y]->p_cmd_out[EAST][k]  (signal_dspin_false_cmd_out[X_SIZE-1][y][EAST][k]);
-      }
-
-      for (size_t k = 0; k < 2; k++)
-      {
-         clusters[0][y]->p_rsp_in[WEST][k]        (signal_dspin_false_rsp_in[0][y][WEST][k]);
-         clusters[0][y]->p_rsp_out[WEST][k]       (signal_dspin_false_rsp_out[0][y][WEST][k]);
-         clusters[X_SIZE-1][y]->p_rsp_in[EAST][k]   (signal_dspin_false_rsp_in[X_SIZE-1][y][EAST][k]);
-         clusters[X_SIZE-1][y]->p_rsp_out[EAST][k]  (signal_dspin_false_rsp_out[X_SIZE-1][y][EAST][k]);
-      }
-   }
-
-   // North & South boundary clusters connections
-   for (size_t x = 0; x < X_SIZE; x++)
-   {
-      for (size_t k = 0; k < 3; k++)
-      {
-         clusters[x][0]->p_cmd_in[SOUTH][k]       (signal_dspin_false_cmd_in[x][0][SOUTH][k]);
-         clusters[x][0]->p_cmd_out[SOUTH][k]      (signal_dspin_false_cmd_out[x][0][SOUTH][k]);
-         clusters[x][Y_SIZE-1]->p_cmd_in[NORTH][k]  (signal_dspin_false_cmd_in[x][Y_SIZE-1][NORTH][k]);
-         clusters[x][Y_SIZE-1]->p_cmd_out[NORTH][k] (signal_dspin_false_cmd_out[x][Y_SIZE-1][NORTH][k]);
-      }
-
-      for (size_t k = 0; k < 2; k++)
-      {
-         clusters[x][0]->p_rsp_in[SOUTH][k]       (signal_dspin_false_rsp_in[x][0][SOUTH][k]);
-         clusters[x][0]->p_rsp_out[SOUTH][k]      (signal_dspin_false_rsp_out[x][0][SOUTH][k]);
-         clusters[x][Y_SIZE-1]->p_rsp_in[NORTH][k]  (signal_dspin_false_rsp_in[x][Y_SIZE-1][NORTH][k]);
-         clusters[x][Y_SIZE-1]->p_rsp_out[NORTH][k] (signal_dspin_false_rsp_out[x][Y_SIZE-1][NORTH][k]);
-      }
-   }
-   std::cout << "North, South, West, East connections established" << std::endl;
-   std::cout << std::endl;
-
-
-   ////////////////////////////////////////////////////////
-   //   Simulation
-   ///////////////////////////////////////////////////////
-
-   sc_start(sc_core::sc_time(0, SC_NS));
-   signal_resetn = false;
-
-   // network boundaries signals
-   for (size_t x = 0; x < X_SIZE ; x++){
-      for (size_t y = 0; y < Y_SIZE ; y++){
-         for (size_t a = 0; a < 4; a++){
-            for (size_t k = 0; k < 3; k++){
-               signal_dspin_false_cmd_in [x][y][a][k].write = false;
-               signal_dspin_false_cmd_in [x][y][a][k].read  = true;
-               signal_dspin_false_cmd_out[x][y][a][k].write = false;
-               signal_dspin_false_cmd_out[x][y][a][k].read  = true;
-            }
-
-            for (size_t k = 0; k < 2; k++){
-               signal_dspin_false_rsp_in [x][y][a][k].write = false;
-               signal_dspin_false_rsp_in [x][y][a][k].read  = true;
-               signal_dspin_false_rsp_out[x][y][a][k].write = false;
-               signal_dspin_false_rsp_out[x][y][a][k].read  = true;
-            }
-         }
-      }
-   }
-
-   sc_start(sc_core::sc_time(1, SC_NS));
-   signal_resetn = true;
-
-   if (gettimeofday(&t1, NULL) != 0) 
-   {
-      perror("gettimeofday");
-      return EXIT_FAILURE;
-   }
+        }
+    }
+
+    sc_start(sc_core::sc_time(1, SC_NS));
+    signal_resetn = true;
+
+    if (gettimeofday(&t1, NULL) != 0) 
+    {
+        perror("gettimeofday");
+        return EXIT_FAILURE;
+    }
 
    for (uint64_t n = 1; n < ncycles && !stop_called; n++)
    {
       // Monitor a specific address for L1 & L2 caches
-      //clusters[0][0]->proc[0]->cache_monitor(0x800002c000ULL);
-      //clusters[1][0]->memc->copies_monitor(0x800002C000ULL);
+      // clusters[0][0]->proc[0]->cache_monitor(0x0000010000ULL);
+      // clusters[0][0]->memc->cache_monitor(0x0000030000ULL);
 
       if( (n % 5000000) == 0)
@@ -838 +1191 @@
         std::ostringstream proc_signame;
         proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ;
-        std::ostringstream p2m_signame;
-        p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ;
-        std::ostringstream m2p_signame;
-        m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ;
-        std::ostringstream p_cmd_signame;
-        p_cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ;
-        std::ostringstream p_rsp_signame;
-        p_rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ;
-
-        clusters[x][y]->proc[l]->print_trace();
-//        clusters[x][y]->wi_proc[l]->print_trace();
+        std::ostringstream xicu_signame;
+        xicu_signame << "[SIG]XICU_" << x << "_" << y ;
+
+        clusters[x][y]->proc[l]->print_trace(0x1);
         clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str());
-        clusters[x][y]->signal_dspin_p2m_proc[l].print_trace(p2m_signame.str());
-        clusters[x][y]->signal_dspin_m2p_proc[l].print_trace(m2p_signame.str());
-        clusters[x][y]->signal_dspin_cmd_proc_i[l].print_trace(p_cmd_signame.str());
-        clusters[x][y]->signal_dspin_rsp_proc_i[l].print_trace(p_rsp_signame.str());
-
-//        clusters[x][y]->xbar_rsp_d->print_trace();
-//        clusters[x][y]->xbar_cmd_d->print_trace();
-//        clusters[x][y]->signal_dspin_cmd_l2g_d.print_trace("[SIG]L2G CMD");
-//        clusters[x][y]->signal_dspin_cmd_g2l_d.print_trace("[SIG]G2L CMD");
-//        clusters[x][y]->signal_dspin_rsp_l2g_d.print_trace("[SIG]L2G RSP");
-//        clusters[x][y]->signal_dspin_rsp_g2l_d.print_trace("[SIG]G2L RSP");
-
-        // trace memc[trace_memc_id] 
+
+        clusters[x][y]->xicu->print_trace(0);
+        clusters[x][y]->signal_vci_tgt_xicu.print_trace(xicu_signame.str());
+      
+        if ( clusters[x][y]->signal_proc_irq[0].read() )  
+            std::cout << " IRQ_PROC active in cluster " << cluster(x,y) << std::endl;
+      
+        if ( signal_irq_bdev.read() )  
+            std::cout << " IRQ_BDEV in cluster_io active" << std::endl;
+      
+        // trace memc[trace_memc_id] and xram[trace_memc_id]
         x = trace_memc_id >> Y_WIDTH;
         y = trace_memc_id & ((1<<Y_WIDTH) - 1);
@@ -870 +1214 @@
         std::ostringstream sxram;
         sxram << "[SIG]XRAM_" << x << "_" << y;
-        std::ostringstream sm2p;
-        sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ;
-        std::ostringstream sp2m;
-        sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ;
-        std::ostringstream m_cmd_signame;
-        m_cmd_signame << "[SIG]MEMC_" << x << "_" << y <<  " CMD" ;
-        std::ostringstream m_rsp_signame;
-        m_rsp_signame << "[SIG]MEMC_" << x << "_" << y <<  " RSP" ;
 
         clusters[x][y]->memc->print_trace();
-//        clusters[x][y]->wt_memc->print_trace();
         clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str());
         clusters[x][y]->signal_vci_xram.print_trace(sxram.str());
-        clusters[x][y]->signal_dspin_p2m_memc.print_trace(sp2m.str());
-        clusters[x][y]->signal_dspin_m2p_memc.print_trace(sm2p.str());
-        clusters[x][y]->signal_dspin_cmd_memc_t.print_trace(m_cmd_signame.str());
-        clusters[x][y]->signal_dspin_rsp_memc_t.print_trace(m_rsp_signame.str());
         
-        // trace replicated peripherals
-//        clusters[1][1]->mdma->print_trace();
-//        clusters[1][1]->signal_vci_tgt_mdma.print_trace("[SIG]MDMA_TGT_1_1");
-//        clusters[1][1]->signal_vci_ini_mdma.print_trace("[SIG]MDMA_INI_1_1");
+        // trace coherence signals
+        // clusters[0][0]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_0_0]");
+        // clusters[0][1]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_0_1]");
+        // clusters[1][0]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_1_0]");
+        // clusters[1][1]->signal_dspin_m2p_proc[0].print_trace("[CC_M2P_1_1]");
+
+        // clusters[0][0]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_0_0]");
+        // clusters[0][1]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_0_1]");
+        // clusters[1][0]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_1_0]");
+        // clusters[1][1]->signal_dspin_p2m_proc[0].print_trace("[CC_P2M_1_1]");
+
+        // trace xbar(s) m2p
+        // clusters[0][0]->xbar_m2p->print_trace();
+        // clusters[1][0]->xbar_m2p->print_trace();
+        // clusters[0][1]->xbar_m2p->print_trace();
+        // clusters[1][1]->xbar_m2p->print_trace();
         
-
+        // trace router(s) m2p
+        // clusters[0][0]->router_m2p->print_trace();
+        // clusters[1][0]->router_m2p->print_trace();
+        // clusters[0][1]->router_m2p->print_trace();
+        // clusters[1][1]->router_m2p->print_trace();
+        
         // trace external peripherals
-        
-//        clusters[0][0]->bdev->print_trace();
-//        clusters[0][0]->signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT");
-//        clusters[0][0]->signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI");
-
-//        clusters[0][0]->mtty->print_trace();
-//        clusters[0][0]->wt_mtty->print_trace();
-//        clusters[0][0]->signal_vci_tgt_mtty.print_trace("[SIG]MTTY");
-      }
+        bdev->print_trace();
+        signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT");
+        signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI");
+
+        iopic->print_trace();
+        signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT");
+        signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI");
+
+        clusters[0][0]->mtty->print_trace();
+        clusters[0][0]->signal_vci_tgt_mtty.print_trace("[SIG]MTTY");
+      }  // end trace
 
       sc_start(sc_core::sc_time(1, SC_NS));
@@ -917 +1267 @@
    }
 
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_h_cmd_inc, X_SIZE - 1, Y_SIZE, 3);
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_h_cmd_dec, X_SIZE - 1, Y_SIZE, 3);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_h_rsp_inc, X_SIZE - 1, Y_SIZE, 2);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_h_rsp_dec, X_SIZE - 1, Y_SIZE, 2);
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_v_cmd_inc, X_SIZE, Y_SIZE - 1, 3);
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_v_cmd_dec, X_SIZE, Y_SIZE - 1, 3);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_v_rsp_inc, X_SIZE, Y_SIZE - 1, 2);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_v_rsp_dec, X_SIZE, Y_SIZE - 1, 2);
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_false_cmd_in, X_SIZE, Y_SIZE, 4, 3);
-   dealloc_elems<DspinSignals<dspin_cmd_width> >(signal_dspin_false_cmd_out, X_SIZE, Y_SIZE, 4, 3);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_false_rsp_in, X_SIZE, Y_SIZE, 4, 2);
-   dealloc_elems<DspinSignals<dspin_rsp_width> >(signal_dspin_false_rsp_out, X_SIZE, Y_SIZE, 4, 2);
-
    return EXIT_SUCCESS;
 }
 
 
-void handler(int dummy = 0) {
+void handler(int dummy = 0) 
+{
    stop_called = true;
    sc_stop();

trunk/platforms/tsar_generic_leti/top.desc

@@ -29 +29 @@
                   dspin_rsp_width    = dspin_rsp_flit_size),
 
+            Uses('caba:vci_dspin_target_wrapper',
+                  cell_size = vci_cell_size_int,
+                  dspin_cmd_width    = dspin_cmd_flit_size,
+                  dspin_rsp_width    = dspin_rsp_flit_size),
+                  
+            Uses('caba:vci_dspin_initiator_wrapper',
+                  cell_size = vci_cell_size_int,
+                  dspin_cmd_width    = dspin_cmd_flit_size,
+                  dspin_rsp_width    = dspin_rsp_flit_size),
+                  
+            Uses('caba:vci_local_crossbar',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_framebuffer',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_multi_nic',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_chbuf_dma',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_block_device_tsar',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_multi_tty',
+                  cell_size = vci_cell_size_int),
+
+            Uses('caba:vci_iopic',
+                  cell_size = vci_cell_size_int),
+
                 Uses('common:elf_file_loader'),
+
             Uses('common:plain_file_loader'),
            ],

trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/metadata/tsar_leti_cluster.sd

@@ -40 +40 @@
               cell_size       = parameter.Reference('vci_data_width_ext')),
 
-      Uses('caba:vci_simple_ram',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
       Uses('caba:vci_xicu',
               cell_size       = parameter.Reference('vci_data_width_int')),
@@ -52 +49 @@
               flit_width      = parameter.Reference('dspin_rsp_width')),
 
-      Uses('caba:virtual_dspin_router', 
+      Uses('caba:dspin_router', 
               flit_width      = parameter.Reference('dspin_cmd_width')),
 
-      Uses('caba:virtual_dspin_router', 
+      Uses('caba:dspin_router', 
               flit_width      = parameter.Reference('dspin_rsp_width')),
 
@@ -61 +58 @@
               cell_size       = parameter.Reference('vci_data_width_int')),
 
-      Uses('caba:vci_framebuffer',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
-      Uses('caba:vci_multi_nic',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
-      Uses('caba:vci_chbuf_dma',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
       Uses('caba:vci_block_device_tsar',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
-      Uses('caba:vci_multi_dma',
               cell_size       = parameter.Reference('vci_data_width_int')),
 
@@ -82 +67 @@
               cell_size       = parameter.Reference('vci_data_width_int')),
 
-      Uses('caba:vci_simhelper',
-              cell_size       = parameter.Reference('vci_data_width_int')),
-
       Uses('common:elf_file_loader'),
       ],
@@ -91 +73 @@
       Port('caba:bit_in', 'p_resetn', auto = 'resetn'),
       Port('caba:clock_in', 'p_clk', auto = 'clock'),
-      Port('caba:dspin_output', 'p_cmd_out', [4, 3], 
+
+      Port('caba:dspin_output', 'p_cmd_out', [4], 
               dspin_data_size = parameter.Reference('dspin_cmd_width')),
-      Port('caba:dspin_input', 'p_cmd_in', [4, 3], 
+      Port('caba:dspin_input', 'p_cmd_in', [4], 
               dspin_data_size = parameter.Reference('dspin_cmd_width')),
-      Port('caba:dspin_output', 'p_rsp_out', [4, 2], 
+
+      Port('caba:dspin_output', 'p_rsp_out', [4], 
               dspin_data_size = parameter.Reference('dspin_rsp_width')), 
-      Port('caba:dspin_input', 'p_rsp_in', [4, 2], 
+      Port('caba:dspin_input', 'p_rsp_in', [4], 
               dspin_data_size = parameter.Reference('dspin_rsp_width')),
+
+      Port('caba:dspin_output', 'p_m2p_out', [4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')), 
+      Port('caba:dspin_input', 'p_m2p_in', [4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')),
+
+      Port('caba:dspin_output', 'p_p2m_out', [4], 
+              dspin_data_size = parameter.Reference('dspin_rsp_width')), 
+      Port('caba:dspin_input', 'p_p2m_in', [4], 
+              dspin_data_size = parameter.Reference('dspin_rsp_width')),
+
+      Port('caba:dspin_output', 'p_cla_out', [4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')), 
+      Port('caba:dspin_input', 'p_cla_in', [4], 
+              dspin_data_size = parameter.Reference('dspin_cmd_width')),
       ],
 )

trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/source/include/tsar_leti_cluster.h

@@ -25 +25 @@
 #include "vci_dspin_initiator_wrapper.h"
 #include "vci_dspin_target_wrapper.h"
-#include "virtual_dspin_router.h"
+#include "dspin_router.h"
 #include "vci_multi_tty.h"
-#include "vci_multi_nic.h"
-#include "vci_chbuf_dma.h"
 #include "vci_block_device_tsar.h"
-#include "vci_framebuffer.h"
-#include "vci_multi_dma.h"
 #include "vci_mem_cache.h"
 #include "vci_cc_vcache_wrapper.h"
-#include "vci_simhelper.h"
 
 namespace soclib { namespace caba {
@@ -54 +49 @@
     sc_in<bool>                                     p_clk;
     sc_in<bool>                                     p_resetn;
-    soclib::caba::DspinOutput<dspin_cmd_width>      **p_cmd_out;
-    soclib::caba::DspinInput<dspin_cmd_width>       **p_cmd_in;
-    soclib::caba::DspinOutput<dspin_rsp_width>      **p_rsp_out;
-    soclib::caba::DspinInput<dspin_rsp_width>       **p_rsp_in;
+
+    soclib::caba::DspinOutput<dspin_cmd_width>      *p_cmd_out;
+    soclib::caba::DspinInput<dspin_cmd_width>       *p_cmd_in;
+
+    soclib::caba::DspinOutput<dspin_rsp_width>      *p_rsp_out;
+    soclib::caba::DspinInput<dspin_rsp_width>       *p_rsp_in;
+
+    soclib::caba::DspinOutput<dspin_cmd_width>      *p_m2p_out;
+    soclib::caba::DspinInput<dspin_cmd_width>       *p_m2p_in;
+
+    soclib::caba::DspinOutput<dspin_rsp_width>      *p_p2m_out;
+    soclib::caba::DspinInput<dspin_rsp_width>       *p_p2m_in;
+
+    soclib::caba::DspinOutput<dspin_cmd_width>      *p_cla_out;
+    soclib::caba::DspinInput<dspin_cmd_width>       *p_cla_in;
 
     // interrupt signals
     sc_signal<bool>         signal_false;
-    sc_signal<bool>         signal_proc_it[8];
-    sc_signal<bool>         signal_irq_mdma[8];
-    sc_signal<bool>         signal_irq_mtty[23];
-    sc_signal<bool>         signal_irq_mnic_rx[8];  // unused
-    sc_signal<bool>         signal_irq_mnic_tx[8];  // unused
-    sc_signal<bool>         signal_irq_chbuf[8];  // unused
+    sc_signal<bool>         signal_proc_irq[16];
+    sc_signal<bool>         signal_irq_mtty;
     sc_signal<bool>         signal_irq_memc;
     sc_signal<bool>         signal_irq_bdev;
@@ -83 +85 @@
 
     // Direct VCI signals to VCI/DSPIN wrappers
-    VciSignals<vci_param_int>       signal_vci_ini_proc[8];
+    VciSignals<vci_param_int>       signal_vci_ini_proc[4];
     VciSignals<vci_param_int>       signal_vci_ini_mdma;
     VciSignals<vci_param_int>       signal_vci_ini_bdev;
@@ -99 +101 @@
 
     // Direct DSPIN signals to local crossbars
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_proc_i[8];
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_proc_i[8];
+    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_proc_i[4];
+    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_proc_i[4];
     DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mdma_i;
     DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mdma_i;
@@ -131 +133 @@
     DspinSignals<dspin_cmd_width>     signal_dspin_clack_memc;
     DspinSignals<dspin_rsp_width>     signal_dspin_p2m_memc;
-    DspinSignals<dspin_cmd_width>     signal_dspin_m2p_proc[8];
-    DspinSignals<dspin_cmd_width>     signal_dspin_clack_proc[8];
-    DspinSignals<dspin_rsp_width>     signal_dspin_p2m_proc[8];
+    DspinSignals<dspin_cmd_width>     signal_dspin_m2p_proc[4];
+    DspinSignals<dspin_cmd_width>     signal_dspin_clack_proc[4];
+    DspinSignals<dspin_rsp_width>     signal_dspin_p2m_proc[4];
 
     // external RAM to MEMC VCI signal
@@ -143 +145 @@
                        dspin_cmd_width,
                        dspin_rsp_width,
-                       GdbServer<Mips32ElIss> >*  proc[8];
+                       GdbServer<Mips32ElIss> >*  proc[4];
 
     VciDspinInitiatorWrapper<vci_param_int,
                              dspin_cmd_width,
-                             dspin_rsp_width>*    wi_proc[8];
+                             dspin_rsp_width>*    wi_proc[4];
 
     VciMemCache<vci_param_int,
@@ -164 +166 @@
                           dspin_rsp_width>*       wt_xicu;
 
-    VciMultiDma<vci_param_int>*                   mdma;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_cmd_width,
-                             dspin_rsp_width>*    wi_mdma;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_mdma;
-
     VciSimpleRam<vci_param_ext>*                  xram;
 
@@ -181 +173 @@
                           dspin_cmd_width,
                           dspin_rsp_width>*       wt_mtty;
-
-    VciSimhelper<vci_param_int>*                  simhelper;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_simhelper;
-
-    VciFrameBuffer<vci_param_int>*                fbuf;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_fbuf;
-
-    VciMultiNic<vci_param_int>*                   mnic;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_mnic;
-
-    VciChbufDma<vci_param_int>*                   chbuf;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_chbuf;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wi_chbuf;
 
     VciBlockDeviceTsar<vci_param_int>*            bdev;
@@ -220 +184 @@
                           dspin_rsp_width>*       wt_bdev;
 
-    DspinLocalCrossbar<dspin_cmd_width>*          xbar_cmd_d;
-    DspinLocalCrossbar<dspin_rsp_width>*          xbar_rsp_d;
-    DspinLocalCrossbar<dspin_cmd_width>*          xbar_m2p_c;
-    DspinLocalCrossbar<dspin_rsp_width>*          xbar_p2m_c;
-    DspinLocalCrossbar<dspin_cmd_width>*          xbar_clack_c;
-
-    VirtualDspinRouter<dspin_cmd_width>*          router_cmd;
-    VirtualDspinRouter<dspin_rsp_width>*          router_rsp;
+    DspinLocalCrossbar<dspin_cmd_width>*          xbar_cmd;
+    DspinLocalCrossbar<dspin_rsp_width>*          xbar_rsp;
+    DspinLocalCrossbar<dspin_cmd_width>*          xbar_m2p;
+    DspinLocalCrossbar<dspin_rsp_width>*          xbar_p2m;
+    DspinLocalCrossbar<dspin_cmd_width>*          xbar_cla;
+
+    DspinRouter<dspin_cmd_width>*                 router_cmd;
+    DspinRouter<dspin_rsp_width>*                 router_rsp;
+    DspinRouter<dspin_cmd_width>*                 router_m2p;
+    DspinRouter<dspin_rsp_width>*                 router_p2m;
+    DspinRouter<dspin_cmd_width>*                 router_cla;
 
     TsarLetiCluster( sc_module_name                     insname,
                      size_t                             nb_procs,      // processors
-                     size_t                             nb_ttys,       // TTY terminals
-                     size_t                             nb_dmas,       //  DMA channels
                      size_t                             x,             // x coordinate
                      size_t                             y,             // y coordinate
@@ -244 +209 @@
                      size_t                             tgtid_memc,
                      size_t                             tgtid_xicu,
-                     size_t                             tgtid_mdma,
-                     size_t                             tgtid_fbuf,
                      size_t                             tgtid_mtty,
-                     size_t                             tgtid_mnic,
-                     size_t                             tgtid_chbuf,
                      size_t                             tgtid_bdev,
-                     size_t                             tgtid_simh,
+                     const char*                        disk_pathname,
                      size_t                             memc_ways,
                      size_t                             memc_sets,
@@ -258 +219 @@
                      size_t                             l1_d_sets,
                      size_t                             xram_latency,  // external ram
-                     bool                               io,            // I/O cluster
-                     size_t                             xfb,           // fbf pixels
-                     size_t                             yfb,           // fbf lines
-                     char*                              disk_name,     // virtual disk
-                     size_t                             block_size,    // block size
-                     size_t                             nic_channels,  // number channels
-                     char*                              nic_rx_name,   // filename rx
-                     char*                              nic_tx_name,   // filename tx
-                     uint32_t                           nic_timeout,   // cycles
-                     size_t                             chbufdma_channels,  // number channels
                      const Loader                       &loader,
                      uint32_t                           frozen_cycles,

trunk/platforms/tsar_generic_leti/tsar_leti_cluster/caba/source/src/tsar_leti_cluster.cpp

@@ -3 +3 @@
 // Author: Alain Greiner
 // Copyright: UPMC/LIP6
-// Date : march 2011
+// Date : february 2014
 // This program is released under the GNU public license
 //////////////////////////////////////////////////////////////////////////////
-// This file define a TSAR cluster architecture with virtual memory:
-// - It uses two virtual_dspin_router as distributed global interconnect
-// - It uses five dspin_local_crossbar as local interconnect
-// - It uses the vci_cc_vcache_wrapper
-// - It uses the vci_mem_cache
-// - It contains a private RAM with a variable latency to emulate the L3 cache
-// - It can contains 1, 2 or 4 processors
-// - Each processor has a private dma channel (vci_multi_dma)
-// - It uses the vci_xicu interrupt controller
-// - The peripherals MTTY, BDEV, FBUF, MNIC,CDMA are in cluster (0,0)
-// - The Multi-TTY component controls up to 16 terminals.
-// - The BDEV IRQ is connected to IRQ_IN[0] in cluster(0,0).
-// - The DMA IRQs are connected to IRQ_IN[8:11] in all clusters.
-// - The MEMC IRQ is connected to IRQ_IN[12] in all clusters.
-// - The TTY IRQs are connected to IRQ_IN[16:31] in cluster (0,0).
-//////////////////////////////////////////////////////////////////////////////////
 
 #include "../include/tsar_leti_cluster.h"
-
 
 namespace soclib {
@@ -40 +23 @@
          sc_module_name                     insname,
          size_t                             nb_procs,
-         size_t                             nb_ttys,
-         size_t                             nb_dmas,
          size_t                             x_id,
          size_t                             y_id,
@@ -53 +34 @@
          size_t                             tgtid_memc,
          size_t                             tgtid_xicu,
-         size_t                             tgtid_mdma,
-         size_t                             tgtid_fbuf,
          size_t                             tgtid_mtty,
-         size_t                             tgtid_mnic,
-         size_t                             tgtid_chbuf,
          size_t                             tgtid_bdev,
-         size_t                             tgtid_simh,
+         const char*                        disk_pathname,
          size_t                             memc_ways,
          size_t                             memc_sets,
@@ -67 +44 @@
          size_t                             l1_d_sets,
          size_t                             xram_latency,
-         bool                               io,
-         size_t                             xfb,
-         size_t                             yfb,
-         char*                              disk_name,
-         size_t                             block_size,
-         size_t                             nic_channels,
-         char*                              nic_rx_name,
-         char*                              nic_tx_name,
-         uint32_t                           nic_timeout,
-         size_t                             chbufdma_channels,
          const Loader                      &loader,
          uint32_t                           frozen_cycles,
@@ -89 +56 @@
 
 {
-
-    n_procs = nb_procs;
-
-    // Vectors of ports definition
-    p_cmd_in  = alloc_elems<DspinInput<dspin_cmd_width> >  ("p_cmd_in",  4, 3);
-    p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4, 3);
-    p_rsp_in  = alloc_elems<DspinInput<dspin_rsp_width> >  ("p_rsp_in",  4, 2);
-    p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4, 2);
-
-    /////////////////////////////////////////////////////////////////////////////
-    // Components definition
+    /////////////////////////////////////////////////////////////////////////////
+    // Vectors of ports definition and allocation
+    /////////////////////////////////////////////////////////////////////////////
+
+    p_cmd_in  = alloc_elems<DspinInput<dspin_cmd_width> >  ("p_cmd_in",  4);
+    p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4);
+
+    p_rsp_in  = alloc_elems<DspinInput<dspin_rsp_width> >  ("p_rsp_in",  4);
+    p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4);
+
+    p_m2p_in  = alloc_elems<DspinInput<dspin_cmd_width> >  ("p_m2p_in",  4);
+    p_m2p_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_m2p_out", 4);
+
+    p_p2m_in  = alloc_elems<DspinInput<dspin_rsp_width> >  ("p_p2m_in",  4);
+    p_p2m_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_p2m_out", 4);
+
+    p_cla_in  = alloc_elems<DspinInput<dspin_cmd_width> >  ("p_cla_in",  4);
+    p_cla_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cla_out", 4);
+
+    /////////////////////////////////////////////////////////////////////////////
+    // Components definition and allocation
     /////////////////////////////////////////////////////////////////////////////
 
@@ -194 +171 @@
                      mtd,                               // mapping table
                      IntTab(cluster_xy, tgtid_xicu),    // TGTID_D
-                     32,                                // number of timer IRQs
-                     32,                                // number of hard IRQs
-                     32,                                // number of soft IRQs
-                     nb_procs);                         // number of output IRQs
+                     16,                                // number of timer IRQs
+                     16,                                // number of hard IRQs
+                     16,                                // number of soft IRQs
+                     16 );                              // number of output IRQs
 
     wt_xicu = new VciDspinTargetWrapper<vci_param_int,
@@ -206 +183 @@
 
     /////////////////////////////////////////////////////////////////////////////
-    std::ostringstream smdma;
-    smdma << "mdma_" << x_id << "_" << y_id;
-    mdma = new VciMultiDma<vci_param_int>(
-                     smdma.str().c_str(),
-                     mtd,
-                     IntTab(cluster_xy, nb_procs),        // SRCID
-                     IntTab(cluster_xy, tgtid_mdma),      // TGTID
-                     64,                                  // burst size
-                     nb_dmas);                            // number of IRQs
-
-    wt_mdma = new VciDspinTargetWrapper<vci_param_int,
-                                        dspin_cmd_width,
-                                        dspin_rsp_width>(
-                     "wt_mdma",
-                     x_width + y_width + l_width);
-
-    wi_mdma = new VciDspinInitiatorWrapper<vci_param_int,
-                                           dspin_cmd_width,
-                                           dspin_rsp_width>(
-                     "wi_mdma",
-                     x_width + y_width + l_width);
-
-    /////////////////////////////////////////////////////////////////////////////
-    size_t nb_direct_initiators      = nb_procs + 1;
-    size_t nb_direct_targets         = 3;
-    if (io)
-    {
-        nb_direct_initiators         = nb_procs + 3;
-        nb_direct_targets            = 9;
-    }
-
-    xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>(
-                     "xbar_cmd_d",
+    size_t nb_initiators = nb_procs;
+    size_t nb_targets    = 2;
+
+    if ((x_id == 0) and (y_id == 0))  // cluster(0,0)
+    {
+        nb_initiators = nb_procs + 1;
+        nb_targets    = 4;
+    }
+
+    std::ostringstream s_xbar_cmd;
+    s_xbar_cmd << "xbar_cmd_" << x_id << "_" << y_id;
+    xbar_cmd = new DspinLocalCrossbar<dspin_cmd_width>(
+                     s_xbar_cmd.str().c_str(),
                      mtd,                          // mapping table
                      x_id, y_id,                   // cluster coordinates
                      x_width, y_width, l_width,
-                     nb_direct_initiators,         // number of local of sources
-                     nb_direct_targets,            // number of local dests 
+                     nb_initiators,                // number of local of sources
+                     nb_targets,                   // number of local dests 
                      2, 2,                         // fifo depths  
                      true,                         // CMD
@@ -250 +207 @@
 
     /////////////////////////////////////////////////////////////////////////////
-    xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>(
-                     "xbar_rsp_d",
+    std::ostringstream s_xbar_rsp;
+    s_xbar_rsp << "xbar_rsp_" << x_id << "_" << y_id;
+    xbar_rsp = new DspinLocalCrossbar<dspin_rsp_width>(
+                     s_xbar_rsp.str().c_str(),
                      mtd,                          // mapping table
                      x_id, y_id,                   // cluster coordinates
                      x_width, y_width, l_width,
-                     nb_direct_targets,            // number of local sources
-                     nb_direct_initiators,         // number of local dests
+                     nb_targets,                   // number of local sources
+                     nb_initiators,                // number of local dests
                      2, 2,                         // fifo depths  
                      false,                        // RSP
@@ -263 +222 @@
 
     /////////////////////////////////////////////////////////////////////////////
-    xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>(
-                     "xbar_m2p_c",
+    std::ostringstream s_xbar_m2p;
+    s_xbar_m2p << "xbar_m2p_" << x_id << "_" << y_id;
+    xbar_m2p = new DspinLocalCrossbar<dspin_cmd_width>(
+                     s_xbar_m2p.str().c_str(),
                      mtd,                          // mapping table
                      x_id, y_id,                   // cluster coordinates
                      x_width, y_width, l_width,
                      1,                            // number of local sources
-                     nb_procs,                     // number of local targets 
+                     nb_procs,                     // number of local dests 
                      2, 2,                         // fifo depths
                      true,                         // CMD
@@ -276 +237 @@
 
     /////////////////////////////////////////////////////////////////////////////
-    xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>(
-                     "xbar_p2m_c",
+    std::ostringstream s_xbar_p2m;
+    s_xbar_p2m << "xbar_p2m_" << x_id << "_" << y_id;
+    xbar_p2m = new DspinLocalCrossbar<dspin_rsp_width>(
+                     s_xbar_p2m.str().c_str(),
                      mtd,                          // mapping table
                      x_id, y_id,                   // cluster coordinates
@@ -289 +252 @@
 
     /////////////////////////////////////////////////////////////////////////////
-    xbar_clack_c = new DspinLocalCrossbar<dspin_cmd_width>(
-                     "xbar_clack_c",
+    std::ostringstream s_xbar_cla;
+    s_xbar_cla << "xbar_cla_" << x_id << "_" << y_id;
+    xbar_cla = new DspinLocalCrossbar<dspin_cmd_width>(
+                     s_xbar_cla.str().c_str(),
                      mtd,                          // mapping table
                      x_id, y_id,                   // cluster coordinates
                      x_width, y_width, l_width,
                      1,                            // number of local sources
-                     nb_procs,                     // number of local targets 
-                     1, 1,                         // fifo depths
+                     nb_procs,                     // number of local dests 
+                     2, 2,                         // fifo depths
                      true,                         // CMD
                      false,                        // don't use local routing table
-                     false);                       // broadcast
-
-    /////////////////////////////////////////////////////////////////////////////
-    router_cmd = new VirtualDspinRouter<dspin_cmd_width>(
-                     "router_cmd",
+                     false);                       // no broadcast
+
+    /////////////////////////////////////////////////////////////////////////////
+    std::ostringstream s_router_cmd;
+    s_router_cmd << "router_cmd_" << x_id << "_" << y_id;
+    router_cmd = new DspinRouter<dspin_cmd_width>(
+                     s_router_cmd.str().c_str(),
                      x_id,y_id,                    // coordinate in the mesh
                      x_width, y_width,             // x & y fields width
-                     3,                            // nb virtual channels
                      4,4);                         // input & output fifo depths
 
     /////////////////////////////////////////////////////////////////////////////
-    router_rsp = new VirtualDspinRouter<dspin_rsp_width>(
-                     "router_rsp",
+    std::ostringstream s_router_rsp;
+    s_router_rsp << "router_rsp_" << x_id << "_" << y_id;
+    router_rsp = new DspinRouter<dspin_rsp_width>(
+                     s_router_rsp.str().c_str(),
                      x_id,y_id,                    // coordinates in mesh
                      x_width, y_width,             // x & y fields width
-                     2,                            // nb virtual channels
                      4,4);                         // input & output fifo depths
 
-    // IO cluster components
-    if (io)
-    {
-        /////////////////////////////////////////////
-        fbuf = new VciFrameBuffer<vci_param_int>(
-                     "fbuf",
-                     IntTab(cluster_xy, tgtid_fbuf),
-                     mtd,
-                     xfb, yfb);
-
-        wt_fbuf = new VciDspinTargetWrapper<vci_param_int,
-                                            dspin_cmd_width,
-                                            dspin_rsp_width>(
-                     "wt_fbuf",
-                     x_width + y_width + l_width);
-
+    /////////////////////////////////////////////////////////////////////////////
+    std::ostringstream s_router_m2p;
+    s_router_m2p << "router_m2p_" << x_id << "_" << y_id;
+    router_m2p = new DspinRouter<dspin_cmd_width>(
+                     s_router_m2p.str().c_str(),
+                     x_id,y_id,                    // coordinate in the mesh
+                     x_width, y_width,             // x & y fields width
+                     4,4,                          // input & output fifo depths
+                     true);                        // broadcast supported
+
+    /////////////////////////////////////////////////////////////////////////////
+    std::ostringstream s_router_p2m;
+    s_router_p2m << "router_p2m_" << x_id << "_" << y_id;
+    router_p2m = new DspinRouter<dspin_rsp_width>(
+                     s_router_p2m.str().c_str(),
+                     x_id,y_id,                    // coordinates in mesh
+                     x_width, y_width,             // x & y fields width
+                     4,4);                         // input & output fifo depths
+
+    /////////////////////////////////////////////////////////////////////////////
+    std::ostringstream s_router_cla;
+    s_router_cla << "router_cla_" << x_id << "_" << y_id;
+    router_cla = new DspinRouter<dspin_cmd_width>(
+                     s_router_cla.str().c_str(),
+                     x_id,y_id,                    // coordinate in the mesh
+                     x_width, y_width,             // x & y fields width
+                     4,4);                         // input & output fifo depths
+
+    if ((x_id == 0) and (y_id == 0))
+    {
         /////////////////////////////////////////////
         bdev = new VciBlockDeviceTsar<vci_param_int>(
                      "bdev",
                      mtd,
-                     IntTab(cluster_xy, nb_procs + 1),
+                     IntTab(cluster_xy, nb_procs),
                      IntTab(cluster_xy, tgtid_bdev),
-                     disk_name,
-                     block_size,
-                     64);            // burst size
+                     disk_pathname,
+                     512,
+                     64 );            // burst size
 
         wt_bdev = new VciDspinTargetWrapper<vci_param_int,
@@ -355 +336 @@
                      x_width + y_width + l_width);
 
-        ////////////////////////////////////// 
-        mnic = new VciMultiNic<vci_param_int>(
-                     "mnic",
-                     IntTab(cluster_xy, tgtid_mnic),
-                     mtd,
-                     nic_channels,
-                     0xBEEF0000,      // mac_4 address
-                     0xBABE,          // mac_2 address
-                     nic_rx_name,
-                     nic_tx_name);
-
-        wt_mnic = new VciDspinTargetWrapper<vci_param_int,
-                                           dspin_cmd_width,
-                                           dspin_rsp_width>(
-                    "wt_mnic",
-                    x_width + y_width + l_width);
-
         /////////////////////////////////////////////
-        chbuf = new VciChbufDma<vci_param_int>(
-                     "chbuf_dma",
-                     mtd,
-                     IntTab(cluster_xy, nb_procs + 2),
-                     IntTab(cluster_xy, tgtid_chbuf),
-                     64,
-                     chbufdma_channels); 
-
-        wt_chbuf = new VciDspinTargetWrapper<vci_param_int,
-                                            dspin_cmd_width,
-                                            dspin_rsp_width>(
-                     "wt_chbuf",
-                     x_width + y_width + l_width);
-
-        wi_chbuf = new VciDspinInitiatorWrapper<vci_param_int,
-                                            dspin_cmd_width,
-                                            dspin_rsp_width>(
-                     "wi_chbuf",
-                     x_width + y_width + l_width);
-
-        /////////////////////////////////////////////
-        std::vector<std::string> vect_names;
-        for (size_t tid = 0; tid < nb_ttys; tid++)
-        {
-            std::ostringstream term_name;
-            term_name <<  "term" << tid;
-            vect_names.push_back(term_name.str().c_str());
-        }
         mtty = new VciMultiTty<vci_param_int>(
                      "mtty",
                      IntTab(cluster_xy, tgtid_mtty),
                      mtd,
-                     vect_names);
+                     "tty_0_0", NULL );
 
         wt_mtty = new VciDspinTargetWrapper<vci_param_int,
@@ -412 +348 @@
                      "wt_mtty",
                      x_width + y_width + l_width);
-
-        ////////////////////////////////////////////
-        simhelper = new VciSimhelper<vci_param_int>(
-                     "sim_helper",
-                     IntTab(cluster_xy, tgtid_simh),
-                     mtd);
-
-        wt_simhelper = new VciDspinTargetWrapper<vci_param_int,
-                                                 dspin_cmd_width,
-                                                 dspin_rsp_width>(
-                     "wt_simhelper",
-                     x_width + y_width + l_width);
-    }
+    }
+
+    std::cout << std::endl;
 
     ////////////////////////////////////
@@ -430 +356 @@
     ////////////////////////////////////
 
-    //////////////////////// CMD ROUTER and RSP ROUTER
-    router_cmd->p_clk                        (this->p_clk);
-    router_cmd->p_resetn                     (this->p_resetn);
-    router_rsp->p_clk                        (this->p_clk);
-    router_rsp->p_resetn                     (this->p_resetn);
-
-    for (int i = 0; i < 4; i++)
-    {
-        for (int k = 0; k < 3; k++)
-        {
-            router_cmd->p_out[i][k]          (this->p_cmd_out[i][k]);
-            router_cmd->p_in[i][k]           (this->p_cmd_in[i][k]);
-        }
-
-        for (int k = 0; k < 2; k++)
-        {
-            router_rsp->p_out[i][k]          (this->p_rsp_out[i][k]);
-            router_rsp->p_in[i][k]           (this->p_rsp_in[i][k]);
-        }
-    }
-
-    router_cmd->p_out[4][0]                  (signal_dspin_cmd_g2l_d);
-    router_cmd->p_out[4][1]                  (signal_dspin_m2p_g2l_c);
-    router_cmd->p_out[4][2]                  (signal_dspin_clack_g2l_c);
-    router_cmd->p_in[4][0]                   (signal_dspin_cmd_l2g_d);
-    router_cmd->p_in[4][1]                   (signal_dspin_m2p_l2g_c);
-    router_cmd->p_in[4][2]                   (signal_dspin_clack_l2g_c);
-
-    router_rsp->p_out[4][0]                  (signal_dspin_rsp_g2l_d);
-    router_rsp->p_out[4][1]                  (signal_dspin_p2m_g2l_c);
-    router_rsp->p_in[4][0]                   (signal_dspin_rsp_l2g_d);
-    router_rsp->p_in[4][1]                   (signal_dspin_p2m_l2g_c);
-
-
-    std::cout << "  - CMD & RSP routers connected" << std::endl;
+    //////////////////////// ROUTERS
+    router_cmd->p_clk                      (this->p_clk);
+    router_cmd->p_resetn                   (this->p_resetn);
+    router_rsp->p_clk                      (this->p_clk);
+    router_rsp->p_resetn                   (this->p_resetn);
+    router_m2p->p_clk                      (this->p_clk);
+    router_m2p->p_resetn                   (this->p_resetn);
+    router_p2m->p_clk                      (this->p_clk);
+    router_p2m->p_resetn                   (this->p_resetn);
+    router_cla->p_clk                      (this->p_clk);
+    router_cla->p_resetn                   (this->p_resetn);
+
+    // loop on N/S/E/W ports
+    for (size_t i = 0; i < 4; i++)
+    {
+        router_cmd->p_out[i]               (this->p_cmd_out[i]);
+        router_cmd->p_in[i]                (this->p_cmd_in[i]);
+
+        router_rsp->p_out[i]               (this->p_rsp_out[i]);
+        router_rsp->p_in[i]                (this->p_rsp_in[i]);
+
+        router_m2p->p_out[i]               (this->p_m2p_out[i]);
+        router_m2p->p_in[i]                (this->p_m2p_in[i]);
+
+        router_p2m->p_out[i]               (this->p_p2m_out[i]);
+        router_p2m->p_in[i]                (this->p_p2m_in[i]);
+
+        router_cla->p_out[i]               (this->p_cla_out[i]);
+        router_cla->p_in[i]                (this->p_cla_in[i]);
+    }
+
+    router_cmd->p_out[4]                   (signal_dspin_cmd_g2l_d);
+    router_cmd->p_in[4]                    (signal_dspin_cmd_l2g_d);
+
+    router_rsp->p_out[4]                   (signal_dspin_rsp_g2l_d);
+    router_rsp->p_in[4]                    (signal_dspin_rsp_l2g_d);
+
+    router_m2p->p_out[4]                   (signal_dspin_m2p_g2l_c);
+    router_m2p->p_in[4]                    (signal_dspin_m2p_l2g_c);
+
+    router_p2m->p_out[4]                   (signal_dspin_p2m_g2l_c);
+    router_p2m->p_in[4]                    (signal_dspin_p2m_l2g_c);
+
+    router_cla->p_out[4]                   (signal_dspin_clack_g2l_c);
+    router_cla->p_in[4]                    (signal_dspin_clack_l2g_c);
+
+    std::cout << "  - routers connected" << std::endl;
 
     ///////////////////// CMD DSPIN  local crossbar direct
-    xbar_cmd_d->p_clk                            (this->p_clk);
-    xbar_cmd_d->p_resetn                         (this->p_resetn);
-    xbar_cmd_d->p_global_out                     (signal_dspin_cmd_l2g_d);
-    xbar_cmd_d->p_global_in                      (signal_dspin_cmd_g2l_d);
-
-    xbar_cmd_d->p_local_out[tgtid_memc]          (signal_dspin_cmd_memc_t);
-    xbar_cmd_d->p_local_out[tgtid_xicu]          (signal_dspin_cmd_xicu_t);
-    xbar_cmd_d->p_local_out[tgtid_mdma]          (signal_dspin_cmd_mdma_t);
-
-    xbar_cmd_d->p_local_in[nb_procs]             (signal_dspin_cmd_mdma_i);
+    xbar_cmd->p_clk                            (this->p_clk);
+    xbar_cmd->p_resetn                         (this->p_resetn);
+    xbar_cmd->p_global_out                     (signal_dspin_cmd_l2g_d);
+    xbar_cmd->p_global_in                      (signal_dspin_cmd_g2l_d);
+
+    xbar_cmd->p_local_out[tgtid_memc]          (signal_dspin_cmd_memc_t);
+    xbar_cmd->p_local_out[tgtid_xicu]          (signal_dspin_cmd_xicu_t);
 
     for (size_t p = 0; p < nb_procs; p++)
-        xbar_cmd_d->p_local_in[p]                (signal_dspin_cmd_proc_i[p]);
-
-    if (io)
-    {
-        xbar_cmd_d->p_local_out[tgtid_mtty]      (signal_dspin_cmd_mtty_t);
-        xbar_cmd_d->p_local_out[tgtid_bdev]      (signal_dspin_cmd_bdev_t);
-        xbar_cmd_d->p_local_out[tgtid_fbuf]      (signal_dspin_cmd_fbuf_t);
-        xbar_cmd_d->p_local_out[tgtid_mnic]      (signal_dspin_cmd_mnic_t);
-        xbar_cmd_d->p_local_out[tgtid_chbuf]     (signal_dspin_cmd_chbuf_t);
-        xbar_cmd_d->p_local_out[tgtid_simh]      (signal_dspin_cmd_simh_t);
-
-        xbar_cmd_d->p_local_in[nb_procs + 1]     (signal_dspin_cmd_bdev_i);
-        xbar_cmd_d->p_local_in[nb_procs + 2]     (signal_dspin_cmd_chbuf_i);
-    }
-
-    std::cout << "  - Command Direct crossbar connected" << std::endl;
+        xbar_cmd->p_local_in[p]                (signal_dspin_cmd_proc_i[p]);
+
+    if ((x_id == 0) and (y_id == 0))  // cluster(0,0)
+    {
+        xbar_cmd->p_local_out[tgtid_mtty]      (signal_dspin_cmd_mtty_t);
+        xbar_cmd->p_local_out[tgtid_bdev]      (signal_dspin_cmd_bdev_t);
+
+        xbar_cmd->p_local_in[nb_procs]         (signal_dspin_cmd_bdev_i);
+    }
+
+    std::cout << "  - CMD Direct crossbar connected" << std::endl;
 
     //////////////////////// RSP DSPIN  local crossbar direct
-    xbar_rsp_d->p_clk                            (this->p_clk);
-    xbar_rsp_d->p_resetn                         (this->p_resetn);
-    xbar_rsp_d->p_global_out                     (signal_dspin_rsp_l2g_d);
-    xbar_rsp_d->p_global_in                      (signal_dspin_rsp_g2l_d);
-
-    xbar_rsp_d->p_local_in[tgtid_memc]           (signal_dspin_rsp_memc_t);
-    xbar_rsp_d->p_local_in[tgtid_xicu]           (signal_dspin_rsp_xicu_t);
-    xbar_rsp_d->p_local_in[tgtid_mdma]           (signal_dspin_rsp_mdma_t);
-
-    xbar_rsp_d->p_local_out[nb_procs]            (signal_dspin_rsp_mdma_i);
+    xbar_rsp->p_clk                            (this->p_clk);
+    xbar_rsp->p_resetn                         (this->p_resetn);
+    xbar_rsp->p_global_out                     (signal_dspin_rsp_l2g_d);
+    xbar_rsp->p_global_in                      (signal_dspin_rsp_g2l_d);
+
+    xbar_rsp->p_local_in[tgtid_memc]           (signal_dspin_rsp_memc_t);
+    xbar_rsp->p_local_in[tgtid_xicu]           (signal_dspin_rsp_xicu_t);
 
     for (size_t p = 0; p < nb_procs; p++)
-        xbar_rsp_d->p_local_out[p]               (signal_dspin_rsp_proc_i[p]);
-
-    if (io)
-    {
-        xbar_rsp_d->p_local_in[tgtid_mtty]       (signal_dspin_rsp_mtty_t);
-        xbar_rsp_d->p_local_in[tgtid_bdev]       (signal_dspin_rsp_bdev_t);
-        xbar_rsp_d->p_local_in[tgtid_fbuf]       (signal_dspin_rsp_fbuf_t);
-        xbar_rsp_d->p_local_in[tgtid_mnic]       (signal_dspin_rsp_mnic_t);
-        xbar_rsp_d->p_local_in[tgtid_chbuf]      (signal_dspin_rsp_chbuf_t);
-        xbar_rsp_d->p_local_in[tgtid_simh]       (signal_dspin_rsp_simh_t);
-
-        xbar_rsp_d->p_local_out[nb_procs + 1]    (signal_dspin_rsp_bdev_i);
-        xbar_rsp_d->p_local_out[nb_procs + 2]    (signal_dspin_rsp_chbuf_i);
-    }
-
-    std::cout << "  - Response Direct crossbar connected" << std::endl;
+        xbar_rsp->p_local_out[p]               (signal_dspin_rsp_proc_i[p]);
+
+    if ((x_id == 0) and (y_id == 0))  // cluster(0,0)
+    {
+        xbar_rsp->p_local_in[tgtid_mtty]       (signal_dspin_rsp_mtty_t);
+        xbar_rsp->p_local_in[tgtid_bdev]       (signal_dspin_rsp_bdev_t);
+
+        xbar_rsp->p_local_out[nb_procs]        (signal_dspin_rsp_bdev_i);
+    }
+
+    std::cout << "  - RSP Direct crossbar connected" << std::endl;
 
     ////////////////////// M2P DSPIN local crossbar coherence
-    xbar_m2p_c->p_clk                            (this->p_clk);
-    xbar_m2p_c->p_resetn                         (this->p_resetn);
-    xbar_m2p_c->p_global_out                     (signal_dspin_m2p_l2g_c);
-    xbar_m2p_c->p_global_in                      (signal_dspin_m2p_g2l_c);
-    xbar_m2p_c->p_local_in[0]                    (signal_dspin_m2p_memc);
+    xbar_m2p->p_clk                            (this->p_clk);
+    xbar_m2p->p_resetn                         (this->p_resetn);
+    xbar_m2p->p_global_out                     (signal_dspin_m2p_l2g_c);
+    xbar_m2p->p_global_in                      (signal_dspin_m2p_g2l_c);
+    xbar_m2p->p_local_in[0]                    (signal_dspin_m2p_memc);
     for (size_t p = 0; p < nb_procs; p++)
-        xbar_m2p_c->p_local_out[p]               (signal_dspin_m2p_proc[p]);
+        xbar_m2p->p_local_out[p]               (signal_dspin_m2p_proc[p]);
 
     std::cout << "  - M2P Coherence crossbar connected" << std::endl;
 
+    ////////////////////////// P2M DSPIN local crossbar coherence
+    xbar_p2m->p_clk                            (this->p_clk);
+    xbar_p2m->p_resetn                         (this->p_resetn);
+    xbar_p2m->p_global_out                     (signal_dspin_p2m_l2g_c);
+    xbar_p2m->p_global_in                      (signal_dspin_p2m_g2l_c);
+    xbar_p2m->p_local_out[0]                   (signal_dspin_p2m_memc);
+    for (size_t p = 0; p < nb_procs; p++)
+        xbar_p2m->p_local_in[p]                (signal_dspin_p2m_proc[p]);
+
+    std::cout << "  - P2M Coherence crossbar connected" << std::endl;
+
     ////////////////////// CLACK DSPIN local crossbar coherence
-    xbar_clack_c->p_clk                          (this->p_clk);
-    xbar_clack_c->p_resetn                       (this->p_resetn);
-    xbar_clack_c->p_global_out                   (signal_dspin_clack_l2g_c);
-    xbar_clack_c->p_global_in                    (signal_dspin_clack_g2l_c);
-    xbar_clack_c->p_local_in[0]                  (signal_dspin_clack_memc);
+    xbar_cla->p_clk                          (this->p_clk);
+    xbar_cla->p_resetn                       (this->p_resetn);
+    xbar_cla->p_global_out                   (signal_dspin_clack_l2g_c);
+    xbar_cla->p_global_in                    (signal_dspin_clack_g2l_c);
+    xbar_cla->p_local_in[0]                  (signal_dspin_clack_memc);
     for (size_t p = 0; p < nb_procs; p++)
-        xbar_clack_c->p_local_out[p]             (signal_dspin_clack_proc[p]);
-
-    std::cout << "  - Clack Coherence crossbar connected" << std::endl;
-
-    ////////////////////////// P2M DSPIN local crossbar coherence
-    xbar_p2m_c->p_clk                            (this->p_clk);
-    xbar_p2m_c->p_resetn                         (this->p_resetn);
-    xbar_p2m_c->p_global_out                     (signal_dspin_p2m_l2g_c);
-    xbar_p2m_c->p_global_in                      (signal_dspin_p2m_g2l_c);
-    xbar_p2m_c->p_local_out[0]                   (signal_dspin_p2m_memc);
-    for (size_t p = 0; p < nb_procs; p++)
-        xbar_p2m_c->p_local_in[p]                (signal_dspin_p2m_proc[p]);
-
-    std::cout << "  - P2M Coherence crossbar connected" << std::endl;
-
+        xbar_cla->p_local_out[p]             (signal_dspin_clack_proc[p]);
+
+    std::cout << "  - CLA Coherence crossbar connected" << std::endl;
 
     //////////////////////////////////// Processors
@@ -569 +490 @@
         proc[p]->p_dspin_p2m                (signal_dspin_p2m_proc[p]);
         proc[p]->p_dspin_clack              (signal_dspin_clack_proc[p]);
-        proc[p]->p_irq[0]                   (signal_proc_it[p]);
-        for ( size_t j = 1 ; j < 6 ; j++)
+
+        for ( size_t j = 0 ; j < 6 ; j++)
         {
-            proc[p]->p_irq[j]               (signal_false);
+            if ( j < 4 ) proc[p]->p_irq[j]  (signal_proc_irq[4*p + j]);
+            else         proc[p]->p_irq[j]  (signal_false);
         }
 
@@ -588 +510 @@
     xicu->p_resetn                     (this->p_resetn);
     xicu->p_vci                        (signal_vci_tgt_xicu);
-    for (size_t p = 0; p < nb_procs; p++)
-    {
-        xicu->p_irq[p]                 (signal_proc_it[p]);
-    }
-
-    for (size_t i = 0; i < 32; i++)
-    {
-        if (io) // I/O cluster
+
+    for (size_t i = 0 ; i < 16  ; i++)
+    {
+        xicu->p_irq[i]                 (signal_proc_irq[i]);
+    }
+
+    for (size_t i = 0; i < 16; i++)
+    {
+        if ((x_id == 0) and (y_id == 0)) // cluster (0,0)
         {
-            if      (i == 0)                 xicu->p_hwi[i] (signal_irq_bdev);
-            else if (i < 8)                  xicu->p_hwi[i] (signal_false);
-            else if (i < (8 + nb_dmas))      xicu->p_hwi[i] (signal_irq_mdma[i - 8]);
-            else if (i < 12)                 xicu->p_hwi[i] (signal_false);
-            else if (i == 12)                xicu->p_hwi[i] (signal_irq_memc);
-            else if (i < 16)                 xicu->p_hwi[i] (signal_false);
-            else if (i < (16 + nb_ttys))     xicu->p_hwi[i] (signal_irq_mtty[i - 16]);
-            else                             xicu->p_hwi[i] (signal_false);
+            if      (i == 8)           xicu->p_hwi[i] (signal_irq_memc);
+            else if (i == 9)           xicu->p_hwi[i] (signal_irq_bdev);
+            else if (i == 10)          xicu->p_hwi[i] (signal_irq_mtty);
+            else                       xicu->p_hwi[i] (signal_false);
         }
-        else      // other clusters
+        else                             // other clusters
         {
-            if      (i < 8)                  xicu->p_hwi[i] (signal_false);
-            else if (i < (8 + nb_dmas))      xicu->p_hwi[i] (signal_irq_mdma[i - 8]);
-            else if (i < 12)                 xicu->p_hwi[i] (signal_false);
-            else if (i == 12)                xicu->p_hwi[i] (signal_irq_memc);
-            else                             xicu->p_hwi[i] (signal_false);
+            if (i == 1)                xicu->p_hwi[i] (signal_irq_memc);
+            else                       xicu->p_hwi[i] (signal_false);
         }
     }
@@ -651 +567 @@
     std::cout << "  - XRAM connected" << std::endl;
 
-    ////////////////////////////////////////////// MDMA
-    mdma->p_clk                        (this->p_clk);
-    mdma->p_resetn                     (this->p_resetn);
-    mdma->p_vci_target                 (signal_vci_tgt_mdma);
-    mdma->p_vci_initiator              (signal_vci_ini_mdma);
-    for (size_t i = 0; i < nb_dmas; i++)
-        mdma->p_irq[i]                 (signal_irq_mdma[i]);
-
-    // wrapper tgt MDMA
-    wt_mdma->p_clk                     (this->p_clk);
-    wt_mdma->p_resetn                  (this->p_resetn);
-    wt_mdma->p_dspin_cmd               (signal_dspin_cmd_mdma_t);
-    wt_mdma->p_dspin_rsp               (signal_dspin_rsp_mdma_t);
-    wt_mdma->p_vci                     (signal_vci_tgt_mdma);
-
-    // wrapper ini MDMA
-    wi_mdma->p_clk                     (this->p_clk);
-    wi_mdma->p_resetn                  (this->p_resetn);
-    wi_mdma->p_dspin_cmd               (signal_dspin_cmd_mdma_i);
-    wi_mdma->p_dspin_rsp               (signal_dspin_rsp_mdma_i);
-    wi_mdma->p_vci                     (signal_vci_ini_mdma);
-
-    std::cout << "  - MDMA connected" << std::endl;
-
-    /////////////////////////////// Components in I/O cluster
-
-    if (io)
+    /////////////////////////////// Extra Components in cluster(0,0)
+
+    if ((x_id == 0) and (y_id == 0))
     {
         // BDEV
@@ -702 +594 @@
         std::cout << "  - BDEV connected" << std::endl;
 
-        // FBUF
-        fbuf->p_clk                    (this->p_clk);
-        fbuf->p_resetn                 (this->p_resetn);
-        fbuf->p_vci                    (signal_vci_tgt_fbuf);
-
-        // wrapper tgt FBUF
-        wt_fbuf->p_clk                 (this->p_clk);
-        wt_fbuf->p_resetn              (this->p_resetn);
-        wt_fbuf->p_dspin_cmd           (signal_dspin_cmd_fbuf_t);
-        wt_fbuf->p_dspin_rsp           (signal_dspin_rsp_fbuf_t);
-        wt_fbuf->p_vci                 (signal_vci_tgt_fbuf);
-
-        std::cout << "  - FBUF connected" << std::endl;
-
-        // MNIC
-        mnic->p_clk                    (this->p_clk);
-        mnic->p_resetn                 (this->p_resetn);
-        mnic->p_vci                    (signal_vci_tgt_mnic);
-        for (size_t i = 0; i < nic_channels; i++)
-        {
-            mnic->p_rx_irq[i]          (signal_irq_mnic_rx[i]);
-            mnic->p_tx_irq[i]          (signal_irq_mnic_tx[i]);
-        }
-
-        // wrapper tgt MNIC
-        wt_mnic->p_clk                 (this->p_clk);
-        wt_mnic->p_resetn              (this->p_resetn);
-        wt_mnic->p_dspin_cmd           (signal_dspin_cmd_mnic_t);
-        wt_mnic->p_dspin_rsp           (signal_dspin_rsp_mnic_t);
-        wt_mnic->p_vci                 (signal_vci_tgt_mnic);
-
-        std::cout << "  - MNIC connected" << std::endl;
-
-        // CHBUF
-        chbuf->p_clk                    (this->p_clk);
-        chbuf->p_resetn                 (this->p_resetn);
-        chbuf->p_vci_target             (signal_vci_tgt_chbuf);
-        chbuf->p_vci_initiator          (signal_vci_ini_chbuf);
-        for (size_t i = 0; i < chbufdma_channels; i++)
-        {
-            chbuf->p_irq[i]          (signal_irq_chbuf[i]);
-        }
-
-        // wrapper tgt CHBUF
-        wt_chbuf->p_clk                 (this->p_clk);
-        wt_chbuf->p_resetn              (this->p_resetn);
-        wt_chbuf->p_dspin_cmd           (signal_dspin_cmd_chbuf_t);
-        wt_chbuf->p_dspin_rsp           (signal_dspin_rsp_chbuf_t);
-        wt_chbuf->p_vci                 (signal_vci_tgt_chbuf);
-
-        // wrapper ini CHBUF
-        wi_chbuf->p_clk                 (this->p_clk);
-        wi_chbuf->p_resetn              (this->p_resetn);
-        wi_chbuf->p_dspin_cmd           (signal_dspin_cmd_chbuf_i);
-        wi_chbuf->p_dspin_rsp           (signal_dspin_rsp_chbuf_i);
-        wi_chbuf->p_vci                 (signal_vci_ini_chbuf);
-
-        std::cout << "  - CHBUF connected" << std::endl;
-
-        // MTTY
+        // MTTY (single channel)
         mtty->p_clk                    (this->p_clk);
         mtty->p_resetn                 (this->p_resetn);
         mtty->p_vci                    (signal_vci_tgt_mtty);
-        for (size_t i = 0; i < nb_ttys; i++)
-        {
-            mtty->p_irq[i]             (signal_irq_mtty[i]);
-        }
+        mtty->p_irq[0]                 (signal_irq_mtty);
 
         // wrapper tgt MTTY
@@ -777 +607 @@
         wt_mtty->p_vci                 (signal_vci_tgt_mtty);
 
-
-        // Sim Helper
-        simhelper->p_clk               (this->p_clk);
-        simhelper->p_resetn            (this->p_resetn);
-        simhelper->p_vci               (signal_vci_tgt_simh);
-        
-        // wrapper tgt Sim Helper
-        wt_simhelper->p_clk            (this->p_clk);
-        wt_simhelper->p_resetn         (this->p_resetn);
-        wt_simhelper->p_dspin_cmd      (signal_dspin_cmd_simh_t);
-        wt_simhelper->p_dspin_rsp      (signal_dspin_rsp_simh_t);
-        wt_simhelper->p_vci            (signal_vci_tgt_simh);
-
         std::cout << "  - MTTY connected" << std::endl;
-   }
+    }
 } // end constructor
 
@@ -804 +621 @@
                                                  vci_param_ext>::~TsarLetiCluster() {
 
-    dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4, 3);
-    dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4, 3);
-    dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4, 2);
-    dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4, 2);
-
-    for (size_t p = 0; p < n_procs; p++)
-    {
-        delete proc[p];
-        delete wi_proc[p];
+    dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4);
+    dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4);
+
+    dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4);
+    dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4);
+
+    dealloc_elems<DspinInput<dspin_cmd_width> > (p_m2p_in, 4);
+    dealloc_elems<DspinOutput<dspin_cmd_width> >(p_m2p_out, 4);
+
+    dealloc_elems<DspinInput<dspin_rsp_width> > (p_p2m_in, 4);
+    dealloc_elems<DspinOutput<dspin_rsp_width> >(p_p2m_out, 4);
+
+    dealloc_elems<DspinInput<dspin_cmd_width> > (p_cla_in, 4);
+    dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cla_out, 4);
+
+    for (size_t p = 0; p < 4 ; p++)
+    {
+        if ( proc[p] )     delete proc[p];
+        if ( wi_proc[p] )  delete wi_proc[p];
     }
 
@@ -820 +647 @@
     delete xicu;
     delete wt_xicu;
-    delete mdma;
-    delete wt_mdma;
-    delete wi_mdma;
-    delete xbar_cmd_d;
-    delete xbar_rsp_d;
-    delete xbar_m2p_c;
-    delete xbar_p2m_c;
-    delete xbar_clack_c;
+    delete xbar_cmd;
+    delete xbar_rsp;
+    delete xbar_m2p;
+    delete xbar_p2m;
+    delete xbar_cla;
     delete router_cmd;
     delete router_rsp;
-    if (bdev != NULL)
-    {
-        delete fbuf;
-        delete wt_fbuf;
+    delete router_m2p;
+    delete router_p2m;
+    delete router_cla;
+
+    if ( bdev )
+    {
         delete bdev;
         delete wt_bdev;
         delete wi_bdev;
-        delete mnic;
-        delete wt_mnic;
-        delete chbuf;
-        delete wt_chbuf;
-        delete wi_chbuf;
+    }
+
+    if ( mtty )
+    {
         delete mtty;
         delete wt_mtty;
-        delete simhelper;
-        delete wt_simhelper;
     }
 }