Changeset 675 for branches/MESI/modules/vci_mem_cache/caba/source/include
- Timestamp:
- Apr 11, 2014, 3:09:22 PM (11 years ago)
- File:
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- 1 edited
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branches/MESI/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r670 r675 850 850 sc_signal<bool> r_read_to_cc_send_brdcast_req; // bd inval 851 851 sc_signal<bool> r_read_to_cc_send_type; //cc inval or cc updt 852 sc_signal<bool> r_read_to_cc_send_is_shared; //line is or not shared 852 853 853 854 //RWT: Buffer between READ fsm and CLEANUP fsm (wait for the data coming from L1 cache) … … 1039 1040 sc_signal<size_t> r_cleanup_to_tgt_rsp_pktid; // transaction pktid 1040 1041 sc_signal<addr_t> r_cleanup_to_tgt_rsp_ll_key; 1042 sc_signal<addr_t> r_cleanup_to_tgt_rsp_nline; 1041 1043 1042 1044 sc_signal<bool> r_cleanup_to_tgt_rsp_type;
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