Changeset 707 for trunk/platforms/tsar_generic_iob/tsar_iob_cluster
- Timestamp:
- Jun 5, 2014, 11:27:33 AM (11 years ago)
- Location:
- trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r693 r707 61 61 soclib::caba::DspinInput<dspin_ram_rsp_width>* p_dspin_iob_rsp_in; 62 62 63 // These ports are used to connect hard IRQ from external peripherals to IOB064 sc_in<bool>* p_irq[32];65 66 63 // These arrays of ports are used to connect the INT & RAM networks in top cell 67 64 soclib::caba::DspinOutput<dspin_int_cmd_width>** p_dspin_int_cmd_out; -
trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r693 r707 110 110 p_dspin_iob_cmd_out = new soclib::caba::DspinOutput<dspin_ram_cmd_width>; 111 111 p_dspin_iob_rsp_in = new soclib::caba::DspinInput<dspin_ram_rsp_width>; 112 }113 114 // IRQ ports in cluster_iob0 only115 if ( cluster_id == cluster_iob0 )116 {117 for ( size_t n=0 ; n<32 ; n++ ) p_irq[n] = new sc_in<bool>;118 112 } 119 113 … … 192 186 32, // number of hard IRQs 193 187 32, // number of soft IRQs 194 nb_procs);// number of output IRQs188 32); // number of output IRQs 195 189 196 190 //////////// MDMA … … 241 235 s_int_dspin_tgt_wrapper_gate_d.str().c_str(), 242 236 x_width + y_width + l_width); 243 244 237 245 238 //////////// Coherence LOCAL_XBAR(S) … … 283 276 1, 1, // fifo depths 284 277 true, // CMD 285 false, // don't use localrouting table278 false, // no routing table 286 279 false); // broadcast 287 280 … … 359 352 size_t iox_local_id; 360 353 size_t global_id; 361 bool has_irqs;362 354 if ( cluster_id == cluster_iob0 ) 363 355 { 364 356 iox_local_id = 0; 365 357 global_id = cluster_iob0; 366 has_irqs = true;367 358 } 368 359 else … … 370 361 iox_local_id = 1; 371 362 global_id = cluster_iob1; 372 has_irqs = false;373 363 } 374 364 … … 384 374 IntTab( global_id, iobx_int_srcid ), // INT SRCID 385 375 IntTab( global_id, iox_local_id ), // IOX TGTID 386 has_irqs,387 376 16, // cache line words 388 377 8, // IOTLB ways … … 511 500 proc[p]->p_dspin_p2m (signal_int_dspin_p2m_proc[p]); 512 501 proc[p]->p_dspin_clack (signal_int_dspin_clack_proc[p]); 513 proc[p]->p_irq[0] (signal_proc_it[p]); 514 for ( size_t j = 1; j < 6 ; j++)502 503 for ( size_t j = 0 ; j < 6 ; j++) 515 504 { 516 proc[p]->p_irq[j] (signal_false); 505 if ( j < 4 ) proc[p]->p_irq[j] (signal_proc_it[4*p + j]); 506 else proc[p]->p_irq[j] (signal_false); 517 507 } 518 508 } … … 522 512 xicu->p_resetn (this->p_resetn); 523 513 xicu->p_vci (signal_int_vci_tgt_xicu); 524 for ( size_t p=0 ; p <nb_procs; p++)514 for ( size_t p=0 ; p < 32 ; p++) 525 515 { 526 516 xicu->p_irq[p] (signal_proc_it[p]); … … 528 518 for ( size_t i=0 ; i<32 ; i++) 529 519 { 530 if (cluster_id == cluster_iob0) 531 xicu->p_hwi[i] (*(this->p_irq[i])); 532 else 533 xicu->p_hwi[i] (signal_false); 520 if ( i == 0 ) xicu->p_hwi[i] (signal_irq_memc); 521 else if ( i <= nb_dmas ) xicu->p_hwi[i] (signal_irq_mdma[i-1]); 522 else xicu->p_hwi[i] (signal_false); 534 523 } 535 524 … … 572 561 573 562 //////////////////////////// RAM network CMD & RSP routers 574 ram_router_cmd->p_clk (this->p_clk);575 ram_router_cmd->p_resetn (this->p_resetn);576 ram_router_rsp->p_clk (this->p_clk);577 ram_router_rsp->p_resetn (this->p_resetn);563 ram_router_cmd->p_clk (this->p_clk); 564 ram_router_cmd->p_resetn (this->p_resetn); 565 ram_router_rsp->p_clk (this->p_clk); 566 ram_router_rsp->p_resetn (this->p_resetn); 578 567 for( size_t n=0 ; n<4 ; n++) 579 568 { 580 ram_router_cmd->p_out[n] (this->p_dspin_ram_cmd_out[n]);581 ram_router_cmd->p_in[n] (this->p_dspin_ram_cmd_in[n]);582 ram_router_rsp->p_out[n] (this->p_dspin_ram_rsp_out[n]);583 ram_router_rsp->p_in[n] (this->p_dspin_ram_rsp_in[n]);584 } 585 ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_xram_t);586 ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_memc_i);587 ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i);588 ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_xram_t);569 ram_router_cmd->p_out[n] (this->p_dspin_ram_cmd_out[n]); 570 ram_router_cmd->p_in[n] (this->p_dspin_ram_cmd_in[n]); 571 ram_router_rsp->p_out[n] (this->p_dspin_ram_rsp_out[n]); 572 ram_router_rsp->p_in[n] (this->p_dspin_ram_rsp_in[n]); 573 } 574 ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_xram_t); 575 ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_memc_i); 576 ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i); 577 ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_xram_t); 589 578 590 579 ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1. … … 600 589 iob->p_vci_ini_ram (signal_ram_vci_ini_iobx); 601 590 602 if ( cluster_id == cluster_iob0 )603 for ( size_t n=0 ; n<32 ; n++ )604 (*iob->p_irq[n]) (*(this->p_irq[n]));605 606 591 // initiator wrapper to RAM network 607 592 iob_ram_wi->p_clk (this->p_clk);
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