Ignore:
Timestamp:
Jun 29, 2014, 1:51:52 PM (10 years ago)
Author:
alain
Message:

Introducing distributed page_tables and kernel code in arch.py for the
tsar_generic_iob platform.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/platforms/tsar_generic_iob/top.cpp

    r718 r730  
    1111// - BROM : boot ROM
    1212// - FBUF : Frame Buffer
    13 // - MTTY : multi TTY (up to 15 channels)
     13// - MTTY : multi TTY (one channel)
    1414// - MNIC : Network controller (up to 2 channels)
    1515// - CDMA : Chained Buffer DMA controller (up to 4 channels)
    16 // - BDEV : Dlock Device controler (1 channel)
     16// - BDEV : Dlock Device controler (one channel)
    1717// - IOPI : HWI to SWI translator.
    1818//
     
    3939// external IOPIC component, that must be configured by the OS to route
    4040// these WTI ITQS to one or several internal XICU components.
    41 // The total number of channels for the external peripherals (MTTY, MNIC, CDMA
    42 // IOC or HBA) is limited by the IOPIC 32 HWI inputs:..
    4341// - IOPIC HWI[1:0]     connected to IRQ_NIC_RX[1:0]
    4442// - IOPIC HWI[3:2]     connected to IRQ_NIC_TX[1:0]
    4543// - IOPIC HWI[7:4]     connected to IRQ_CMA_TX[3:0]]
    4644// - IOPIC HWI[8]       connected to IRQ_BDEV
    47 // - IOPIC HWI[15:9]    unused       (grounded)
    48 // - IOPIC HWI[23:16]   connected to IRQ_TTY_RX[7:0]]
    49 // - IOPIC HWI[31:24]   connected to IRQ_TTY_TX[7:0]]   TBD
     45// - IOPIC HWI[9]       connected to IRQ_TTY_RX[0]
    5046//
    51 // Besides the external peripherals, each cluster contains on XICU component,
     47// Besides the external peripherals, each cluster contains one XICU component,
    5248// and one multi channels DMA component.
    5349// The XICU component is mainly used to handle WTI IRQs, as only 2 HWI IRQs
     
    232228//////////////////////i/////////////////////////////////////
    233229
    234 #define MAX_FROZEN_CYCLES     200000
     230#define MAX_FROZEN_CYCLES     20000000
    235231
    236232/////////////////////////////////////////////////////////
     
    14281424
    14291425        // Monitor a specific address for one L2 cache
    1430         // clusters[0][0]->memc->cache_monitor( 0x170000ULL);
     1426        // clusters[0][0]->memc->cache_monitor( 0x1542c0ULL, true );   // single word monitoring
    14311427
    14321428        // Monitor a specific address for one XRAM
     
    14451441                size_t x          = cluster_xy >> 4;
    14461442                size_t y          = cluster_xy & 0xF;
    1447 
    1448                 clusters[x][y]->proc[l]->print_trace(1);
     1443 
     1444                clusters[x][y]->proc[l]->print_trace(0x40);
    14491445                std::ostringstream proc_signame;
    14501446                proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ;
     
    15111507//              clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI");
    15121508
    1513                 signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI");
    1514                 signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT");
     1509//              signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI");
     1510//              signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT");
    15151511
    15161512//              cdma->print_trace();
     
    15281524                signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI");
    15291525
    1530                 mnic->print_trace();
    1531                 signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT");
     1526//              mnic->print_trace();
     1527//              signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT");
    15321528
    15331529//              fbuf->print_trace();
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