Changeset 742 for branches/fault_tolerance/platforms
- Timestamp:
- Jul 9, 2014, 5:36:08 PM (10 years ago)
- Location:
- branches/fault_tolerance/platforms/tsar_generic_iob
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/fault_tolerance/platforms/tsar_generic_iob/top.cpp
r738 r742 47 47 // Besides the external peripherals, each cluster contains one XICU component, 48 48 // and one multi channels DMA component. 49 // The XICU component is mainly used to handle WTI IRQs, as only 2HWI IRQs49 // The XICU component is mainly used to handle WTI IRQs, as only 5 HWI IRQs 50 50 // are connected to XICU in each cluster: 51 51 // - IRQ_IN[0] : MMC -
branches/fault_tolerance/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r724 r742 71 71 // interrupt signals 72 72 sc_signal<bool> signal_false; 73 sc_signal<bool> signal_proc_it[ 8];73 sc_signal<bool> signal_proc_it[16]; 74 74 sc_signal<bool> signal_irq_mdma[8]; 75 75 sc_signal<bool> signal_irq_memc; -
branches/fault_tolerance/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r724 r742 639 639 } 640 640 641 SC_METHOD(init); 641 SC_METHOD(init); 642 642 643 } // end constructor 643 644 644 645 tmpl(void)::init() 645 646 { 646 signal_ram_dspin_cmd_false.write = false; 647 signal_ram_dspin_cmd_false.read = true; 648 signal_ram_dspin_rsp_false.write = false; 649 signal_ram_dspin_rsp_false.read = true; 647 signal_ram_dspin_cmd_false.write = false; 648 signal_ram_dspin_rsp_false.read = true; 650 649 } // end init 651 650
Note: See TracChangeset
for help on using the changeset viewer.