Changeset 751 for branches/reconfiguration/platforms/tsar_generic_iob/top.cpp

Timestamp:

Jul 17, 2014, 11:37:17 AM (10 years ago)

Author:

cfuguet

Message:

reconfiguration/tsar_generic_iob: reverting part of last commit

• Use of the same dspin signal for boundaries is not possible because for the data coming from routers, there will be more than one driver.

File:

• branches/reconfiguration/platforms/tsar_generic_iob/top.cpp (modified) (5 diffs)

branches/reconfiguration/platforms/tsar_generic_iob/top.cpp

@@ -844 +844 @@
 
    // Mesh boundaries INT network DSPIN
-   DspinSignals<dspin_int_cmd_width> signal_dspin_false_int_cmd_in;
-   DspinSignals<dspin_int_cmd_width> signal_dspin_false_int_cmd_out;
-   DspinSignals<dspin_int_rsp_width> signal_dspin_false_int_rsp_in;
-   DspinSignals<dspin_int_rsp_width> signal_dspin_false_int_rsp_out;
+   DspinSignals<dspin_int_cmd_width>**** signal_dspin_false_int_cmd_in =
+      alloc_elems<DspinSignals<dspin_int_cmd_width> >("signal_dspin_false_int_cmd_in", XMAX, YMAX, 4, 3);
+   DspinSignals<dspin_int_cmd_width>**** signal_dspin_false_int_cmd_out =
+      alloc_elems<DspinSignals<dspin_int_cmd_width> >("signal_dspin_false_int_cmd_out", XMAX, YMAX, 4, 3);
+   DspinSignals<dspin_int_rsp_width>**** signal_dspin_false_int_rsp_in =
+      alloc_elems<DspinSignals<dspin_int_rsp_width> >("signal_dspin_false_int_rsp_in", XMAX, YMAX, 4, 2);
+   DspinSignals<dspin_int_rsp_width>**** signal_dspin_false_int_rsp_out =
+      alloc_elems<DspinSignals<dspin_int_rsp_width> >("signal_dspin_false_int_rsp_out", XMAX, YMAX, 4, 2);
+
 
    // Horizontal inter-clusters RAM network DSPIN
@@ -870 +875 @@
 
    // Mesh boundaries RAM network DSPIN
-   DspinSignals<dspin_ram_cmd_width> signal_dspin_false_ram_cmd_in;
-   DspinSignals<dspin_ram_cmd_width> signal_dspin_false_ram_cmd_out;
-   DspinSignals<dspin_ram_rsp_width> signal_dspin_false_ram_rsp_in;
-   DspinSignals<dspin_ram_rsp_width> signal_dspin_false_ram_rsp_out;
+   DspinSignals<dspin_ram_cmd_width>*** signal_dspin_false_ram_cmd_in =
+      alloc_elems<DspinSignals<dspin_ram_cmd_width> >("signal_dspin_false_ram_cmd_in", XMAX, YMAX, 4);
+   DspinSignals<dspin_ram_cmd_width>*** signal_dspin_false_ram_cmd_out =
+      alloc_elems<DspinSignals<dspin_ram_cmd_width> >("signal_dspin_false_ram_cmd_out", XMAX, YMAX, 4);
+   DspinSignals<dspin_ram_rsp_width>*** signal_dspin_false_ram_rsp_in =
+      alloc_elems<DspinSignals<dspin_ram_rsp_width> >("signal_dspin_false_ram_rsp_in", XMAX, YMAX, 4);
+   DspinSignals<dspin_ram_rsp_width>*** signal_dspin_false_ram_rsp_out =
+      alloc_elems<DspinSignals<dspin_ram_rsp_width> >("signal_dspin_false_ram_rsp_out", XMAX, YMAX, 4);
 
    ////////////////////////////
@@ -1275 +1284 @@
       for (size_t k = 0; k < 3; k++)
       {
-         clusters[0][y]->p_dspin_int_cmd_in[WEST][k]          (signal_dspin_false_int_cmd_in);
-         clusters[0][y]->p_dspin_int_cmd_out[WEST][k]         (signal_dspin_false_int_cmd_out);
-         clusters[XMAX-1][y]->p_dspin_int_cmd_in[EAST][k]     (signal_dspin_false_int_cmd_in);
-         clusters[XMAX-1][y]->p_dspin_int_cmd_out[EAST][k]    (signal_dspin_false_int_cmd_out);
+         clusters[0][y]->p_dspin_int_cmd_in[WEST][k]          (signal_dspin_false_int_cmd_in[0][y][WEST][k]);
+         clusters[0][y]->p_dspin_int_cmd_out[WEST][k]         (signal_dspin_false_int_cmd_out[0][y][WEST][k]);
+         clusters[XMAX-1][y]->p_dspin_int_cmd_in[EAST][k]     (signal_dspin_false_int_cmd_in[XMAX-1][y][EAST][k]);
+         clusters[XMAX-1][y]->p_dspin_int_cmd_out[EAST][k]    (signal_dspin_false_int_cmd_out[XMAX-1][y][EAST][k]);
       }
 
       for (size_t k = 0; k < 2; k++)
       {
-         clusters[0][y]->p_dspin_int_rsp_in[WEST][k]          (signal_dspin_false_int_rsp_in);
-         clusters[0][y]->p_dspin_int_rsp_out[WEST][k]         (signal_dspin_false_int_rsp_out);
-         clusters[XMAX-1][y]->p_dspin_int_rsp_in[EAST][k]     (signal_dspin_false_int_rsp_in);
-         clusters[XMAX-1][y]->p_dspin_int_rsp_out[EAST][k]    (signal_dspin_false_int_rsp_out);
+         clusters[0][y]->p_dspin_int_rsp_in[WEST][k]          (signal_dspin_false_int_rsp_in[0][y][WEST][k]);
+         clusters[0][y]->p_dspin_int_rsp_out[WEST][k]         (signal_dspin_false_int_rsp_out[0][y][WEST][k]);
+         clusters[XMAX-1][y]->p_dspin_int_rsp_in[EAST][k]     (signal_dspin_false_int_rsp_in[XMAX-1][y][EAST][k]);
+         clusters[XMAX-1][y]->p_dspin_int_rsp_out[EAST][k]    (signal_dspin_false_int_rsp_out[XMAX-1][y][EAST][k]);
       }
 
-     clusters[0][y]->p_dspin_ram_cmd_in[WEST]       (signal_dspin_false_ram_cmd_in);
-     clusters[0][y]->p_dspin_ram_cmd_out[WEST]      (signal_dspin_false_ram_cmd_out);
-     clusters[0][y]->p_dspin_ram_rsp_in[WEST]       (signal_dspin_false_ram_rsp_in);
-     clusters[0][y]->p_dspin_ram_rsp_out[WEST]      (signal_dspin_false_ram_rsp_out);
-
-     clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST]  (signal_dspin_false_ram_cmd_in);
-     clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out);
-     clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST]  (signal_dspin_false_ram_rsp_in);
-     clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out);
+     clusters[0][y]->p_dspin_ram_cmd_in[WEST]       (signal_dspin_false_ram_cmd_in[0][y][WEST]);
+     clusters[0][y]->p_dspin_ram_cmd_out[WEST]      (signal_dspin_false_ram_cmd_out[0][y][WEST]);
+     clusters[0][y]->p_dspin_ram_rsp_in[WEST]       (signal_dspin_false_ram_rsp_in[0][y][WEST]);
+     clusters[0][y]->p_dspin_ram_rsp_out[WEST]      (signal_dspin_false_ram_rsp_out[0][y][WEST]);
+
+     clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST]  (signal_dspin_false_ram_cmd_in[XMAX-1][y][EAST]);
+     clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out[XMAX-1][y][EAST]);
+     clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST]  (signal_dspin_false_ram_rsp_in[XMAX-1][y][EAST]);
+     clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out[XMAX-1][y][EAST]);
    }
 
@@ -1307 +1316 @@
       for (size_t k = 0; k < 3; k++)
       {
-         clusters[x][0]->p_dspin_int_cmd_in[SOUTH][k]         (signal_dspin_false_int_cmd_in);
-         clusters[x][0]->p_dspin_int_cmd_out[SOUTH][k]        (signal_dspin_false_int_cmd_out);
-         clusters[x][YMAX-1]->p_dspin_int_cmd_in[NORTH][k]    (signal_dspin_false_int_cmd_in);
-         clusters[x][YMAX-1]->p_dspin_int_cmd_out[NORTH][k]   (signal_dspin_false_int_cmd_out);
+         clusters[x][0]->p_dspin_int_cmd_in[SOUTH][k]         (signal_dspin_false_int_cmd_in[x][0][SOUTH][k]);
+         clusters[x][0]->p_dspin_int_cmd_out[SOUTH][k]        (signal_dspin_false_int_cmd_out[x][0][SOUTH][k]);
+         clusters[x][YMAX-1]->p_dspin_int_cmd_in[NORTH][k]    (signal_dspin_false_int_cmd_in[x][YMAX-1][NORTH][k]);
+         clusters[x][YMAX-1]->p_dspin_int_cmd_out[NORTH][k]   (signal_dspin_false_int_cmd_out[x][YMAX-1][NORTH][k]);
       }
 
       for (size_t k = 0; k < 2; k++)
       {
-         clusters[x][0]->p_dspin_int_rsp_in[SOUTH][k]         (signal_dspin_false_int_rsp_in);
-         clusters[x][0]->p_dspin_int_rsp_out[SOUTH][k]        (signal_dspin_false_int_rsp_out);
-         clusters[x][YMAX-1]->p_dspin_int_rsp_in[NORTH][k]    (signal_dspin_false_int_rsp_in);
-         clusters[x][YMAX-1]->p_dspin_int_rsp_out[NORTH][k]   (signal_dspin_false_int_rsp_out);
+         clusters[x][0]->p_dspin_int_rsp_in[SOUTH][k]         (signal_dspin_false_int_rsp_in[x][0][SOUTH][k]);
+         clusters[x][0]->p_dspin_int_rsp_out[SOUTH][k]        (signal_dspin_false_int_rsp_out[x][0][SOUTH][k]);
+         clusters[x][YMAX-1]->p_dspin_int_rsp_in[NORTH][k]    (signal_dspin_false_int_rsp_in[x][YMAX-1][NORTH][k]);
+         clusters[x][YMAX-1]->p_dspin_int_rsp_out[NORTH][k]   (signal_dspin_false_int_rsp_out[x][YMAX-1][NORTH][k]);
       }
 
-      clusters[x][0]->p_dspin_ram_cmd_in[SOUTH]       (signal_dspin_false_ram_cmd_in);
-      clusters[x][0]->p_dspin_ram_cmd_out[SOUTH]      (signal_dspin_false_ram_cmd_out);
-      clusters[x][0]->p_dspin_ram_rsp_in[SOUTH]       (signal_dspin_false_ram_rsp_in);
-      clusters[x][0]->p_dspin_ram_rsp_out[SOUTH]      (signal_dspin_false_ram_rsp_out);
-
-      clusters[x][YMAX-1]->p_dspin_ram_cmd_in[NORTH]  (signal_dspin_false_ram_cmd_in);
-      clusters[x][YMAX-1]->p_dspin_ram_cmd_out[NORTH] (signal_dspin_false_ram_cmd_out);
-      clusters[x][YMAX-1]->p_dspin_ram_rsp_in[NORTH]  (signal_dspin_false_ram_rsp_in);
-      clusters[x][YMAX-1]->p_dspin_ram_rsp_out[NORTH] (signal_dspin_false_ram_rsp_out);
+      clusters[x][0]->p_dspin_ram_cmd_in[SOUTH]       (signal_dspin_false_ram_cmd_in[x][0][SOUTH]);
+      clusters[x][0]->p_dspin_ram_cmd_out[SOUTH]      (signal_dspin_false_ram_cmd_out[x][0][SOUTH]);
+      clusters[x][0]->p_dspin_ram_rsp_in[SOUTH]       (signal_dspin_false_ram_rsp_in[x][0][SOUTH]);
+      clusters[x][0]->p_dspin_ram_rsp_out[SOUTH]      (signal_dspin_false_ram_rsp_out[x][0][SOUTH]);
+
+      clusters[x][YMAX-1]->p_dspin_ram_cmd_in[NORTH]  (signal_dspin_false_ram_cmd_in[x][YMAX-1][NORTH]);
+      clusters[x][YMAX-1]->p_dspin_ram_cmd_out[NORTH] (signal_dspin_false_ram_cmd_out[x][YMAX-1][NORTH]);
+      clusters[x][YMAX-1]->p_dspin_ram_rsp_in[NORTH]  (signal_dspin_false_ram_rsp_in[x][YMAX-1][NORTH]);
+      clusters[x][YMAX-1]->p_dspin_ram_rsp_out[NORTH] (signal_dspin_false_ram_rsp_out[x][YMAX-1][NORTH]);
    }
 
@@ -1343 +1352 @@
    signal_irq_false = false;
 
-   signal_dspin_false_int_cmd_in.write = false;
-   signal_dspin_false_int_cmd_out.read = true;
-   signal_dspin_false_int_rsp_in.write = false;
-   signal_dspin_false_int_rsp_out.read = true;
-   signal_dspin_false_ram_cmd_in.write = false;
-   signal_dspin_false_ram_cmd_out.read = true;
-   signal_dspin_false_ram_rsp_in.write = false;
-   signal_dspin_false_ram_rsp_out.read = true;
+   // network boundaries signals
+   for (size_t x = 0; x < XMAX ; x++)
+   {
+      for (size_t y = 0; y < YMAX ; y++)
+      {
+         for (size_t a = 0; a < 4; a++)
+         {
+            for (size_t k = 0; k < 3; k++)
+            {
+               signal_dspin_false_int_cmd_in[x][y][a][k].write = false;
+               signal_dspin_false_int_cmd_in[x][y][a][k].read = true;
+               signal_dspin_false_int_cmd_out[x][y][a][k].write = false;
+               signal_dspin_false_int_cmd_out[x][y][a][k].read = true;
+            }
+
+            for (size_t k = 0; k < 2; k++)
+            {
+               signal_dspin_false_int_rsp_in[x][y][a][k].write = false;
+               signal_dspin_false_int_rsp_in[x][y][a][k].read = true;
+               signal_dspin_false_int_rsp_out[x][y][a][k].write = false;
+               signal_dspin_false_int_rsp_out[x][y][a][k].read = true;
+            }
+
+            signal_dspin_false_ram_cmd_in[x][y][a].write = false;
+            signal_dspin_false_ram_cmd_in[x][y][a].read = true;
+            signal_dspin_false_ram_cmd_out[x][y][a].write = false;
+            signal_dspin_false_ram_cmd_out[x][y][a].read = true;
+
+            signal_dspin_false_ram_rsp_in[x][y][a].write = false;
+            signal_dspin_false_ram_rsp_in[x][y][a].read = true;
+            signal_dspin_false_ram_rsp_out[x][y][a].write = false;
+            signal_dspin_false_ram_rsp_out[x][y][a].read = true;
+         }
+      }
+   }
 
    sc_start(sc_core::sc_time(1, SC_NS));