Changeset 881 for branches/reconfiguration/modules/vci_xicu/caba/source/include

Timestamp:

Nov 12, 2014, 5:09:17 PM (10 years ago)

Author:

cfuguet

Message:

reconf: introduce a configuration function in the vci_xicu

• This configuration function consists in a vector of writable registers (up to 32) which are directly connected to an output port (one port per register).

File:

• branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h (modified) (5 diffs)

branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h

@@ -2 +2 @@
  *
  * SOCLIB_LGPL_HEADER_BEGIN
- * 
+ *
  * This file is part of SoCLib, GNU LGPLv2.1.
- * 
+ *
  * SoCLib is free software; you can redistribute it and/or modify it
  * under the terms of the GNU Lesser General Public License as published
  * by the Free Software Foundation; version 2.1 of the License.
- * 
+ *
  * SoCLib is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * Lesser General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU Lesser General Public
  * License along with SoCLib; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  * 02110-1301 USA
- * 
+ *
  * SOCLIB_LGPL_HEADER_END
  *
@@ -39 +39 @@
 template<typename vci_param>
 class VciXicu
-        : public caba::BaseModule
+    : public caba::BaseModule
 {
 private:
@@ -49 +49 @@
     const size_t                                    m_wti_count;
     const size_t                                    m_irq_count;
+    const size_t                                    m_cfg_count;
 
     uint32_t*                                       r_msk_pti;
@@ -59 +60 @@
     uint32_t                                        *r_pti_val;
     uint32_t                                        *r_wti_reg;
+    uint32_t                                        *r_cfg_reg;
 
     uint32_t                                        m_clock_cycles;
 
 
-    bool on_write( int                        seg, 
-                   typename vci_param::addr_t addr, 
-                   typename vci_param::data_t data, 
+    bool on_write( int                        seg,
+                   typename vci_param::addr_t addr,
+                   typename vci_param::data_t data,
                    int                        be );
-    bool on_read(  int                        seg, 
-                   typename vci_param::addr_t addr, 
+    bool on_read(  int                        seg,
+                   typename vci_param::addr_t addr,
                    typename vci_param::data_t &data );
 
@@ -84 +86 @@
     sc_core::sc_out<bool>*                         p_irq;
     sc_core::sc_in<bool>*                          p_hwi;
+    sc_core::sc_out<uint32_t>*                     p_cfg;
 
     void print_trace( size_t channel );
 
-        ~VciXicu();
+    ~VciXicu();
 
-        VciXicu(
-                sc_core::sc_module_name name,
-                const soclib::common::MappingTable &mt,
-                const soclib::common::IntTab &index,
-        size_t pti_count,
-        size_t hwi_count,
-        size_t wti_count,
-        size_t irq_count);
+    VciXicu( sc_core::sc_module_name name,
+             const soclib::common::MappingTable &mt,
+             const soclib::common::IntTab &index,
+             size_t pti_count,
+             size_t hwi_count,
+             size_t wti_count,
+             size_t irq_count,
+             size_t cfg_count = 0 );
 
     soclib_static_assert(vci_param::B == 4);