Ignore:
Timestamp:
Nov 12, 2014, 5:09:17 PM (10 years ago)
Author:
cfuguet
Message:

reconf: introduce a configuration function in the vci_xicu

  • This configuration function consists in a vector of writable registers (up to 32) which are directly connected to an output port (one port per register).
File:
1 edited

Legend:

Unmodified
Added
Removed
  • branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h

    r880 r881  
    22 *
    33 * SOCLIB_LGPL_HEADER_BEGIN
    4  * 
     4 *
    55 * This file is part of SoCLib, GNU LGPLv2.1.
    6  * 
     6 *
    77 * SoCLib is free software; you can redistribute it and/or modify it
    88 * under the terms of the GNU Lesser General Public License as published
    99 * by the Free Software Foundation; version 2.1 of the License.
    10  * 
     10 *
    1111 * SoCLib is distributed in the hope that it will be useful, but
    1212 * WITHOUT ANY WARRANTY; without even the implied warranty of
    1313 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1414 * Lesser General Public License for more details.
    15  * 
     15 *
    1616 * You should have received a copy of the GNU Lesser General Public
    1717 * License along with SoCLib; if not, write to the Free Software
    1818 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    1919 * 02110-1301 USA
    20  * 
     20 *
    2121 * SOCLIB_LGPL_HEADER_END
    2222 *
     
    3939template<typename vci_param>
    4040class VciXicu
    41         : public caba::BaseModule
     41    : public caba::BaseModule
    4242{
    4343private:
     
    4949    const size_t                                    m_wti_count;
    5050    const size_t                                    m_irq_count;
     51    const size_t                                    m_cfg_count;
    5152
    5253    uint32_t*                                       r_msk_pti;
     
    5960    uint32_t                                        *r_pti_val;
    6061    uint32_t                                        *r_wti_reg;
     62    uint32_t                                        *r_cfg_reg;
    6163
    6264    uint32_t                                        m_clock_cycles;
    6365
    6466
    65     bool on_write( int                        seg, 
    66                    typename vci_param::addr_t addr, 
    67                    typename vci_param::data_t data, 
     67    bool on_write( int                        seg,
     68                   typename vci_param::addr_t addr,
     69                   typename vci_param::data_t data,
    6870                   int                        be );
    69     bool on_read(  int                        seg, 
    70                    typename vci_param::addr_t addr, 
     71    bool on_read(  int                        seg,
     72                   typename vci_param::addr_t addr,
    7173                   typename vci_param::data_t &data );
    7274
     
    8486    sc_core::sc_out<bool>*                         p_irq;
    8587    sc_core::sc_in<bool>*                          p_hwi;
     88    sc_core::sc_out<uint32_t>*                     p_cfg;
    8689
    8790    void print_trace( size_t channel );
    8891
    89         ~VciXicu();
     92    ~VciXicu();
    9093
    91         VciXicu(
    92                 sc_core::sc_module_name name,
    93                 const soclib::common::MappingTable &mt,
    94                 const soclib::common::IntTab &index,
    95         size_t pti_count,
    96         size_t hwi_count,
    97         size_t wti_count,
    98         size_t irq_count);
     94    VciXicu( sc_core::sc_module_name name,
     95             const soclib::common::MappingTable &mt,
     96             const soclib::common::IntTab &index,
     97             size_t pti_count,
     98             size_t hwi_count,
     99             size_t wti_count,
     100             size_t irq_count,
     101             size_t cfg_count = 0 );
    99102
    100103    soclib_static_assert(vci_param::B == 4);
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