Changeset 911 for trunk/softs/tsar_boot/drivers

Timestamp:

Jan 2, 2015, 1:03:52 PM (10 years ago)

Author:

alain

Message:

The reset_buf_invalidate() function has been modified
to comply with the removing of the hard lock in the vci_mem_cache configuration interface.

File:

• trunk/softs/tsar_boot/drivers/reset_inval.c (modified) (4 diffs)

trunk/softs/tsar_boot/drivers/reset_inval.c

@@ -17 +17 @@
 enum memc_registers
 {
-    MCC_LOCK      = 0,
-    MCC_ADDR_LO   = 1,
-    MCC_ADDR_HI   = 2,
-    MCC_LENGTH    = 3,
-    MCC_CMD       = 4
+    MCC_ADDR_LO   = 0,
+    MCC_ADDR_HI   = 1,
+    MCC_LENGTH    = 2,
+    MCC_CMD       = 3
 };
 
@@ -33 +32 @@
 /**
  * \brief Invalidate all data cache lines corresponding to a memory buffer
- *        (identified by an address and a size) in L2 cache.
- */
-void reset_mcc_invalidate (void* const buffer, size_t size)
-{
-    // get the hard lock assuring exclusive access to MEMC
-    while (ioread32(&mcc_address[MCC_LOCK]));
-
-    // write invalidate paremeters on the memory cache this preloader
-    // use only the cluster 0 and then the HI bits are not used
-
-    iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer);
-    iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0);
-    iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size);
-    iowrite32(&mcc_address[MCC_CMD]    , (unsigned int) MCC_CMD_INVAL);
-
-    // release the lock protecting MEMC
-    iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0);
-}
-
-/**
- * \brief Invalidate all data cache lines corresponding to a memory buffer
  *        (identified by an address and a size) in L1 cache and L2 cache.
  */
@@ -60 +38 @@
     unsigned int i;
 
-    /*
-     * iterate on cache lines containing target buffer to invalidate them
-     */
+    // iterate on L1 cache lines containing target buffer
     for (i = 0; i <= size; i += CACHE_LINE_SIZE)
     {
@@ -73 +49 @@
     }
 
-    if (inval_memc) reset_mcc_invalidate(buffer, size);
+    if (inval_memc)
+    {
+        // this preloader uses only the cluster 0
+        // It does not use the ADDR_HI bits, and does not take
+        // any lock for exclusive access to MCC 
+        iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer);
+        iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0);
+        iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size);
+        iowrite32(&mcc_address[MCC_CMD]    , (unsigned int) MCC_CMD_INVAL);
+    }
 }