Changeset 962 for trunk/softs/tsar_boot
- Timestamp:
- Apr 1, 2015, 3:42:03 PM (10 years ago)
- Location:
- trunk/softs/tsar_boot
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/softs/tsar_boot/Makefile
r866 r962 81 81 reset_bdv.c \ 82 82 reset_rdk.c \ 83 reset_hba.c \ 83 84 sdcard.c \ 84 85 spi.c -
trunk/softs/tsar_boot/conf/platform_de2_115_fpga/hard_config.h
r832 r962 31 31 32 32 #define USE_IOC_BDV 0 33 #define USE_IOC_S PI133 #define USE_IOC_SDC 1 34 34 #define USE_IOC_HBA 0 35 35 #define USE_IOC_RDK 0 -
trunk/softs/tsar_boot/drivers/reset_bdv.c
r758 r962 43 43 }; 44 44 45 //////////////////// 45 46 int reset_bdv_init() 46 47 { … … 48 49 } 49 50 50 int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ) 51 //////////////////////////////////// 52 int reset_bdv_read( unsigned int lba, 53 void* buffer, 54 unsigned int count ) 51 55 { 52 /* 53 * block_device configuration 54 */ 56 // block_device configuration 55 57 iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer ); 56 58 iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count ); … … 58 60 iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 ); 59 61 60 /* 61 * block_device trigger transfer 62 */ 62 // trigger transfer 63 63 iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int ) 64 64 BLOCK_DEVICE_READ ); 65 66 #if (RESET_HARD_CC == 0) || USE_IOB 67 // inval buffer in L1 cache 68 reset_L1_inval( buffer , count * 512 ); 69 #endif 70 71 #if USE_IOB 72 // inval buffer in L2 cache 73 reset_L2_inval( buffer , count * 512 ); 74 #endif 65 75 66 76 unsigned int status = 0; … … 72 82 break; 73 83 } 74 if ( status == BLOCK_DEVICE_READ_ERROR ) { 84 if ( status == BLOCK_DEVICE_READ_ERROR ) 85 { 75 86 reset_puts("ERROR during read on the BLK device\n"); 76 87 return 1; … … 78 89 } 79 90 80 #if (RESET_HARD_CC == 0) || USE_IOB81 reset_buf_invalidate(buffer, count * 512, USE_IOB);82 #endif83 91 return 0; 84 92 } -
trunk/softs/tsar_boot/drivers/reset_inval.c
r911 r962 2 2 * \file reset_inval.c 3 3 * \date December 14, 2014 4 * \author Cesar Fuguet 4 * \author Cesar Fuguet / Alain Greiner 5 5 */ 6 6 … … 13 13 #endif 14 14 15 static int* const m cc_address = (int* const)SEG_MMC_BASE;15 static int* const mmc_address = (int* const)SEG_MMC_BASE; 16 16 17 17 enum memc_registers … … 31 31 32 32 /** 33 * \brief Invalidate all datacache lines corresponding to a memory buffer34 * (identified by an address and a size) in L1 cache and L2 cache.33 * \brief Invalidate all L1 cache lines corresponding to a memory buffer 34 * (identified by an address and a size). 35 35 */ 36 void reset_ buf_invalidate (void* const buffer, size_t size, int inval_memc)36 void reset_L1_inval( void* const buffer, size_t size ) 37 37 { 38 38 unsigned int i; … … 45 45 : /* no outputs */ 46 46 : "i" (0x11), "R" (*((char*)buffer + i)) 47 : "memory" 48 ); 47 : "memory" ); 49 48 } 49 } 50 50 51 if (inval_memc) 52 { 53 // this preloader uses only the cluster 0 54 // It does not use the ADDR_HI bits, and does not take 55 // any lock for exclusive access to MCC 56 iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer); 57 iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0); 58 iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size); 59 iowrite32(&mcc_address[MCC_CMD] , (unsigned int) MCC_CMD_INVAL); 60 } 51 /** 52 * \brief Invalidate all L2 cache lines corresponding to a memory buffer 53 * (identified by an address and a size). 54 */ 55 void reset_L2_inval( void* const buffer, size_t size ) 56 { 57 iowrite32( &mmc_address[MCC_ADDR_LO], (unsigned int)buffer ); 58 iowrite32( &mmc_address[MCC_ADDR_HI], 0 ); 59 iowrite32( &mmc_address[MCC_LENGTH] , size ); 60 iowrite32( &mmc_address[MCC_CMD] , MCC_CMD_INVAL); 61 } 62 63 /** 64 * \brief Update external RAM for all L2 cache lines corresponding to 65 * a memory buffer (identified by an address and a size). 66 */ 67 void reset_L2_sync ( void* const buffer, size_t size ) 68 { 69 iowrite32( &mmc_address[MCC_ADDR_LO], (unsigned int)buffer ); 70 iowrite32( &mmc_address[MCC_ADDR_HI], 0 ); 71 iowrite32( &mmc_address[MCC_LENGTH] , size ); 72 iowrite32( &mmc_address[MCC_CMD] , MCC_CMD_SYNC ); 61 73 } 62 74 -
trunk/softs/tsar_boot/drivers/reset_inval.h
r758 r962 10 10 #include <inttypes.h> 11 11 12 void reset_ mcc_invalidate(void* const buffer, size_t size);12 void reset_L1_inval (void* const buffer, size_t size); 13 13 14 void reset_buf_invalidate (void* const buffer, size_t size, int inval_memc); 14 void reset_L2_inval (void* const buffer, size_t size); 15 16 void reset_L2_sync (void* const buffer, size_t size); 15 17 16 18 #endif -
trunk/softs/tsar_boot/include/reset_ioc.h
r758 r962 7 7 * 8 8 * \note These functions call the specific disk controller driver depending 9 * on the USE_IOC_BDV, USE_IOC_S PI or USE_RAMDISK constants9 * on the USE_IOC_BDV, USE_IOC_SDC or USE_IOC_HBA USE_IOC_RDK flags 10 10 */ 11 11 #ifndef RESET_IOC_H -
trunk/softs/tsar_boot/include/reset_utils.h
r758 r962 54 54 void check_elf_header(Elf32_Ehdr *ehdr); 55 55 void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr); 56 void reset_display_block( char* buffer ); 56 57 57 58 #endif /* RESET_UTILS_H */ -
trunk/softs/tsar_boot/src/reset_elf_loader.c
r949 r962 43 43 goto error; 44 44 } 45 46 #if (RESET_DEBUG == 1) 47 reset_display_block( (char*)&elf_header ); 48 #endif 49 45 50 check_elf_header(&elf_header); 46 51 -
trunk/softs/tsar_boot/src/reset_ioc.c
r796 r962 7 7 * 8 8 * \note These functions call the specific disk controller driver depending 9 * on the USE_IOC_BDV, USE_IOC_S PIor USE_IOC_RDK constants9 * on the USE_IOC_BDV, USE_IOC_SDC or USE_IOC_RDK constants 10 10 */ 11 11 … … 13 13 #include <defs.h> 14 14 15 #if !defined(USE_IOC_BDV) && !defined(USE_IOC_SPI) && !defined(USE_IOC_RDK)16 # error " One of the USE_IOC_* constants must be defined in thehard_config.h"15 #if (USE_IOC_BDV + USE_IOC_SDC + USE_IOC_RDK + USE_IOC_HBA) != 1 16 # error "in reset_ioc.c : undefined disk controller in hard_config.h" 17 17 #endif 18 18 19 #if (USE_IOC_BDV + USE_IOC_SPI + USE_IOC_RDK) != 1 20 # error "Only one disk controller must be used" 21 #endif 22 23 #if USE_IOC_SPI 19 #if USE_IOC_SDC 24 20 #include <reset_sdc.h> 25 21 #endif … … 33 29 #endif 34 30 31 #if USE_IOC_HBA 32 #include <reset_hba.h> 33 #endif 34 35 35 36 /** 36 37 * \brief Initialize the disk controller … … 40 41 #if USE_IOC_BDV 41 42 return reset_bdv_init(); 42 #elif USE_IOC_S PI43 #elif USE_IOC_SDC 43 44 return reset_sdc_init(); 44 45 #elif USE_IOC_RDK 45 46 return reset_rdk_init(); 47 #elif USE_IOC_HBA 48 return reset_hba_init(); 46 49 #else 47 # error " reset_ioc_init() : Not supported disk controller chosen"50 # error "in reset_ioc_init.c : undefined disk controller in hard_config.h" 48 51 #endif 49 52 } … … 63 66 #if USE_IOC_BDV 64 67 return reset_bdv_read(lba, buffer, count); 65 #elif USE_IOC_S PI68 #elif USE_IOC_SDC 66 69 return reset_sdc_read(lba, buffer, count); 67 70 #elif USE_IOC_RDK 68 71 return reset_rdk_read(lba, buffer, count); 72 #elif USE_IOC_HBA 73 return reset_hba_read(lba, buffer, count); 69 74 #else 70 # error " reset_ioc_read() : Not supported disk controller chosen"75 # error "in reset_ioc_read.c : undefined disk controller in hard_config.h" 71 76 #endif 72 77 } -
trunk/softs/tsar_boot/src/reset_utils.c
r930 r962 178 178 (ehdr->e_ident[EI_MAG3] != ELFMAG3)) 179 179 { 180 reset_puts(" [RESET ERROR] Unrecognized file format (not an ELF format)\n");180 reset_puts("\n[RESET ERROR] Unrecognized file format (not an ELF format)\n"); 181 181 reset_exit(); 182 182 } … … 220 220 } 221 221 222 /** 223 * \param buffer : Pointer to the char buffer 224 * 225 * \brief Print a 512 bytes buffer 226 */ 227 #if (RESET_DEBUG == 1 ) 228 void reset_display_block( char* buffer ) 229 { 230 unsigned int line; 231 unsigned int word; 232 233 reset_puts("***********************************************************************\n"); 234 for ( line = 0 ; line < 32 ; line++ ) 235 { 236 // display line index 237 reset_putx( line ); 238 reset_puts(" : "); 239 240 // display 8*4 bytes hexa 241 for ( word=0 ; word<4 ; word++ ) 242 { 243 unsigned int byte = (line<<5) + (word<<2); 244 unsigned int hexa = (buffer[byte ]<<24) | 245 (buffer[byte+1]<<16) | 246 (buffer[byte+2]<< 8) | 247 (buffer[byte+3]); 248 reset_putx( hexa ); 249 reset_puts(" | "); 250 } 251 reset_puts("\n"); 252 } 253 reset_puts("***********************************************************************\n"); 254 } 255 #endif 256 222 257 /* 223 258 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
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