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Diff Rev Age Author Log Message
(edit) @334   11 years joannou Separated stat counters resets from internal registers resets
(edit) @333   11 years joannou - In vci_cc_vcache_wrapper_dspin_coherence : initializing …
(edit) @332   11 years joannou Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
(edit) @331   11 years joannou Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
(edit) @330   11 years joannou * Commented debug in dspin_local_ring_fast_c * Added test on plen …
(edit) @329   11 years joannou Added test on INST/DATA for the CLACK in the …
(edit) @328   11 years cfuguet Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the …
(edit) @327   11 years simerabe introducing topcell examples using dspin ring interconnect
(edit) @326   11 years simerabe introducing 2 new components : simple and local ring interconnect …
(edit) @325   11 years joannou bugfix in vci_cc_vcache_wrapper_dspin_coherence : - consume fifo in …
(edit) @324   11 years joannou updated the test_interrupt_delayslot : now testing for several delay values
(edit) @323   11 years joannou removed unusefull flipflop r_*cache_cc_fifo_done + syntax correction …
(edit) @322   11 years cfuguet Erasing binary generated files in tests_ccvcache_v4/test_sync from the repo
(edit) @321   11 years joannou bugfix in vci_cc_vcache_wrapper_dspin_coherence in coherence type checking
(edit) @320   11 years cfuguet vci_mem_cache_dspin_coherence: - Fixing typo error in …
(edit) @319   11 years cfuguet Fix bug in vci_mem_cache_dspin_coherence. The write signal in the …
(edit) @318   11 years joannou vci_cc_vcache_wrapper_dspin_coherence now use DspinDhccpParam::* types …
(edit) @317   11 years cfuguet Introducing missing debug strings in the vci_mem_cache cpp file
(edit) @316   11 years joannou Introducing new tsar_mono_mmu_dspin_coherence platform Same as …
(edit) @315   11 years joannou Introducing new dspin interface for …
(edit) @314   11 years cfuguet Erasing old comments in the reset.s file of the pre-loader
(edit) @313   11 years cfuguet Erasing useless template parameters for the …
(edit) @312   11 years cfuguet Updating width of the way index in DSPIN coherence flits. Using 2 bits …
(edit) @311   11 years cfuguet Including GET and SET methods for the FROM_L1_BC and FROM_MC_BC bit in …
(edit) @310   11 years cfuguet Introducing FROM_L1_BC and FROM_MC_BC in dspin param class to access …
(edit) @309   11 years joannou Bugfix : typo in component name (was 'dhcpp', is now 'dhccp')
(edit) @308   11 years cfuguet Fixing parameter name error in metadata of vci_mem_cache
(edit) @307   11 years cfuguet Including vci_mem_cache v5 using dspin interface for the coherence …
(edit) @306   11 years joannou Added tsar_mono_mmu and tsar_generic_mmu platforms
(edit) @305   11 years joannou In vci_mem_cache component: Adding an assert for cleanup commands …
(edit) @304   11 years joannou Bug fixing in vci_cc_vcache_wrapper component : - In TGT_RSP_DCACHE, …
(edit) @303   11 years joannou Bug fix in generic_cache_tsar component : In the read_select function, …
(edit) @302   11 years cfuguet Introducing IRQ_PER_PROC constant in the tsar boot loader …
(edit) @301   11 years joannou bugfix in vci_block_device_tsar_v4 : the component used a vci …
(edit) @300   11 years joannou Moved tsar modules vci_cc_vcache_wrapper and vci_mem_cache under the …
(edit) @299   11 years alain bug fixing: coherence interrupt must be taken in the MISS_DIR_UPDT states.
(edit) @298   11 years alain Bug fixing in the NIC constructor
(edit) @297   11 years alain Introducing the 3 states (EMPTY,VALID,ZOMBI) states in cache directory
(edit) @296   11 years alain introducing major modifications in vci_cc_vcache_wrappers - remove …
(edit) @295   11 years cfuguet Introducing branches/v5/ components directory. This branch will be …
(edit) @294   11 years cfuguet Creating branch repertory for the TSAR svn repository. Copying the …
(edit) @293   11 years cfuguet Including Makefile for tsar boot loader
(edit) @292   11 years cfuguet Changing directory structure of the TSAR boot loader. A README.txt …
(edit) @291   11 years joannou Introducing new generic_llsc_local_table and generic_llsc_global_table …
(edit) @290   11 years cfuguet Erasing in the vci_mem_cache_v4 CLEANUP FSM the transition between the …
(edit) @289   11 years cfuguet Introducing cache data ram with bit masking in the Memory Cache. The …
(edit) @288   11 years joannou Bug fix in vci_cc_vcache_wrapper_v4 : unwanted reset of the …
(edit) @287   11 years joannou Updated vci_vdspin_initiator_wrapper and vci_vdspin_target_wrapper to …
(edit) @286   11 years cfuguet Fixing bug in boot_tty.c: Use address of tty status when reading with …
(edit) @285   11 years alain Fixing a bug identified by Hao: there was a dead-lock condition if: - …
(edit) @284   11 years joannou Updated of the vci trdid/rtrdid and pktid/rpktid fields for the direct …
(edit) @283   11 years joannou Changed default value to 0 for the L1_MULTI_CACHE define Fixed some …
(edit) @282   11 years bouyer Complete r281: Keep BEV bit set in STATUS register, and add an …
(edit) @281   11 years bouyer Keep BEV bit set in STATUS register, and add an exception handler at …
(edit) @280   11 years bouyer Remove unused base_addresses
(edit) @279   11 years cfuguet Introducing multi block read in the ioc_read function for the FPGA platform
(edit) @278   11 years bouyer The ring is cpu-ungry, so give one thread per ring when running under …
(edit) @277   11 years cfuguet Fixing bug in the alloc dir FSM. The READ FSM release the lock on the …
(edit) @276   11 years bouyer A boot loader to be stored in ROM of a TSAR platform. Based on Cesar …
(edit) @275   11 years bouyer This VHDL implementation uses rings, use rings here too.
(edit) @274   11 years bouyer Add a platform describing as closely as possible the hardware that is …
(edit) @273   11 years cfuguet Modificating the VCI Memory Cache to align the VHDL and the SOCLIB …
(edit) @272   11 years bouyer Fix writes: - properly compute r_buf_address, + has highter priority …
(edit) @271   11 years bouyer Remove useless file.
(edit) @270   11 years haoliu fix bug for test_sync
(edit) @269   11 years haoliu fix bug for test_sync
(edit) @268   11 years bouyer Dummy commit to test post-commit hook
(edit) @267   11 years bouyer Forced commit to test post-commit-hook
(edit) @266   11 years bouyer Sync with reality
(edit) @265   11 years bouyer Update/add 2 new tests, from tests_mips32_vcache: test_llsc: check …
(edit) @264   11 years bouyer We have big servers, so use some parallelism here
(edit) @263   11 years alain Introducing a network controller (vci_multi_nic) in the I0 cluster.
(edit) @262   11 years alain Bug fixing: The handling of L/R bit update has been modified in DCACHE …
(edit) @261   12 years alain The tsarv4_generic_mmu platform has been modified to use the …
(edit) @260   12 years alain The vci_block_device_tsar_v4 component has been modified to support …
(edit) @259   12 years almaless Introduce ALMOS used platforms for TSAR. See the package's README …
(edit) @258   12 years almaless Introduce a vci profiler for TSAR direct network
(edit) @257   12 years almaless - Adding two arguments: BLKSZ (sector size) and THREADS (OpenMP …
(edit) @256   12 years almaless Increase the set of allowed sector sizes until small-page size
(edit) @255   12 years alain Two modifications in the "tsarv4_generic_mmu" platform: 1) improving …
(edit) @254   12 years alain Two modifications: 1/ fixing a bug in the DCACHE_CC_INVAL state, …
(edit) @253   12 years meunier Added the display of the name of the component in the vci_cc_vcache_v4 …
(edit) @252   12 years meunier Minor changes on the soft_filter. This version works on tsar …
(edit) @251   12 years cfuguet Add the r_tgt_dcache_rsp and r_tgt_icache_rsp in the condition to go …
(edit) @250   12 years alain Removing parasitic constructor message.
(edit) @249   12 years meunier Formatting of topcell and cluster files
(edit) @248   12 years meunier Updates in the soft_filter application (bug corrections, formatting, …
(edit) @247   12 years cfuguet Introducing new CLEANUP transaction address specification in the …
(edit) @246   12 years cfuguet Bug fix in IXR_RSP FSM. Erroneous condition for the error verification
(edit) @245   12 years alain ntroducing a segmentation violation checking
(edit) @244   12 years meunier soft_transpose update to match platform changes
(edit) @243   12 years fraga Adding platform using vci_io_bridge
(edit) @242   12 years fraga Reparing erroneous commit
(edit) @241   12 years fraga Adding platform using vci_io_bridge
(edit) @240   12 years fraga Adding component vci_io_bridge
(edit) @239   12 years cfuguet Bug fix: When there is a pending write in the stage 1 of the write …
(edit) @238   12 years fraga Changing ICACHE TLB MISS requests priority in DCACHE_IDLE. Now, the …
(edit) @237   12 years haoliu fix bug in state DCACHE_TLB_GET_PTE1_UPDT and DCACHE_TLB_GET_PTE2_UPDT
(edit) @236   12 years haoliu fix bug in state ICACHE_XTN_CACHE_INVAL_VA*
(edit) @235   12 years haoliu BUG FIX: In the ICACHE FSM, state ICACHE_XTN_CACHE_FLUSH
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