source: trunk/modules

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Diff Rev Age Author Log Message
(edit) @123   14 years choichil Synthetic Initiator with parallel transactions
(edit) @122   14 years choichil Synthetic Initiator before being change for multiple requests
(edit) @120   14 years gao Separated cleanup from the vci_fsm to avoid deadlock
(edit) @119   14 years gao Modification for synthetisable reason
(edit) @118   14 years alain update print_trace() prototype
(edit) @116   14 years alain Introducing a print_trace() method
(edit) @115   14 years choichil Adding deterministic for debug
(edit) @114   14 years alain Improving the print_trace() display.
(edit) @113   14 years alain Improving the print_trace() function
(edit) @111   14 years choichil Puisque c'est comme ça, je commite mon truc…
(edit) @110   14 years guthmull Fix an issue with systemcass 64 bits conversions.
(edit) @109   14 years guthmull Don't check rsp length in case of error. Check that the processor …
(edit) @108   14 years gao Bug correction
(edit) @106   14 years choichil Vci_Synthetic_Initiator correction of some bugs... some may still exist
(edit) @104   14 years gao Verify broadcast address using mask
(edit) @102   14 years choichil Synthetic initiator that compiles
(edit) @101   14 years gao Delete the evaluation codes for speedup simulation
(edit) @98   14 years choichil Correcting file names of vci_synthetic_initiator
(edit) @96   14 years gao Redo ins TLB access bit update when it miss in dcache
(edit) @91   14 years alain polishing
(edit) @90   14 years alain Introducing a print_trace() method for debug.
(edit) @88   14 years gao Correction of itlb access bit set and dtlb dirty bit set
(edit) @85   14 years simerabe removing duplicate ring_signals_2
(edit) @84   14 years bouyer ICACHE_SW_FLUSH/ICACHE_CACHE_FLUSH: when walking the tlb/cache looking …
(edit) @83   14 years guthmull Fix the masking of RERROR field
(edit) @82   14 years guthmull Add broadcast limitation compatibility, indicate the type of response …
(edit) @81   14 years choichil vci_synthetic_initiator draft
(edit) @80   14 years gao Modified the coherence check for TLB entry updating
(edit) @79   14 years gao Correction of dirty bit and access bit in data cache
(edit) @78   14 years choichil Modification of the vci_synthetic_initiator draft
(edit) @77   14 years choichil Rename of vci_traffic_generator to vci_synthetic_initiator
(edit) @76   14 years choichil Metadata file…
(edit) @75   14 years choichil Rearranging hierarchy
(edit) @74   14 years choichil Adding files hierarchy of vci_traffic_generator
(edit) @73   14 years bouyer Fix several issues regarding management of the …
(edit) @72   14 years bouyer 2 fixes: - do not test r_dcache_in_[id]tlb[] just after setting the …
(edit) @71   14 years bouyer When updating PTE bits, don't write back to the dcache locally, the …
(edit) @70   14 years bouyer Check/update the dirty bit on SC too
(edit) @69   14 years bouyer Fix cut'n'paste error
(edit) @68   14 years bouyer A SC cause the dcache entry to be updated by the memcache, and the tlb …
(edit) @65   14 years nipo Use proper namespaces
(edit) @64   14 years nipo Use proper namespaces
(edit) @62   14 years gao Debug infos deleted
(edit) @61   14 years gao Active caches
(edit) @60   14 years gao bug correction
(edit) @59   15 years alain modifying the chek in the constructor to accept up to 4096 sets.
(edit) @58   15 years guthmull Fix partial instruction updates
(edit) @57   15 years guthmull Fix a bug with uncached reads, add more debug capabilities
(edit) @56   15 years guthmull SC don't generate invalidations and cleanup any more, add treatment of …
(edit) @55   15 years guthmull Fix a bug in SC, add start cycle debug
(edit) @54   15 years bouyer Remove debug output
(edit) @53   15 years gao debug
(edit) @52   15 years bouyer Make it build with systemcass.
(edit) @51   15 years gao Activity counter update
(edit) @50   15 years gao Activity counter update
(edit) @49   15 years gao Activity counter update
(edit) @48   15 years gao Activity counter update
(edit) @47   15 years alain
(edit) @45   15 years alain Introducing an improved memory consistency in the multi-write-buffer: …
(edit) @41   15 years gao Special for cc_vcache and cc_vcache_multi
(edit) @40   15 years gao cc_vcache_multi added
(edit) @39   15 years gao old file delete
(edit) @38   15 years gao cc_vcache added
(edit) @37   15 years gao Bug correction
(edit) @35   15 years simerabe fixing bug : multi-inclusion control
(edit) @33   15 years simerabe fixing bug : case of non initiator or non target
(edit) @32   15 years guthmull Add SC randomization to V1
(edit) @31   15 years guthmull Fix an issue in the select function
(edit) @29   15 years nipo Fix metadata
(edit) @26   15 years guthmull Update metadata
(edit) @20   15 years nipo Update DSX metadata
(edit) @19   15 years guthmull Fix uninitialized variable
(edit) @18   15 years gao Bug correction
(edit) @17   15 years simerabe updating lib components
(edit) @14   15 years simerabe fixing bug related to broadcast
(edit) @13   15 years bouyer Fix build with systemcass (add .read() on register access)
(edit) @12   15 years gao bug correction
(edit) @11   15 years simerabe adding trace for debugging
(edit) @8   15 years simerabe new ring components for systemcass
(edit) @7   15 years guthmull Fix same deadlock issue as in V4
(edit) @6   15 years guthmull Fix the deadlock also for SC requests
(edit) @5   15 years guthmull Fix a deadlock issue on the coherency network
(edit) @4   15 years nipo Forgot the vci_cc_vcache_wrapper2_multi
(edit) @2   15 years nipo Import TSAR modules in TSAR's own svn
(add) @1   15 years nipo Create a directory for tsar modules
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