Timeline
Dec 19, 2013:
- 9:41 AM Changeset [608] by
- cosmetic
- 9:39 AM Changeset [607] by
- Introducing support for cluster index fixed format.
- 9:26 AM Changeset [606] by
- Supporting fixed format for cluster index in reset.S.
Dec 18, 2013:
- 4:06 PM WikiStart edited by
- Introducing link on main page to Memory Cache Configuration Interface … (diff)
- 3:12 PM private/MemoryCacheConfiguration edited by
- (diff)
- 3:10 PM private/MemoryCacheConfiguration created by
- Introducing new wiki page for documentation of memory cache …
- 11:33 AM Changeset [605] by
- Modification in vci_mem_cache: - The rerror_irq_enable register is …
Dec 17, 2013:
- 3:21 PM Changeset [604] by
- Merge with the latest trunk (concurrent access to a register …
- 2:31 PM Changeset [603] by
- Cosmetic: improving comments in CONFIG FSM
- 1:45 PM Changeset [602] by
- Adding IRQ from memory cache for error signalization. In the …
- 11:11 AM Changeset [601] by
- Modifications in vci_mem_cache: - The out of segment read or write …
Dec 14, 2013:
- 8:47 PM Changeset [600] by
- - Modification in tsar_xbar_cluster.cpp Incrementing the number of …
Dec 11, 2013:
- 6:08 PM Changeset [599] by
- Improvement in vci_mem_cache component: - No need to pass x_self …
- 4:54 PM Changeset [598] by
- Modifying tsar_mono_mmu platform to add new vci_mem_cache global …
- 4:50 PM Changeset [597] by
- Modifications in vci_mem_cache: - Bugfix in req_distance function …
- 12:13 PM Changeset [596] by
- Modification in vci_mem_cache: - The instrumentation registers are …
Dec 9, 2013:
- 6:51 PM Changeset [595] by
- Sync with VHDL, make IRQ work for DMA.
Dec 5, 2013:
- 7:39 PM Changeset [594] by
- In VHDL, as r_dma_count is shared between 2 FSMs we can't update it in …
- 5:44 PM Changeset [593] by
- Really use DMA only if IOC_USE_DMA is defined
- 5:15 PM Changeset [592] by
- - report DMA errors - minor changes to sync with the VHDL model
- 4:47 PM Changeset [591] by
- When the file size of an program segment is smaller than its mem size, …
- 4:40 PM Changeset [590] by
- Use the SPI controller's DMA if the defs_platform.h defines IOC_USE_DMA.
- 4:38 PM Changeset [589] by
- Sync with reality (the frame buffer has not used sdram for a long time)
- 3:55 PM Changeset [588] by
- Rename IOC_BASE to IOC_PADDR_BASE for consistency
- 3:55 PM Changeset [587] by
- Add back version string print
Dec 4, 2013:
- 7:59 PM Changeset [586] by
- Modify the name "boot" to "reset" to avoid confusion between the …
- 7:51 PM Changeset [585] by
- debug…
- 7:49 PM Changeset [584] by
- cosmetic.
Dec 3, 2013:
- 10:29 PM Changeset [583] by
- cosmetic…
- 10:28 PM Changeset [582] by
- Bug fix in config FSM : concurrent access to r_config_rsplines counter…
- 5:10 PM Changeset [581] by
- Bug fix in the M_WRITE_BLOCK state, detected by C.Devigne.
Nov 23, 2013:
- 6:19 PM Changeset [580] by
- Fixing a bug in target FSM when using 64 bits data width.
- 1:25 AM Changeset [579] by
- Add some basic DMA capabilities. Passes basic read/write tests. Can …
Nov 22, 2013:
- 3:01 PM Changeset [578] by
- Fixing a bug in the dspin_router_tsar component (in the modified …
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