Timeline
Mar 28, 2013:
- 7:30 PM Changeset [342] by
- Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
- 7:08 PM Changeset [341] by
- In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
- 6:25 PM Changeset [340] by
- Erasing always false condition in the if statement of the …
- 6:23 PM Changeset [339] by
- Erasing always false condition in the if statement of the …
- 2:12 PM Changeset [338] by
- * In vci_cc_vcache_wrapper_dspin_coherence, modified both states …
- 1:50 PM Changeset [337] by
- In generic_cache_tsar, added new read function that returns 2 32bits …
Mar 27, 2013:
- 2:25 PM Changeset [336] by
- Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components (and …
Mar 26, 2013:
- 11:15 AM Changeset [335] by
- Added llsc table initialization in both vci_mem_cache and …
- 11:12 AM Changeset [334] by
- Separated stat counters resets from internal registers resets
Mar 23, 2013:
Mar 22, 2013:
- 5:40 PM Changeset [333] by
- - In vci_cc_vcache_wrapper_dspin_coherence : initializing …
Mar 21, 2013:
- 4:21 PM Changeset [332] by
- Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
- 4:06 PM Changeset [331] by
- Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
Mar 20, 2013:
- 10:55 AM Changeset [330] by
- * Commented debug in dspin_local_ring_fast_c * Added test on plen …
Mar 19, 2013:
- 2:18 PM InterconnexionNetworks edited by
- updated table for types encoding from L2 to L1 (diff)
- 2:06 PM InterconnexionNetworks edited by
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- 2:04 PM InterconnexionNetworks edited by
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- 1:27 PM InterconnexionNetworks edited by
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- 1:11 PM InterconnexionNetworks edited by
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- 1:06 PM InterconnexionNetworks edited by
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- 1:01 PM InterconnexionNetworks edited by
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- 12:57 PM InterconnexionNetworks edited by
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- 12:55 PM InterconnexionNetworks edited by
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- 12:53 PM InterconnexionNetworks edited by
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- 10:56 AM WikiStart edited by
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- 10:51 AM InterconnexionNetworks edited by
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Mar 18, 2013:
- 4:48 PM InterconnexionNetworks edited by
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- 4:33 PM InterconnexionNetworks edited by
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- 4:15 PM InterconnexionNetworks edited by
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- 3:54 PM Changeset [329] by
- Added test on INST/DATA for the CLACK in the …
- 3:51 PM InterconnexionNetworks edited by
- (diff)
- 3:45 PM Changeset [328] by
- Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the …
Mar 15, 2013:
- 2:26 PM WikiStart edited by
- Adding a Keywords section (diff)
Mar 14, 2013:
- 9:25 PM Changeset [327] by
- introducing topcell examples using dspin ring interconnect
- 9:13 PM Changeset [326] by
- introducing 2 new components : simple and local ring interconnect …
- 4:14 PM Changeset [325] by
- bugfix in vci_cc_vcache_wrapper_dspin_coherence : - consume fifo in …
- 2:41 PM Changeset [324] by
- updated the test_interrupt_delayslot : now testing for several delay values
- 10:59 AM Changeset [323] by
- removed unusefull flipflop r_*cache_cc_fifo_done + syntax correction …
- 9:52 AM Changeset [322] by
- Erasing binary generated files in tests_ccvcache_v4/test_sync from the repo
Mar 13, 2013:
- 6:17 PM Changeset [321] by
- bugfix in vci_cc_vcache_wrapper_dspin_coherence in coherence type checking
- 5:33 PM Changeset [320] by
- vci_mem_cache_dspin_coherence: - Fixing typo error in …
- 3:38 PM Changeset [319] by
- Fix bug in vci_mem_cache_dspin_coherence. The write signal in the …
- 3:12 PM Changeset [318] by
- vci_cc_vcache_wrapper_dspin_coherence now use DspinDhccpParam::* types …
- 2:53 PM Changeset [317] by
- Introducing missing debug strings in the vci_mem_cache cpp file
- 11:00 AM Changeset [316] by
- Introducing new tsar_mono_mmu_dspin_coherence platform Same as …
- 10:43 AM Changeset [315] by
- Introducing new dspin interface for …
Mar 12, 2013:
- 4:41 PM Changeset [314] by
- Erasing old comments in the reset.s file of the pre-loader
- 3:20 PM Changeset [313] by
- Erasing useless template parameters for the …
Mar 9, 2013:
- 1:03 AM Changeset [312] by
- Updating width of the way index in DSPIN coherence flits. Using 2 bits …
- 12:24 AM Changeset [311] by
- Including GET and SET methods for the FROM_L1_BC and FROM_MC_BC bit in …
Mar 8, 2013:
- 3:08 PM Changeset [310] by
- Introducing FROM_L1_BC and FROM_MC_BC in dspin param class to access …
Mar 6, 2013:
- 4:14 PM Changeset [309] by
- Bugfix : typo in component name (was 'dhcpp', is now 'dhccp')
- 3:12 PM Changeset [308] by
- Fixing parameter name error in metadata of vci_mem_cache
- 2:45 PM Changeset [307] by
- Including vci_mem_cache v5 using dspin interface for the coherence …
Feb 26, 2013:
- 6:28 PM Changeset [306] by
- Added tsar_mono_mmu and tsar_generic_mmu platforms
- 4:35 PM Changeset [305] by
- In vci_mem_cache component: Adding an assert for cleanup commands …
- 4:32 PM Changeset [304] by
- Bug fixing in vci_cc_vcache_wrapper component : - In TGT_RSP_DCACHE, …
- 4:19 PM Changeset [303] by
- Bug fix in generic_cache_tsar component : In the read_select function, …
- 9:19 AM Changeset [302] by
- Introducing IRQ_PER_PROC constant in the tsar boot loader …
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