[11] | 1 | # vis release 1.4 (compiled 20-Jun-02 at 7:12 PM) |
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| 2 | # network name: unnamed |
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| 3 | # generated: Tue Jul 2 10:55:31 2002 |
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| 4 | # |
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| 5 | # name type mddId vals levs |
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| 6 | TESTMODE primary-input 17 2 (0) |
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| 7 | oLDALUout$NS shadow 1 2 (1) |
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| 8 | oLDALUout latch 0 2 (2) |
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| 9 | qLDALUout latch 90 2 (3) |
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| 10 | qLDALUout$NS shadow 91 2 (4) |
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| 11 | qShiftRight latch 64 2 (5) |
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| 12 | qShiftRight$NS shadow 65 2 (6) |
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| 13 | I681 latch 9 2 (7) |
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| 14 | I681$NS shadow 10 2 (8) |
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| 15 | I680 latch 3 2 (9) |
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| 16 | I680$NS shadow 4 2 (10) |
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| 17 | I679$NS shadow 8 2 (11) |
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| 18 | I679 latch 7 2 (12) |
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| 19 | qPass1$NS shadow 27 2 (13) |
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| 20 | qPass1 latch 26 2 (14) |
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| 21 | I683$NS shadow 15 2 (15) |
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| 22 | I683 latch 14 2 (16) |
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| 23 | INS_2 primary-input 21 2 (17) |
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| 24 | qINSo_2$NS shadow 61 2 (18) |
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| 25 | qINSo_2 latch 60 2 (19) |
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| 26 | INS_1 primary-input 16 2 (20) |
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| 27 | qINSo_1$NS shadow 19 2 (21) |
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| 28 | qINSo_1 latch 18 2 (22) |
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| 29 | qINSo_0 latch 62 2 (23) |
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| 30 | qINSo_0$NS shadow 63 2 (24) |
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| 31 | INS_0 primary-input 20 2 (25) |
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| 32 | qPass2 latch 22 2 (26) |
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| 33 | qPass2$NS shadow 23 2 (27) |
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| 34 | I682 latch 5 2 (28) |
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| 35 | I682$NS shadow 6 2 (29) |
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| 36 | MQ_q_0 latch 11 2 (30) |
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| 37 | MQ_q_0$NS shadow 12 2 (31) |
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| 38 | LDAcc primary-input 81 2 (32) |
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| 39 | DR_q_7 latch 56 2 (33) |
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| 40 | DR_q_7$NS shadow 57 2 (34) |
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| 41 | STDR primary-input 48 2 (35) |
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| 42 | Acc_q_7 latch 58 2 (36) |
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| 43 | Acc_q_7$NS shadow 59 2 (37) |
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| 44 | LDMQ primary-input 78 2 (38) |
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| 45 | inBUS_7 primary-input 88 2 (39) |
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| 46 | inBUS_0 primary-input 82 2 (40) |
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| 47 | DR_q_0 latch 46 2 (41) |
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| 48 | DR_q_0$NS shadow 47 2 (42) |
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| 49 | Acc_q_0 latch 49 2 (43) |
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| 50 | Acc_q_0$NS shadow 50 2 (44) |
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| 51 | MQ_q_7$NS shadow 80 2 (45) |
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| 52 | MQ_q_7 latch 79 2 (46) |
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| 53 | Acc_q_1 latch 44 2 (47) |
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| 54 | Acc_q_1$NS shadow 45 2 (48) |
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| 55 | DR_q_1 latch 42 2 (49) |
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| 56 | DR_q_1$NS shadow 43 2 (50) |
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| 57 | inBUS_1 primary-input 83 2 (51) |
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| 58 | MQ_q_1 latch 76 2 (52) |
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| 59 | MQ_q_1$NS shadow 77 2 (53) |
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| 60 | Acc_q_2 latch 32 2 (54) |
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| 61 | Acc_q_2$NS shadow 33 2 (55) |
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| 62 | DR_q_2 latch 30 2 (56) |
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| 63 | DR_q_2$NS shadow 31 2 (57) |
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| 64 | inBUS_2 primary-input 84 2 (58) |
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| 65 | MQ_q_2 latch 74 2 (59) |
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| 66 | MQ_q_2$NS shadow 75 2 (60) |
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| 67 | DR_q_3 latch 24 2 (61) |
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| 68 | DR_q_3$NS shadow 25 2 (62) |
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| 69 | Acc_q_3 latch 28 2 (63) |
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| 70 | Acc_q_3$NS shadow 29 2 (64) |
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| 71 | inBUS_3 primary-input 85 2 (65) |
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| 72 | MQ_q_3 latch 72 2 (66) |
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| 73 | MQ_q_3$NS shadow 73 2 (67) |
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| 74 | LDDR primary-input 2 2 (68) |
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| 75 | Acc_q_4$NS shadow 37 2 (69) |
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| 76 | Acc_q_4 latch 36 2 (70) |
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| 77 | DR_q_4 latch 34 2 (71) |
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| 78 | DR_q_4$NS shadow 35 2 (72) |
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| 79 | inBUS_4 primary-input 87 2 (73) |
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| 80 | MQ_q_4 latch 70 2 (74) |
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| 81 | MQ_q_4$NS shadow 71 2 (75) |
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| 82 | DR_q_5 latch 38 2 (76) |
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| 83 | DR_q_5$NS shadow 39 2 (77) |
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| 84 | DR_q_6$NS shadow 53 2 (78) |
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| 85 | DR_q_6 latch 52 2 (79) |
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| 86 | inBUS_6 primary-input 89 2 (80) |
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| 87 | inBUS_5 primary-input 86 2 (81) |
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| 88 | Acc_q_5 latch 40 2 (82) |
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| 89 | Acc_q_5$NS shadow 41 2 (83) |
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| 90 | MQ_q_5 latch 68 2 (84) |
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| 91 | MQ_q_5$NS shadow 69 2 (85) |
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| 92 | STMQ primary-input 13 2 (86) |
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| 93 | MQ_q_6 latch 66 2 (87) |
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| 94 | MQ_q_6$NS shadow 67 2 (88) |
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| 95 | STAcc primary-input 51 2 (89) |
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| 96 | Acc_q_6 latch 54 2 (90) |
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| 97 | Acc_q_6$NS shadow 55 2 (91) |
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