| [75] | 1 | /* |
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| 2 | * soclib_dma.h - soclib Multi Channels DMA driver definition. |
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| 3 | * |
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| 4 | * Author Alain Greiner (2017) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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| 24 | #ifndef _SOCLIB_DMA_H_ |
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| 25 | #define _SOCLIB_DMA_H_ |
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| 26 | |
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| 27 | /******************************************************************************************** |
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| 28 | * This driver supports the SocLib VciBlockDevice component, that is a simgle channel, |
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| 29 | * block oriented, external storage controler, supporting only one I/O transaction, |
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| 30 | * at a given time. |
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| 31 | *******************************************************************************************/ |
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| 32 | |
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| 33 | /******************************************************************************************** |
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| 34 | * SOCLIB_DMA registers offset |
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| 35 | *******************************************************************************************/ |
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| 36 | |
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| 37 | enum SoclibDmaRegisters |
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| 38 | { |
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| 39 | DMA_SRC = 0, /*! source buffer 32 LSB address bits */ |
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| 40 | DMA_DST = 1, /*! source buffer 32 LSB address bits */ |
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| [657] | 41 | DMA_LEN_STS = 2, /*! number of bytes (on write) / transfer status (on read) */ |
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| [75] | 42 | DMA_RESET = 3, /*! desactivate channel (can be usde to acknowledge IRQ) */ |
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| 43 | DMA_IRQ_DISABLED = 4, /*! no IRQ generated if non zero */ |
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| 44 | DMA_SRC_EXT = 5, /*! source buffer 32 MSB address bits */ |
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| 45 | DMA_DST_EXT = 6, /*! source buffer 32 MSB address bits */ |
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| 46 | |
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| 47 | DMA_SPAN = 8, /*! number of registers per channel */ |
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| 48 | }; |
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| 49 | |
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| 50 | /******************************************************************************************** |
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| 51 | * SOCLIB_DMA status values |
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| 52 | *******************************************************************************************/ |
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| 53 | |
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| 54 | #define DMA_SUCCESS 0 |
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| 55 | #define DMA_IDLE 2 |
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| 56 | #define DMA_ERROR_READ 1 |
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| 57 | #define DMA_ERROR_WRITE 3 |
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| 58 | #define DMA_BUSY 4 // or any value larger than 3 |
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| 59 | |
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| 60 | |
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| 61 | /******************************************************************************************** |
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| [657] | 62 | * This function access the SOCLIB_DMA hardware register to disable interrupts, |
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| 63 | * because the most frequent operations are supposed to be synchronous accesses. |
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| [75] | 64 | ******************************************************************************************** |
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| 65 | * @ chdev : pointer on DMA chdev descriptor. |
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| 66 | *******************************************************************************************/ |
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| 67 | extern void soclib_dma_init( chdev_t * chdev ); |
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| 68 | |
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| 69 | /******************************************************************************************** |
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| [657] | 70 | * This function can be called by the "server" thread associated to the DMA channel, for an |
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| 71 | * asynchronous access, or can be directly called by the "client" thread for a synchronous |
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| 72 | * access. In both cases, it get the command arguments from the calling thread descriptor, |
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| 73 | * and access the DMA registers to launch the DMA transfer. |
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| 74 | * Then, the waiting policy depends on the command type: |
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| 75 | * - for asynchronous access, it enables the DMA interrupts, blocks on THREAD_BLOCKED_ISR, |
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| 76 | * and deschedules. It will be re-activated by the soclib_dma_isr() function. |
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| 77 | * - for a synchronous transfer, it polls the DMA status register until completion, |
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| 78 | * and reports the transfer status in the command registered in the client thread. |
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| [75] | 79 | ******************************************************************************************** |
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| 80 | * @ thread_xp : extended pointer on the client thread. |
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| 81 | *******************************************************************************************/ |
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| 82 | extern void soclib_dma_cmd( xptr_t thread_xp ); |
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| 83 | |
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| 84 | /******************************************************************************************** |
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| 85 | * This Interrupt Service Routine is executed when the IRQ signaling the completion of |
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| [657] | 86 | * an asynchronous DMA command is received by a core. It acknowledge the IRQ by accessing |
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| 87 | * the proper SOCLIB_DMA register, reports the transfer status in the command registered |
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| 88 | * in the client thread descriptor, and unblock the server thread. |
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| [75] | 89 | ******************************************************************************************** |
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| 90 | * @ chdev : pointer on DMA chdev descriptor. |
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| 91 | *******************************************************************************************/ |
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| 92 | extern void soclib_dma_isr( chdev_t * chdev ); |
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| 93 | |
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| 94 | |
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| 95 | #endif /* _SOCLIB_DMA_H_ */ |
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