- Timestamp:
- Jul 13, 2017, 3:24:38 PM (7 years ago)
- Location:
- trunk/hal/x86_64
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/x86_64/core/hal_apic.c
r202 r203 268 268 } 269 269 270 void hal_ioapic_disable_entry(uint8_t index) 271 { 272 const uint64_t data = IOREDTBL_MSK; 273 274 hal_ioapic_write(IOREDTBL + index * 2, (uint32_t)(data & 0xFFFFFFFF)); 275 hal_ioapic_write(IOREDTBL + index * 2 + 1, (uint32_t)(data >> 32)); 276 } 277 278 void hal_ioapic_set_entry(uint8_t index, uint8_t vec, uint8_t dest) 270 void hal_ioapic_bind_irq(uint8_t irq, uint8_t vec, uint8_t dest) 279 271 { 280 272 const uint64_t data = ((uint64_t)dest << IOREDTBL_DES_SHIFT) | 281 IOREDTBL_DEM_PHYS | IOREDTBL_DEL_FIXED | vec; 282 283 hal_ioapic_write(IOREDTBL + index * 2, (uint32_t)(data & 0xFFFFFFFF)); 284 hal_ioapic_write(IOREDTBL + index * 2 + 1, (uint32_t)(data >> 32)); 273 IOREDTBL_DEM_PHYS | IOREDTBL_DEL_FIXED | IOREDTBL_MSK | vec; 274 275 hal_ioapic_write(IOREDTBL + irq * 2, (uint32_t)(data & 0xFFFFFFFF)); 276 hal_ioapic_write(IOREDTBL + irq * 2 + 1, (uint32_t)(data >> 32)); 277 } 278 279 void hal_ioapic_enable_irq(uint8_t irq) 280 { 281 uint32_t data[2]; 282 283 data[0] = hal_ioapic_read(IOREDTBL + irq * 2); 284 data[1] = hal_ioapic_read(IOREDTBL + irq * 2 + 1); 285 286 data[0] &= ~IOREDTBL_MSK; 287 288 hal_ioapic_write(IOREDTBL + irq * 2, data[0]); 289 hal_ioapic_write(IOREDTBL + irq * 2 + 1, data[1]); 290 } 291 292 void hal_ioapic_disable_irq(uint8_t irq) 293 { 294 uint32_t data[2]; 295 296 data[0] = hal_ioapic_read(IOREDTBL + irq * 2); 297 data[1] = hal_ioapic_read(IOREDTBL + irq * 2 + 1); 298 299 data[0] |= IOREDTBL_MSK; 300 301 hal_ioapic_write(IOREDTBL + irq * 2, data[0]); 302 hal_ioapic_write(IOREDTBL + irq * 2 + 1, data[1]); 285 303 } 286 304 … … 295 313 /* Explicitly disable (mask) each vector */ 296 314 for (i = 0; i < ioapic_pins; i++) { 297 hal_ioapic_disable_ entry(i);315 hal_ioapic_disable_irq(i); 298 316 } 299 317 … … 301 319 302 320 /* Now, enable the com1 port and the keyboard */ 303 hal_ioapic_set_entry(IRQ_COM1, IOAPIC_COM1_VECTOR, 0); 304 hal_ioapic_set_entry(IRQ_KEYBOARD, IOAPIC_KEYBOARD_VECTOR, 0); 321 hal_ioapic_bind_irq(IRQ_COM1, IOAPIC_COM1_VECTOR, 0); 322 hal_ioapic_enable_irq(IRQ_COM1); 323 hal_ioapic_bind_irq(IRQ_KEYBOARD, IOAPIC_KEYBOARD_VECTOR, 0); 324 hal_ioapic_enable_irq(IRQ_KEYBOARD); 305 325 } 306 326 -
trunk/hal/x86_64/core/hal_apic.h
r202 r203 25 25 void hal_com_init_early(); 26 26 27 void hal_ioapic_disable_entry(uint8_t index); 28 void hal_ioapic_set_entry(uint8_t index, uint8_t vec, uint8_t dest); 27 void hal_ioapic_bind_irq(uint8_t irq, uint8_t vec, uint8_t dest); 28 void hal_ioapic_enable_irq(uint8_t irq); 29 void hal_ioapic_disable_irq(uint8_t irq); 30 31 void hal_ioapic_disable_entry(uint8_t irq); 32 void hal_ioapic_set_entry(uint8_t irq, uint8_t vec, uint8_t dest); 29 33 30 34 uint32_t hal_lapic_gid(); -
trunk/hal/x86_64/core/hal_init.c
r202 r203 419 419 /* -------------------------------------------------------------------------- */ 420 420 421 struct { 422 bool_t busy[256]; 423 } idt_bitmap __in_kdata; 424 425 int idt_slot_alloc() 426 { 427 size_t i; 428 429 for (i = 0; i < 256; i++) { 430 if (!idt_bitmap.busy[i]) 431 break; 432 } 433 if (i == 256) { 434 return -1; 435 } 436 437 idt_bitmap.busy[i] = true; 438 return (int)i; 439 } 440 441 void idt_slot_free(int slot) 442 { 443 idt_bitmap.busy[slot] = false; 444 } 445 421 446 static void 422 447 idt_set_seg(struct idt_seg *seg, void *func, int ist, int type, int dpl, int sel) … … 441 466 size_t i; 442 467 468 memset(&idt_bitmap, 0, sizeof(idt_bitmap)); 443 469 idt = (struct idt_seg *)&idtstore; 444 470 … … 453 479 idt_set_seg(&idt[i], (void *)x86_traps[i - CPUVEC_MIN], 0, 454 480 SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); 481 idt_bitmap.busy[i] = true; 455 482 } 456 483 … … 459 486 idt_set_seg(&idt[i], (void *)x86_intrs[i - DYNVEC_MIN], 0, 460 487 SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); 488 idt_bitmap.busy[i] = true; 461 489 } 462 490 } -
trunk/hal/x86_64/core/hal_internal.h
r195 r203 30 30 x86_panic((char *)__func__); \ 31 31 } 32 33 /* hal_init.c */ 34 int idt_slot_alloc(); 35 void idt_slot_free(int slot); 32 36 33 37 /* hal_cpu.S */ -
trunk/hal/x86_64/core/hal_kentry.S
r152 r203 172 172 addq $16,%rsp 173 173 iretq 174 175 /*176 * The XCU interrupt entries.177 */178 179 #define XCU_WTI_ENTRY(n) \180 ASM_ENTRY(x86_xcu_wti_ ## n) \181 pushq $0 ; \182 pushq $T_ASTFLT ; \183 INTR_SAVE_REGS ; \184 ; \185 call hal_do_interrupt; \186 ; \187 INTR_RESTORE_REGS ; \188 addq $16,%rsp ; \189 iretq190 191 #define XCU_HWI_ENTRY(n) \192 ASM_ENTRY(x86_xcu_hwi_ ## n) \193 pushq $0 ; \194 pushq $T_ASTFLT ; \195 INTR_SAVE_REGS ; \196 ; \197 call hal_do_interrupt; \198 ; \199 INTR_RESTORE_REGS ; \200 addq $16,%rsp ; \201 iretq202 203 #define XCU_PTI_ENTRY(n) \204 ASM_ENTRY(x86_xcu_pti_ ## n) \205 pushq $0 ; \206 pushq $T_ASTFLT ; \207 INTR_SAVE_REGS ; \208 ; \209 call hal_do_interrupt; \210 ; \211 INTR_RESTORE_REGS ; \212 addq $16,%rsp ; \213 iretq214 215 XCU_WTI_ENTRY(0)216 XCU_HWI_ENTRY(0)217 XCU_PTI_ENTRY(0)218 174 219 175 /* … … 259 215 x86_intrs: 260 216 .quad x86_lapic_spurious 261 .quad x86_xcu_wti_0262 .quad x86_xcu_hwi_0263 .quad x86_xcu_pti_0264 265 217 .quad x86_lapic_timer 266 218 .quad x86_ioapic_com1 -
trunk/hal/x86_64/core/hal_segmentation.h
r167 r203 205 205 #define CPUVEC_MAX 32 /* reserved entries for CPU exceptions */ 206 206 207 #define DYNVEC_MIN CPUVEC_MAX208 #define DYNVEC_MAX ( DYNVEC_MIN + 7)207 #define DYNVEC_MIN (CPUVEC_MAX + 0) 208 #define DYNVEC_MAX (CPUVEC_MAX + 4) 209 209 210 210 #define VECTOR_APIC_SPURIOU (DYNVEC_MIN + 0) 211 #define VECTOR_APIC_XCU_WTI (DYNVEC_MIN + 1)212 #define VECTOR_APIC_XCU_HWI (DYNVEC_MIN + 2)213 #define VECTOR_APIC_XCU_PTI (DYNVEC_MIN + 3)214 211 215 212 /* debug only, will be moved soon */ 216 #define LAPIC_TIMER_VECTOR (DYNVEC_MIN + 4)217 #define IOAPIC_COM1_VECTOR (DYNVEC_MIN + 5)218 #define IOAPIC_KEYBOARD_VECTOR (DYNVEC_MIN + 6)213 #define LAPIC_TIMER_VECTOR (DYNVEC_MIN + 1) 214 #define IOAPIC_COM1_VECTOR (DYNVEC_MIN + 2) 215 #define IOAPIC_KEYBOARD_VECTOR (DYNVEC_MIN + 3) 219 216 220 217 #define NIDT 256 /* total number of IDT entries */ 221 218 222 -
trunk/hal/x86_64/drivers/pic_apic.c
r197 r203 27 27 #include <vfs.h> 28 28 29 void pic_apic_init( chdev_t * pic ) 29 #include <hal_internal.h> 30 #include <hal_segmentation.h> 31 #include <hal_apic.h> 32 33 extern iopic_input_t iopic_input; 34 35 static void 36 idt_set_seg(struct idt_seg *seg, void *func, int ist, int type, int dpl, int sel) 30 37 { 31 x86_panic((char *)__func__); 38 seg->gd_looffset = (uint64_t)func & 0xffff; 39 seg->gd_selector = sel; 40 seg->gd_ist = ist; 41 seg->gd_type = type; 42 seg->gd_dpl = dpl; 43 seg->gd_p = 1; 44 seg->gd_hioffset = (uint64_t)func >> 16; 45 seg->gd_zero = 0; 46 seg->gd_xx1 = 0; 47 seg->gd_xx2 = 0; 48 seg->gd_xx3 = 0; 49 } 50 51 /* -------------------------------------------------------------------------- */ 52 53 extern uint8_t *idtstore; 54 55 void pic_apic_init(chdev_t *pic) 56 { 57 /* XXX APIC already initialized earlier */ 32 58 } 33 59 … … 37 63 } 38 64 39 void pic_apic_bind_irq( lid_t lid, 40 chdev_t * src_chdev ) 65 void pic_apic_bind_irq(lid_t lid, chdev_t *src_chdev) 41 66 { 42 x86_panic((char *)__func__); 67 struct idt_seg seg, *idt; 68 void *isr; 69 int slot; 70 71 /* get the source chdev functional type, channel, and direction */ 72 uint32_t func = src_chdev->func; 73 uint32_t channel = src_chdev->channel; 74 75 /* get external IRQ index */ 76 uint32_t irq_id; 77 if (func == DEV_FUNC_IOC) 78 irq_id = iopic_input.ioc[channel]; 79 else if (func == DEV_FUNC_TXT) 80 irq_id = iopic_input.txt[channel]; 81 else 82 assert(false, __FUNCTION__, "unsupported device\n"); 83 84 /* get the ISR pointer */ 85 isr = src_chdev->isr; 86 87 /* create the IDT entry, and register it */ 88 idt_set_seg(&seg, isr, 0, SDT_SYS386IGT, SEL_KPL, 89 GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); 90 slot = idt_slot_alloc(); 91 idt = (struct idt_seg *)&idtstore; 92 memcpy(&idt[slot], &seg, sizeof(struct idt_seg)); 93 94 /* Bind the IRQ line in IOAPIC */ 95 hal_ioapic_bind_irq(irq_id, slot, lid); 96 97 x86_printf("-> allocated %z\n", (uint64_t)slot); 43 98 } 44 99 … … 46 101 chdev_t * src_chdev ) 47 102 { 48 x86_panic((char *)__func__); 103 uint32_t func = src_chdev->func; 104 uint32_t channel = src_chdev->channel; 105 uint32_t irq_id; 106 107 /* get external IRQ index */ 108 if (func == DEV_FUNC_IOC) 109 irq_id = iopic_input.ioc[channel]; 110 else if (func == DEV_FUNC_TXT) 111 irq_id = iopic_input.txt[channel]; 112 else 113 assert(false, __FUNCTION__, "unsupported device\n"); 114 115 /* enable the line */ 116 hal_ioapic_enable_irq(irq_id); 49 117 } 50 118 … … 53 121 { 54 122 x86_panic((char *)__func__); 123 124 uint32_t func = src_chdev->func; 125 uint32_t channel = src_chdev->channel; 126 uint32_t irq_id; 127 128 /* get external IRQ index */ 129 if (func == DEV_FUNC_IOC) 130 irq_id = iopic_input.ioc[channel]; 131 else if (func == DEV_FUNC_TXT) 132 irq_id = iopic_input.txt[channel]; 133 else 134 assert(false, __FUNCTION__, "unsupported device\n"); 135 136 /* disable the line */ 137 hal_ioapic_disable_irq(irq_id); 55 138 } 56 139 -
trunk/hal/x86_64/drivers/soclib_bdv.c
r194 r203 184 184 void __attribute__ ((noinline)) soclib_bdv_cmd( xptr_t th_xp ) 185 185 { 186 187 x86_panic("myshit!\n");188 189 186 uint32_t cmd_type; // IOC_READ / IOC_WRITE / IOC_SYNC_READ 190 187 uint32_t lba; // command argument … … 216 213 x86_panic("!IOC_SYNC_READ not supported"); 217 214 } 215 216 x86_panic("STOP HERE"); 218 217 } 219 218 220 219 void __attribute__ ((noinline)) soclib_bdv_isr( chdev_t * chdev ) 221 220 { 222 223 } 224 221 x86_panic((char *)__func__); 222 } 223 -
trunk/hal/x86_64/drivers/soclib_xcu.c
r139 r203 29 29 #include <hal_internal.h> 30 30 31 extern size_t ioapic_pins;32 33 /*34 * These indexes are used to translate a type::idx to a pin on the IOAPIC.35 */36 uint32_t hwi_baseidx __in_kdata = 0;37 uint32_t wti_baseidx __in_kdata = 0;38 uint32_t pti_baseidx __in_kdata = 0;39 40 static uint32_t get_pin(uint32_t idx, uint32_t type)41 {42 switch (type) {43 case HWI_TYPE:44 return hwi_baseidx + idx;45 case WTI_TYPE:46 return wti_baseidx + idx;47 case PTI_TYPE:48 return pti_baseidx + idx;49 default:50 x86_panic("get_pin: wrong type");51 return 0;52 }53 }54 31 55 32 void soclib_xcu_init(chdev_t *icu, lid_t lid) 56 33 { 57 size_t i;58 59 /* disable all IRQs */60 for (i = 0; i < ioapic_pins; i++) {61 hal_ioapic_disable_entry(i);62 }63 64 34 x86_panic((char *)__func__); 65 35 } … … 68 38 lid_t lid) 69 39 { 70 uint8_t dest = (uint8_t)lid; /* XXX */71 uint32_t pin;72 uint8_t vec;73 74 pin = get_pin(idx, type);75 76 switch (type) {77 case HWI_TYPE:78 vec = VECTOR_APIC_XCU_HWI;79 break;80 case WTI_TYPE:81 vec = VECTOR_APIC_XCU_WTI;82 break;83 case PTI_TYPE:84 vec = VECTOR_APIC_XCU_PTI;85 break;86 default:87 x86_panic("enabling wrong irq");88 }89 90 hal_ioapic_set_entry(pin, vec, dest);91 92 40 x86_panic((char *)__func__); 93 41 } … … 96 44 lid_t lid) 97 45 { 98 uint32_t pin = get_pin(idx, type);99 100 hal_ioapic_disable_entry(pin);101 102 46 x86_panic((char *)__func__); 103 47 }
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