Changeset 114
- Timestamp:
- Feb 9, 2010, 1:35:05 AM (15 years ago)
- Location:
- anr
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
anr/anr.sty
r113 r114 37 37 \let\UBS\disable% 38 38 \let\UPMC\disable% 39 \let\ALTERA\disable%40 39 \let\XILINX\disable% 41 40 \let\BULL\disable% … … 50 49 \ifx\TIMA\disable\let\TIMA\enable\fi% 51 50 \ifx\UBS\disable\let\UBS\enable\fi% 52 \ifx\ALTERA\disable\let\ALTERA\enable\fi%53 51 \ifx\XILINX\disable\let\XILINX\enable\fi% 54 52 \ifx\BULL\disable\let\BULL\enable\fi% … … 64 62 \def\@TIMA{\ifx\TIMA\disable{}\else\ifx\TIMA\enable{\@partner}\else{\@leader}\fi\fi}% 65 63 \def\@UBS{\ifx\UBS\disable{}\else\ifx\UBS\enable{\@partner}\else{\@leader}\fi\fi}% 66 \def\@ALTERA{\ifx\ALTERA\disable{}\else\ifx\ALTERA\enable{\@partner}\else{\@leader}\fi\fi}% 67 \def\@XILINX{\ifx\XILINX\disable{}\else\ifx\ALTERA\enable{\@partner}\else{\@leader}\fi\fi}% 64 \def\@XILINX{\ifx\XILINX\disable{}\else\ifx\XILINX\enable{\@partner}\else{\@leader}\fi\fi}% 68 65 \def\@BULL{\ifx\BULL\disable{}\else\ifx\BULL\enable{\@partner}\else{\@leader}\fi\fi}% 69 66 \def\@THALES{\ifx\THALES\disable{}\else\ifx\THALES\enable{\@partner}\else{\@leader}\fi\fi}% 70 67 \def\@NAVTEL{\ifx\NAVTEL\disable{}\else\ifx\NAVTEL\enable{\@partner}\else{\@leader}\fi\fi}% 71 68 \def\@ZIED{\ifx\ZIED\disable{}\else\ifx\ZIED\enable{\@partner}\else{\@leader}\fi\fi}% 72 \begin{tabular}{|c|c|c|c|c|c|c|c|c|c| c|}\hline73 \Sirisa & \Slip & \Stima & \Subs & \Supmc & \S altera & \Sxilinx & \Sbull & \Sthales & \Snavtel & \Szied \\\hline74 \@IRISA & \@LIP & \@TIMA & \@UBS & \@UPMC & \@ ALTERA & \@XILINX & \@BULL & \@THALES & \@NAVTEL & \@ZIED \\\hline69 \begin{tabular}{|c|c|c|c|c|c|c|c|c|c|}\hline 70 \Sirisa & \Slip & \Stima & \Subs & \Supmc & \Sxilinx & \Sbull & \Sthales & \Snavtel & \Szied \\\hline 71 \@IRISA & \@LIP & \@TIMA & \@UBS & \@UPMC & \@XILINX & \@BULL & \@THALES & \@NAVTEL & \@ZIED \\\hline 75 72 \end{tabular}\par 76 73 } -
anr/section-3.1.tex
r112 r114 113 113 Regarding these limitations, it is necessary to create a new tool generation reducing the gap 114 114 between the specification of an heterogeneous system and its hardware implementation. 115 \mustbecompleted {FIXME :: Ajouter ref livre + D &T}115 \mustbecompleted {FIXME :: Ajouter ref livre + D\&T} 116 116 117 117 \subsubsection{Application Specific Instruction Processors} -
anr/section-7.tex
r99 r114 157 157 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 158 158 \subsection{Partner 6: \xilinx} 159 \ressourcehelp 159 160 160 \begin{figure}\leavevmode\center 161 161 \input{table_xilinx_full.tex} … … 168 168 \xilinx employees involved in the project are permanent Software Engineers. 169 169 The detail by delivrables is given in figure~\ref{ress-detail-xilinx} and 170 summarizesby task in the following table.170 a sumary by task in the following table. 171 171 \begin{center}\input{table_xilinx_short.tex}\end{center} 172 172 \item[Subcontracting] … … 182 182 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 183 183 \subsection{Partner 7: \bull} 184 \ressourcehelp 184 185 \begin{description} 186 \item[Equipment] 187 Acquisition of a FPGA development board will represent the main equipment cost for 188 Bull in COACH. It is estimated at about 5\% (tbc) of the total funding. 189 \item[Personnel costs] 190 A permanent engineer will be assigned full time to the project for a duration of 20 191 months as shown in the table below: 192 \begin{center}\input{table_bull_short.tex}\end{center} 193 \item[Subcontracting] 194 No subcontracting costs. 195 \item[Travel] 196 Application of a standard 10\% of the total funding to travel costs. 197 \item[Expenses for inward billing] 198 Costs justified by inward billing are estimated to about 5\% of the total funding. 199 \item[Other working costs] none 200 \end{description} 201 185 202 186 203 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -
anr/task-2.tex
r113 r114 4 4 \let\TIMA\enable 5 5 \let\XILINX\enable 6 \let\UBS\enable 6 7 \end{taskinfo} 7 8 % -
anr/task-3.tex
r112 r114 25 25 26 26 \begin{livrable} 27 \itemV{0}{18}{X}{\Sirisa}{ASIP compilation flow} {0:0:0}27 \itemV{0}{18}{X}{\Sirisa}{ASIP compilation flow} 28 28 In this first version of the software, the computations patterns corresponding to 29 29 custom instruction are specified by the user, and then automatically extracted (when … … 41 41 of the architecture, along with its architectural extensions 42 42 \begin{livrable} 43 \itemV{0}{12}{X}{\Sirisa}{SystemC for extensible MIPS } {1:.5:.5}43 \itemV{0}{12}{X}{\Sirisa}{SystemC for extensible MIPS } 44 44 { A SystemC simulation model for an simple extensible MIPS architectural template } 45 45 \itemL{12}{20}{X}{\Sirisa}{SystemC for extensible MIPS}{0:0:0} … … 49 49 { A SystemC simulation model for an extensible NIOS processor template, the VHDL model being 50 50 already available from Altera} 51 \itemV{12}{18}{H}{\Sirisa}{VHDL for an extensible MIPS} {1:.5:.5}51 \itemV{12}{18}{H}{\Sirisa}{VHDL for an extensible MIPS} 52 52 {A synthesizable VHDL model for an simple extensible MIPS architectural template} 53 53 \itemL{18}{24}{H}{\Sirisa}{VHDL for an extensible MIPS}{0:0:0} 54 54 {A synthesizable VHDL model for a extensible MIPS with a tight architectural integration of 55 55 its instruction set extensions} 56 \item V{24}{36}{D}{\Sirisa}{Evaluation report }{0:0:0}56 \itemL{24}{36}{D}{\Sirisa}{Evaluation report }{0:0:0} 57 57 {A evaluation report with quantitative analysis of the performance/area trade-off induced by 58 58 the different approaches} … … 78 78 Extension of automatic parallelization and array contraction 79 79 to non-polyhedral loops. Implementation in the Bee framework. 80 \itemL{30}{36}{x}{\Slip} {Process and FIFO construction} 80 \itemL{30}{36}{x}{\Slip} {Process and FIFO construction}{0:0:0} 81 81 Final release taking into account the feedbacks from the 82 82 demonstrator \STs. -
anr/task-6.tex
r52 r114 14 14 % 15 15 \begin{workpackage} 16 \item This \ST relies to the COACH use by \bull. 17 \mustbecompleted{FIXME:BULL ajouter quelques lignes pour donner 18 1) type d'application (HPC ou embedded system, HLS), 19 2) domaine (RADAR, VIDEO, ...) 20 3) et si possible l'interet de BULL dans COACH.} 21 \begin{livrable} 22 \itemV{0}{6}{d}{\Sbull}{\bull demonstrator} 23 The deliverable is a document that describes the application that will be use as 24 demonstrator. 25 \itemV{6}{12}{x}{\Sbull}{\bull demonstrator} 26 The deliverable is the specification of the demonstrator in COACH input format 27 defined in the {\specGenManual} deliverable. 28 \itemL{12}{36}{d}{\Sbull}{\bull demonstrator}{9:6:5} 29 Validation of the demonstrator, the deliverable is a document 30 describing the result of the experimentations. 31 \end{livrable} 16 32 \item This \ST relies to the COACH use by \navtel. 17 The application is A-COMPLETER-1-A-3-LIGNE .... .... .... .... .... 18 ... ... 19 ... ... 20 ... ... 33 \\\mustbecompleted{FIXME:NAVTEL:BEGIN ---------------}\\ 34 INDIQUER en quelques lignes \\ 35 \hspace*{1cm} 1) ce que vous voulez faire \\ 36 \hspace*{1cm} 2) ce que vous allez faire avec COACH \\ 37 Pour les deliverables qu'on voit un rapport avec COACH, 38 et indiquer: la date de debut, la date de fin, le nombre de homme*home 39 pour l'année 1, l'année 2, l'année 3. 40 \par 41 De plus il me faut qq pour la page 42 (voir page precedente). 42 \\\mustbecompleted{FIXME:NAVTEL:END -------------------} 21 43 \begin{livrable} 22 44 \itemV{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} 23 Choice of the demonstrator and its implementation as a PC C/C++ program. 45 %Choice of the demonstrator and its implementation as a PC C/C++ program. 46 Navtel delivers a single node embedded hardware which consists of an ARM 47 processor and a Spartan 6 FPGA for the experimentation of an embedded super 48 computing system. 49 \mustbecompleted{FIXME:NAVTEL On ne voit pas le rapport avec COACH !!!} 24 50 \itemL{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}{0:0:0} 25 The demonstrator is described as a communicating task graph using the 26 specification defined in the milestone T0+12. 27 \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} 28 This deliverable is a report that describes the experimentation done with the 29 T0+12 COACH milestone. 30 \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} 31 This deliverable is a report that describes the experimentation done with the 32 T0+24 COACH milestone. 33 \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0} 34 This deliverable is a report that describes the experimentation done with the 35 pre-final COACH release. 51 A wrapper technology demonstrator with partial reconfiguration and its interface 52 with real time scheduler. 53 \mustbecompleted{FIXME:NAVTEL 1) On ne voit pas le rapport avec COACH !!! 54 2) si ca s'arrete la il n'y a aucun lien avec COACH puisque COACH commence 55 seulement a tourner a T0+12 56 } 57 % \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} 58 % This deliverable is a report that describes the experimentation done with the 59 % T0+12 COACH milestone. 60 % \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} 61 % This deliverable is a report that describes the experimentation done with the 62 % T0+24 COACH milestone. 63 % \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0} 64 % This deliverable is a report that describes the experimentation done with the 65 % pre-final COACH release. 36 66 \end{livrable} 37 67 \end{workpackage}
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