Changeset 221 for anr/task-7.tex

Timestamp:

Feb 16, 2010, 1:56:18 PM (15 years ago)

Author:

coach

Message:

UBS

File:

• anr/task-7.tex (modified) (1 diff)

anr/task-7.tex

@@ -59 +59 @@
     \itemL{30}{36}{d}{\Supmc}{tutorial}{2:1:1}
         The final release of the tutorial.
-    \itemL{18}{24}{d}{\Stima}{tutorial}{0:0:1}
-        This tutorial shows how to generate a complete HW/SW system by using CSG tool.
-    \itemL{18}{24}{d}{\Slip}{tutorial}{0:0:0}
-        This tutorial shows how to apply loop transformations to a task.
-    \itemL{18}{24}{d}{\Sirisa}{tutorial}{0:0:0}
-        This tutorial shows how to customize a processor to obtain an ASIP.
-    \itemL{18}{24}{d}{\Subs}{tutorial}{0:1:0}
-        This tutorial shows how a task can be synthesized by using HLS tools developped in 
+    \itemL{18}{24}{d}{\Stima}{CSG User manual}{0:0:1}
+        This user manual shows how to generate a complete HW/SW system by using CSG tool.
+    \itemL{18}{24}{d}{\Slip}{HAS front-end user manual}{0:0:0}
+        This user manual shows how to apply loop transformations to a task.
+    \itemL{18}{24}{d}{\Sirisa}{ASIP user manual}{0:0:0}
+        This user manual shows how to customize a processor to obtain an ASIP.
+    \itemL{18}{24}{d}{\Subs}{HLS user manual}{0:1:0}
+        This user manual shows how a task can be synthesized by using HLS tools developped in 
                 the COACH project. 
     \itemL{30}{33}{d}{\Sxilinx}{optimisation for \ganttlf \xilinx RTL tools (6)}{0:0:0.5}