Changeset 247 for anr/section-2.2.tex


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Timestamp:
Feb 17, 2010, 2:27:40 PM (14 years ago)
Author:
coach
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UBS

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  • anr/section-2.2.tex

    r241 r247  
    11% Relevance of the proposal
    2 The COACH proposal addresses directly the \emph{Embedded Systems} item of
    3 the ARPEGE program. It aims to propose solutions to the societal/economical challenges by
    4 providing SMEs novel design capabilities enabling them to increase their
    5 design productivity with design exploration and synthesis methods that are placed on top
    6 of the state-of-the-art methods.
    7 This project proposes an open-source framework for mapping multi-tasks software applications
    8 on Field Programmable Gate Array circuits (FPGA).
     2%The COACH proposal addresses directly the \emph{Embedded Systems} item of
     3%the ARPEGE program.
     4
     5%PC => IA et ALain
     6%J'aui déplacé le pargraphe ci dessous en conclusion de la section précédente 2.1
     7
     8%It aims to propose solutions to the societal/economical challenges by
     9%providing SMEs novel design capabilities enabling them to increase their
     10%design productivity with design exploration and synthesis methods that are placed on top
     11%of the state-of-the-art methods.
     12%This project proposes an open-source framework for mapping multi-tasks software applications
     13%on Field Programmable Gate Array circuits (FPGA).
    914%%%
    1015\parlf
    … …  
    5661    silicon density and power efficiency, able to adapt its computing
    5762    structure to computation patterns that can be speed-up and/or
    58     power efficient.  The ROMA project study a pipeline of
    59     evolved low-power coarse grain reconfigurable operators to avoid
    60     traditional overhead, in reconfigurable devices, related to the
    61     interconnection network.  The project will borrow from the ROMA
     63    power efficient.  %The ROMA project study a pipeline of
     64    %evolved low-power coarse grain reconfigurable operators to avoid
     65    %traditional overhead, in reconfigurable devices, related to the
     66    %interconnection network. 
     67        The project will borrow from the ROMA
    6268    ANR project and the ongoing joint INRIA-STMicro
    6369    Nano2012 project to adapt existing pattern extraction algorithms
    … …  
    9096  \item
    9197    Regarding system level architecture, the project is based on the know-how
    92     acquired by the \upmc and \tima laboratories in the framework of various projects 
     98    acquired by \upmc and \tima in the framework of various projects 
    9399    in the field of communication architectures for shared memory multi-processors systems
    94100    (COSY~\cite{cosy}, DISYDENT~\cite{disydent05} or DSPIN~\cite{dspin08} of MEDEA-MESA).
    … …  
    109115    parallelism detection, scheduling \cite{Feau:92aa,Feau:92bb},
    110116    process construction \cite{Feau:96} and memory management \cite{bee}
    111     will be very useful as a front-end for the a high-level synthesis tools.
     117    will be very useful as a front-end for HLS tools.
    112118\end{itemize}
    113119%%%
    … …  
    120126Multi-Core Systems-on-Chip (possibly heterogeneous) on FPGA according to the design
    121127constraints and objectives (real-time, low-power). It will permit designing  complex SoC
    122 based on IP cores (memory, peripherals, network controllers, communication processors),
     128based on IP cores (memory, peripherals...),
    123129running Embedded Software, as well as an Operating System with associated middleware and
    124130API and using hardware accelerator automatically generated. It will also permit to use
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