Changeset 278 for anr/task-4.tex
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- Nov 24, 2010, 12:14:38 AM (14 years ago)
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anr/task-4.tex
r267 r278 9 9 The objectives of this task are to provide the two HAS back-ends of the COACH project and 10 10 a tool that adapt the coprocessor frequency to the FPGA-SoC frequency as required 11 by the processors and the system BUS. 12 %pourquoi en majuscule? 11 by the processors and the system bus. 13 12 \\ 14 13 The HAS back-ends as shown in figure~\ref{archi-hls} reads an \xcoach description and provides an … … 22 21 UGH. These tools are complementary and not in competition because they cover respectively 23 22 data and control dominated designs. 24 The organization of the task is firstly to quickly integrate the existing HLS to the COACH25 framework. Secondly these tools will be improved to allows to treat data dominated application26 with a few control for GAUT and control dominated application with a few data processing27 for UGH. This will enlarge the domain the HLS can cover which is a strong limitation of the28 tools currently avilable \cite{HLSBOOK} \cite{IEEEDT} \cite{CATRENE}.29 23 \end{objectif} 30 24 31 %FIXMA == {il faudrait fusionner les taches ST5-1 et ST5-2, non ???}32 25 \begin{workpackage} 33 \subtask The goal of this \ST is to integrate the UGH HLS tool to the COACH framework. It34 consists of suppressing the C compiler and the SystemC and VHDL drivers and replacing35 them by \xcoach and \xcoachplus drivers i.e. C2X, X2SC and X2VHDL.26 \subtask{Making HAS back-end to read \xcoach format} 27 The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework. 28 by implementing the mechanism to read \xcoach format. 36 29 \begin{livrable} 37 30 \itemL{6}{12}{x}{\Stima}{UGH integration}{12:0:0} 38 31 Release of the UGH software that reads \xcoach format. 39 \itemV{12}{18}{x}{\Supmc}{UGH integration}40 Release of the UGH software that writes \xcoachplus format.41 \itemL{18}{33}{x}{\Supmc}{UGH integration}{0:2:4.0}42 Final release of the UGH software.43 \end{livrable}44 \subtask The goal of this \ST is to integrate the GAUT HLS tool to the COACH framework. It45 consists of suppressing the C compiler and the SystemC and VHDL drivers and replacing46 them by \xcoach and \xcoachplus drivers.47 \begin{livrable}48 32 \itemL{6}{12}{x}{\Subs}{GAUT release reading \xcoach}{6:0:0} 49 33 Release of the GAUT software that is able to read \xcoach format. 34 \end{livrable} 35 % 36 \subtask{Making HAS back-end to write \xcoachplus format} 37 The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework. 38 by implementing the mechanism to write \xcoachplus format. 39 \begin{livrable} 40 \itemL{12}{18}{x}{\Supmc}{UGH integration}{0:2:4.0} 41 Release of the UGH software that writes \xcoachplus format. 50 42 \itemL{12}{18}{x}{\Subs}{GAUT release writing \xcoachplus}{0:6:0} 51 43 Release of the GAUT software that is able to read \xcoach format and to write \xcoachplus format. 52 %\itemL{18}{33}{x}{\Subs}{Final release of GAUT}{0:1:6}53 % Final release of the GAUT software.54 44 \end{livrable} 55 \subtask The goal of this \ST is to improve the UGH and GAUT HLS tools. 56 UGH and GAUT experimentations have shown respectively usefull enhancements. 57 \begin{livrable} 58 \itemL{18}{24}{x}{\Stima}{UGH enhancement 1}{0:9:0} 59 Release of the UGH software with support for treating automatically data dominated sections 60 included into a control dominated application. 61 \itemL{21}{27}{x}{\Stima}{UGH enhancement 2}{0:3:6} 62 Release of the UGH software able to generate a micro-architecture without the 63 variable binding currently done by the designer. 64 \itemL{12}{24}{x}{\Subs}{Release of GAUT with \ganttlf enhanced synthesis steps}{0:9:0} 65 Release of the GAUT software that supports the \xcoach model during the binding and the scheduling steps. 66 \itemL{24}{33}{x}{\Subs}{Release of GAUT supporting \ganttlf new const./obj.}{0:0:7} 67 Release of the GAUT software that supports the \xcoach model during the binding and the scheduling steps 68 and also supports new constraints and objectives. 69 \itemV{18}{24}{d}{\Subs}{Micro-architecture Exploration}\setMacroInAuxFile{MAE} 70 Specification of a Design Space Exploration framework for the HAS Back-end: 71 The high level specification tools, such as GAUT, have to be able to use synthesis feed-back 72 informations in order to explore the design space and to generate optimized architectures. 73 \itemL{24}{36}{x}{\Subs}{Micro-architecture Exploration}{0:4:4} 74 Release of the GAUT software that supports the features defined in \MAE 75 \end{livrable} 76 \subtask In FPGA-SoC, the frequency is given by the processor(s) and the system BUS. The coprocessors 45 46 \subtask{Coprocessor frequency adaptation} 47 In FPGA-SoC, the frequency is given by the processor(s) and the system BUS. The coprocessors 77 48 generated by HLS synthesis must respect this frequency. However, the HLS tools can not 78 49 guarantee that the micro-architectures they generate accurately respect this … … 84 55 \begin{livrable} 85 56 \itemV{0}{12}{d}{\Supmc}{Frequency calibration} 86 A document describing the set up of the coprocessor frequency calibration. :57 A document describing the set up of the coprocessor frequency calibration. 87 58 \itemV{12}{24}{x}{\Supmc}{Frequency calibration} 88 59 \setMacroInAuxFile{freqCalibrationVhdl} … … 91 62 The frequency calibration software consists of a driver in the FPGA-SoC operating 92 63 system and of a control software. 93 \itemL{24}{27}{d}{\Sxilinx}{\xilinx RTL optimisation (5)}{0:0:1.5}94 This deliverable consists in optimizing the VHDL description provided in95 \novers{\freqCalibrationVhdl}.96 \upmc will provide the VHDL description, \xilinx will provide back a documentation97 listing that proposes VHDL generation enhancements.98 64 \end{livrable} 99 65 \end{workpackage}
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