Changeset 338 for anr/section-2.tex

Timestamp:

Jan 31, 2011, 3:09:12 PM (14 years ago)

Author:

coach

Message:

language modification, section 2

File:

• anr/section-2.tex (modified) (3 diffs)

anr/section-2.tex

@@ -1 @@
-Embedded systems (SoC and MPSoC) became an inevitable evolution in the microelectronic industry.
-Due to the exploding fabrication costs, the ASIC technology (Application Specific Integrated Circuit) 
+Embedded systems (SoC and MPSoC) have become an inevitable evolution in the microelectronic industry.
+Due to the exploding fabrication costs, the ASIC technology (Application Specific Integrated Circuits) 
 is not an option for SMEs (Small and Medium Enterprises).
 Fortunately, the new FPGA (Field Programmable Gate Array) components,
@@ -8 +8 @@
 software/hardware partionning, operating system, hardware design, VHDL/Verilog modeling.
 Only very few SMEs have these multiple expertises and are present on the embedded system market.
-Furthermore, even small design services in the big companies are facing the same issue.
+Furthermore, even small design shops in big companies are facing the same issue.
 \begin{center}\begin{minipage}{.8\linewidth}\textit{
 The major objective of COACH is to provide to system designers, an affordable
@@ -64 +64 @@
 In HPC (High Performance Computing), the targeted application is an existing one
 running on a PC.
-The COACH framework helps designer to accelerate it by migrating critical parts into a
-SoC embedded into an FPGA device plugged to the PC PCI/X bus.
+The COACH framework helps designers to accelerate it by migrating critical parts into a
+SoC embedded into an FPGA device plugged to the PC PCI/X bus 
+%paul On ne sait jamais, ça pourrait être Hyper Transport
+(or to any other communication fabric).
 \begin{center}\begin{minipage}{.8\linewidth}\label{HPC:definition}\textit{
 The second objective of COACH is to extend the framework for HPC applications.
 }\end{minipage}\end{center}
-This will allow SMEs to enter HPC market for the applications that are
+This will allow SMEs to enter the HPC market for applications that are
 unadapted to the current GPU based solutions.
 \parlf
-Coach generates SoC which is part of larger system. Thus it is important to take in account the existing industrial design flow. For this reason COACH will use the IP-XACT IEEE 1685 standard for packaging these generated SoC.
+Coach generates SoCs which are part of larger systems. Thus it is important to take
+ into account the existing industrial design flow. For this reason COACH will use the 
+IP-XACT IEEE 1685 standard for packaging these generated SoCs.
 \begin{center}\begin{minipage}{.8\linewidth}\textit{
 The third objective of COACH is to facilitate the integration of generated SoC in global system design flow.