Changeset 47
- Timestamp:
- Jan 29, 2010, 2:31:27 PM (15 years ago)
- Location:
- anr
- Files:
-
- 1 added
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
anr/task-0.tex
r39 r47 37 37 \item This \ST consists firstly in the building and maintenance of the 38 38 development and dissemination infrastructure. It is also in charge of 39 consists indistributing the COACH releases.39 distributing the COACH releases. 40 40 \begin{livrable} 41 41 \item{}{0}{6}{}{\Supmc}{infrastructure setup} Building the -
anr/task-1.tex
r39 r47 72 72 Last release of XML specification of the \xcoach format enhanced with 73 73 the expression of loop potential parallelism. 74 \item{V1}{6}{12}{x}{\Subs}{C++ to/from \xcoach format} 75 \setMacroInAuxFile{specXcoachToCI} 76 This delivrable is composed of 2 softwares. 77 The first software is a GCC plugin that generates a \xcoach description 74 \item{V1}{6}{12}{x}{\Subs}{C++ to/from \xcoach format (1)} 75 \setMacroInAuxFile{specXcoachToCAI} 76 Proposition of a GCC plugin that generates a \xcoach description 78 77 (defined in {\specXcoachDocI} deliverable) from a C++ task description 79 (defined in \specHasManual deliverable). 80 The second software regenerates a C description from a \xcoach 78 (defined in {\specHasManual} deliverable). 79 \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format step 1} 80 \setMacroInAuxFile{specXcoachToCA} 81 The same software as the former (\specXcoachToCAI) but for \xcoach format defined 82 in the {\specXcoachDoc} deliverable and HAS input defined in the {\specHasManual} 83 deliverable. 84 \item{V1}{7}{12}{x}{\Subs}{C++ to/from \xcoach format (2)} 85 \setMacroInAuxFile{specXcoachToCBI} 86 This second tool regenerates a C description from a \xcoach 81 87 description. 82 \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format }83 \setMacroInAuxFile{specXcoachToC }84 The same software s as the former (\specXcoachToCI) but for the \xcoach format as defined88 \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format (2)} 89 \setMacroInAuxFile{specXcoachToCB} 90 The same software as the former (\specXcoachToCBI) but for the \xcoach format as defined 85 91 in the {\specXcoachDoc} deliverable and HAS input as defined in the {\specHasManual} 86 92 deliverable. -
anr/task-2.tex
r39 r47 69 69 The synthesizable VHDL description of the MWMR component corresponding to the 70 70 SystemC module of the former delivrable (\csgAlteraSystemC); 71 \item{V1}{6}{12}{d}{\Subs}{UBS architecture} 72 \mustbecompleted{FIXME:UBS ARGH!!!!!\\ 73 1) Attention si vous touchez au MWMR, ils y a 3 composants MWMR. \\ 74 2) UBS architecture} est tres mal choisit, ca fait un 4ieme template 75 } 76 \setMacroInAuxFile{gautMWMRoptimization} 77 Specification of an optimized MWMR component to handle data interleaving (space and time). 78 This evolution aims to solve out of order communication weakness of the classical MWMR. 79 \item{V2}{12}{24}{x}{\Subs}{UBS architecture} 80 Release of the tool that generates the VHDL description of the optimized MWMR component 81 and its corresponding SystemC module. 82 \item{VF}{24}{30}{x}{\Subs}{UBS architecture} 83 Final release of the tool that generates the VHDL description of the optimized MWMR component 84 and its corresponding SystemC module (\gautMWMRoptimization). 71 85 \end{livrable} 72 86 \item This \ST consists of the configuration of the SocLib MUTEK and DNA operating … … 91 105 Port of MUTEK OS on the NIOS2 and MICROBLAZE processors. 92 106 \end{livrable} 93 % moved in task 194 %\item This \ST relies to definition and implementation of the enhanced communication95 % schemes usable in the definition of communicante task graph.96 % \begin{livrable}97 % \item{}{0}{6}{d}{\Stima}{CSG user manual} A document that describes the CSG task98 % graph inputs (task graph, task description, communication schemes).99 % \end{livrable}100 %\item This \ST relies to implementation of the MWMR component for the Xilinx and Altera101 % architectural template.102 % \begin{livrable}103 % \item{}{0}{18}{x}{\Stima}{MWMR Altera} The VHDL synthesizable description and104 % SystemC model of the MWMR with a PLB bus interface.105 % \item{}{0}{18}{x}{\Sirisa}{MWMR Altera} The VHDL synthesizable description and106 % SystemC model of the MWMR with an AVALON bus interface.107 % \end{livrable}108 % FIXME:CITI109 107 \end{workpackage} -
anr/task-4.tex
r40 r47 42 42 them by \xcoach and \xcoachplus drivers. 43 43 \begin{livrable} 44 \item{V1}{6}{12}{x}{\S tima}{GAUT integration} The GAUT software that is able to read44 \item{V1}{6}{12}{x}{\Subs}{GAUT integration} The GAUT software that is able to read 45 45 \xcoach format. 46 \item{VF}{12}{18}{x}{\S tima}{GAUT integration} The GAUT software that is able to read46 \item{VF}{12}{18}{x}{\Subs}{GAUT integration} The GAUT software that is able to read 47 47 \xcoach format and to write \xcoachplus format. 48 \item{VF}{18}{33}{x}{\Subs}{GAUT integration} Maintenance work of the GAUT software. 48 49 \end{livrable} 49 50 \item The goal of this \ST is to improve the UGH and GAUT HLS tools. … … 56 57 generate a micro-architecture without the variable binding currently done by the 57 58 designer. 58 \item{}{18}{24}{x}{\Subs}{GAUT enhancement 1} A GAUT excutable that is able to 59 \mustbecompleted{FIXME:UBS: ........}. 60 \item{}{21}{27}{x}{\Subs}{GAUT enhancement 2} A GAUT excutable that is able to 61 \mustbecompleted{FIXME:UBS: ........}. 62 \item{}{21}{27}{x}{\Subs}{GAUT enhancement 2} A GAUT excutable that is able to 63 \mustbecompleted{FIXME:UBS: ........}. 59 \item{}{6}{18}{x}{\Subs}{GAUT enhancement 1} Release of the GAUT software that supports the control 60 and data flow formal model. 61 \mustbecompleted{FIXME:USB ca ne va pas avec l'intro de la tache, UGH n'a 62 plus aucune utilite si ceci reste} 63 \item{}{18}{30}{x}{\Subs}{GAUT enhancement 2} Release of the GAUT software that supports the control 64 and data flow formal model and also supports new constraints and objectives defined in \ST1-1 \mustbecompleted{FIXME:UBS: quel 65 delivrable ??}. 66 % FIXME:USB redondant avec le delivrable "GAUT integration" ou alors 67 % c'est en enhancement et il faut le decrire. 68 % \item{VF}{30}{36}{x}{\Subs}{GAUT enhancement 3} Final release of the GAUT software 64 69 \end{livrable} 65 70 \item In FPGA-SoC, the frequency is given by the processors and the BUS. The coprocessors
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