Changeset 47 for anr/task-4.tex
- Timestamp:
- Jan 29, 2010, 2:31:27 PM (14 years ago)
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anr/task-4.tex
r40 r47 42 42 them by \xcoach and \xcoachplus drivers. 43 43 \begin{livrable} 44 \item{V1}{6}{12}{x}{\S tima}{GAUT integration} The GAUT software that is able to read44 \item{V1}{6}{12}{x}{\Subs}{GAUT integration} The GAUT software that is able to read 45 45 \xcoach format. 46 \item{VF}{12}{18}{x}{\S tima}{GAUT integration} The GAUT software that is able to read46 \item{VF}{12}{18}{x}{\Subs}{GAUT integration} The GAUT software that is able to read 47 47 \xcoach format and to write \xcoachplus format. 48 \item{VF}{18}{33}{x}{\Subs}{GAUT integration} Maintenance work of the GAUT software. 48 49 \end{livrable} 49 50 \item The goal of this \ST is to improve the UGH and GAUT HLS tools. … … 56 57 generate a micro-architecture without the variable binding currently done by the 57 58 designer. 58 \item{}{18}{24}{x}{\Subs}{GAUT enhancement 1} A GAUT excutable that is able to 59 \mustbecompleted{FIXME:UBS: ........}. 60 \item{}{21}{27}{x}{\Subs}{GAUT enhancement 2} A GAUT excutable that is able to 61 \mustbecompleted{FIXME:UBS: ........}. 62 \item{}{21}{27}{x}{\Subs}{GAUT enhancement 2} A GAUT excutable that is able to 63 \mustbecompleted{FIXME:UBS: ........}. 59 \item{}{6}{18}{x}{\Subs}{GAUT enhancement 1} Release of the GAUT software that supports the control 60 and data flow formal model. 61 \mustbecompleted{FIXME:USB ca ne va pas avec l'intro de la tache, UGH n'a 62 plus aucune utilite si ceci reste} 63 \item{}{18}{30}{x}{\Subs}{GAUT enhancement 2} Release of the GAUT software that supports the control 64 and data flow formal model and also supports new constraints and objectives defined in \ST1-1 \mustbecompleted{FIXME:UBS: quel 65 delivrable ??}. 66 % FIXME:USB redondant avec le delivrable "GAUT integration" ou alors 67 % c'est en enhancement et il faut le decrire. 68 % \item{VF}{30}{36}{x}{\Subs}{GAUT enhancement 3} Final release of the GAUT software 64 69 \end{livrable} 65 70 \item In FPGA-SoC, the frequency is given by the processors and the BUS. The coprocessors
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