Changeset 57 for anr

Timestamp:

Feb 2, 2010, 1:06:38 AM (15 years ago)

Author:

coach

Message:

TIMA scientific justification

Location:

anr

Files:

• Makefile (modified) (2 diffs)
• section-7.tex (modified) (2 diffs)
• task-2.tex (modified) (2 diffs)
• task-4.tex (modified) (2 diffs)
• task-5.tex (modified) (3 diffs)

anr/Makefile

@@ -12 +12 @@
                         section-6.1.tex section-6.2.tex section-7.tex
 
-TABLES= table_upmc.tex
+TABLES= table_upmc.tex table_tima.tex 
 
 # PROGRAMS
@@ -26 +26 @@
         @bibtex anr 
         @./gantt < anr.gantt
+        @pdflatex anr.tex 
         @pdflatex anr.tex 
         @grep ndefine anr.log

anr/section-7.tex

@@ -11 +11 @@
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 \subsection{Partner 3: \tima}
-\ressourcehelp
+\begin {itemize}
+\item [Equipment]
+No specific equipment acquisition. 
+\item [Personnel costs]
+The permanent personnels involved in the project are professor and
+assistant processor (Fr\'ed\'eric P\'etrot and Olivier Muller).
+All non permanent personnel are Phd students.
+Related costs are estimated in men per months.
+One phd student (Adrien Prost-Boucle), funded by french ministry of research,
+will work working on the project.
+One 100\% funded phd student will be hired in september 2010. A second phd student
+will be hired in september 2011, but with half-funding on the project.
+The first PhD student will mainly work on the evolution of UGH HLS tool. Thus, we
+are looking for profil with strong informatic skills and good knowledge in
+computer architecture.
+The second student will mainly work on dynamic reconfiguration and HPC. The required
+profil will be more oriented on computer architecture and advances digital design.
+
+The table below sumarizes the man power by task for both permanent and non-permanent
+personnels. The detail by delivrables is given in figure~\ref {detail-tima}.
+The requested funding for personnels represent 47\% of the total personnal costs.
+The requested funding for non permanent personnels is 82\% of the total ANR
+requested funding.
+\item [Subcontracting]
+No subcontracting costs.
+\item [Travel]
+The travel costs are associated to project meeting as
+well as participation to conferences. The travel costs are estimated
+to 14\% of the total requested ANR funding.
+\item [Expenses for inward billing]
+The costs justified by internal invoicing procedures are evaluated to 4\%
+of the total requested ANR funding.\\
+\input{table_tima.tex}
+%FIXME comment on rajoute les hommes-ans sur le WP7 pour la dissemination ?
+\end {itemize}
 
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
@@ -43 +77 @@
 \item [Expenses for inward billing]
 The costs justified by internal invoicing procedures are evaluated to 4\%
-of the total requested ANR funding.
+of the total requested ANR funding.\\
 \input{table_upmc.tex}
 \end {itemize}

anr/task-2.tex

@@ -59 +59 @@
         the SystemC modules of the components of the XILINX architectural template
         not available in the SocLib component library.
-    \itemL{18}{24}{h}{\Stima}{XILINX architecture}{0:0:0}
+    \itemL{18}{24}{h}{\Stima}{XILINX architecture}{9:9:0}
         The synthesizable VHDL description of the MWMR component corresponding to the
         SystemC module of the former delivrable (\csgXilinxSystemC).
@@ -103 +103 @@
     \itemV{8}{18}{x}{\Stima}{DNA 0S}
         The drivers required for the second CSG milestone ({\csgPrototypingOnly}).
-    \itemL{18}{33}{x}{\Stima}{DNA OS}{0:0:0}
+    \itemL{18}{33}{x}{\Stima}{DNA OS}{6:2:2}
         Maintenance work.
-    \itemL{6}{18}{x}{\Stima}{Port of DNA OS}{0:0:0}
+    \itemL{6}{18}{x}{\Stima}{Port of DNA OS}{3:1:0}
         Port of DNA OS on the NIOS2 and MICROBLAZE processors.
     \end{livrable}

anr/task-4.tex

@@ -32 +32 @@
     them by \xcoach and \xcoachplus drivers.
     \begin{livrable}
-    \itemL{6}{12}{x}{\Stima}{UGH integration}
+    \itemL{6}{12}{x}{\Stima}{UGH integration}{12:0:0}
         The UGH software that is able to read \xcoach format.
     \itemV{12}{18}{x}{\Supmc}{UGH integration}
@@ -54 +54 @@
     usefull enhancements
     \begin{livrable}
-    \itemL{18}{24}{x}{\Stima}{UGH enhancement 1}{0:0:0}
+    \itemL{18}{24}{x}{\Stima}{UGH enhancement 1}{0:9:0}
         The UGH software whith support for treating automatically data dominated sections
         included into a control dominated application.
-    \itemL{21}{27}{x}{\Stima}{UGH enhancement 2}{0:0:0}
+    \itemL{21}{27}{x}{\Stima}{UGH enhancement 2}{0:3:6}
         The UGH software that is able to generate a micro-architecture without the
         variable binding currently done by the designer.

anr/task-5.tex

@@ -58 +58 @@
         \setMacroInAuxFile{hpcMutekDriver}
         The FPGA-SoC part of the communication API, a driver.
-    \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:0:0}
+    \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:3:0}
         Port of the {\hpcMutekDriver} driver on the DNA OS.
     \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1}
@@ -66 +66 @@
     architectural template for using the PCI/X IP of \altera and \xilinx.
     \begin{livrable}
-    \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{0:0:0}
+    \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{3:9:0}
         \setMacroInAuxFile{hpcPlbBridge}
         The synthesizable VHDL description of a PLB/VCI bridge and its corresponding SystemC model.
@@ -77 +77 @@
 
     \begin{livrable}
-    \itemL{18}{36}{x}{\Supmc}{CSG support for \ganttlf dynamic reconfiguration}
+    \itemL{18}{36}{x}{\Stima}{CSG support for \ganttlf dynamic reconfiguration}{0:8:12}
         Extension of the \xilinx architectural template ({\csgAllArch})
 in order to integrate dynamic partial reconfiguration regions.
 Modification of CSG software to support the extended \xilinx template.
-    \itemL{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}{0:0:0}
+    \itemL{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}{0:2:3}
         \setMacroInAuxFile{hpcDynconfDriver}
         The drivers required by the DNA OS in order to manage dynamic partial reconfiguration inside the SoC-FPGA.
     \itemL{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers}{0:0:1}
         Port of the {\hpcDynconfDriver} drivers on the MUTEK OS.
-    \itemL{18}{36}{x}{\Stima}{HPC support for \ganttlf dynamic reconfiguration}{0:0:2}
+    \itemL{24}{36}{x}{\Stima}{HPC profiler for \ganttlf dynamic reconfiguration}{0:0:6}
 Extension of the HPC partionning helper in order to integrate dynamic partial reconfiguration dedicated features
 (reconfiguration time of regions, variable number of coprocessors)