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source: soft/giet_vm/giet_python/mapping.py @ 551

Last change on this file since 551 was 546, checked in by alain, 10 years ago
Replace the "SPI" name by "SDC" for the third disk controller type (beside BDV and HBA).
Property svn:executable set to ``*
File size: 100.0 KB

Rev	Line
[425]	1	#!/usr/bin/env python
[305]	2
[319]	3	import sys
	4
[539]	5	###################################################################################
[305]	6	# file : giet_mapping.py
	7	# date : april 2014
	8	# author : Alain Greiner
[539]	9	###################################################################################
[319]	10	# This file contains the classes required to define a mapping for the GIET_VM.
	11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
[520]	12	# a set of 'Vseg' (kernel glogals virtual segments)
	13	# a set of 'Vspace' (one or several user applications)
[512]	14	# - A 'Cluster' contains a set of 'Pseg' (physical segments in cluster)
[319]	15	# a set of 'Proc' (processors in cluster)
	16	# a set of 'Periph' (peripherals in cluster)
[512]	17	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments)
	18	# a set of 'Task' (user parallel tasks)
[441]	19	# - A 'Periph' contains a set of 'Irq' (only for XCU and PIC types )
[539]	20	###################################################################################
[319]	21	# Implementation Note
[512]	22	# The objects used to describe a mapping are distributed in the PYTHON structure:
[319]	23	# For example the psegs set is split in several subsets (one subset per cluster),
	24	# or the tasks set is split in several subsets (one subset per vspace), etc...
	25	# In the C binary data structure used by the giet_vm, all objects of same type
[406]	26	# are stored in a linear array (one single array for all psegs for example).
[539]	27	# For all objects, we compute and store in the PYTHON object a "global index"
[406]	28	# corresponding to the index in this global array, and this index can be used as
[319]	29	# a pseudo-pointer to identify a specific object of a given type.
[539]	30	###################################################################################
[305]	31
[539]	32	###################################################################################
[411]	33	# Various constants
[539]	34	###################################################################################
[411]	35
	36	PADDR_WIDTH = 40 # number of bits for physical address
	37	X_WIDTH = 4 # number of bits encoding x coordinate
	38	Y_WIDTH = 4 # number of bits encoding y coordinate
	39	P_WIDTH = 4 # number of bits encoding local proc_id
[539]	40	VPN_ANTI_MASK = 0x00000FFF # mask vaddr to get offset in small page
	41	BPN_MASK = 0xFFE00000 # mask vaddr to get the BPN in big page
	42	PERI_INCREMENT = 0x10000 # virtual address increment for replicated vsegs
[411]	43	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
[539]	44	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C BLOB
[411]	45
[539]	46	###################################################################################
[520]	47	# These lists must be consistent with values defined in
	48	# mapping_info.h / xml_driver.c /xml_parser.c
[539]	49	###################################################################################
[319]	50	PERIPHTYPES = [
	51	'CMA',
	52	'DMA',
	53	'FBF',
	54	'IOB',
	55	'IOC',
	56	'MMC',
	57	'MWR',
	58	'NIC',
	59	'ROM',
	60	'SIM',
	61	'TIM',
	62	'TTY',
	63	'XCU',
	64	'PIC',
[491]	65	'DROM',
[319]	66	]
	67
[520]	68	IOCSUBTYPES = [
[319]	69	'BDV',
	70	'HBA',
[546]	71	'SDC',
[319]	72	]
	73
[520]	74	MWRSUBTYPES = [
	75	'GCD',
	76	'DCT',
	77	]
	78
[539]	79	###################################################################################
[520]	80	# These lists must be consistent with values defined in
	81	# irq_handler.c / irq_handler.h / xml_driver.c / xml_parser.c
[539]	82	###################################################################################
[319]	83	IRQTYPES = [
	84	'HWI',
	85	'WTI',
	86	'PTI',
	87	]
	88
	89	ISRTYPES = [
	90	'ISR_DEFAULT',
	91	'ISR_TICK',
	92	'ISR_TTY_RX',
	93	'ISR_TTY_TX',
	94	'ISR_BDV',
	95	'ISR_TIMER',
	96	'ISR_WAKUP',
	97	'ISR_NIC_RX',
	98	'ISR_NIC_TX',
	99	'ISR_CMA',
	100	'ISR_MMC',
	101	'ISR_DMA',
[546]	102	'ISR_SDC',
[532]	103	'ISR_MWR',
	104	'ISR_HBA',
[319]	105	]
	106
[512]	107	VSEGTYPES = [
[319]	108	'ELF',
	109	'BLOB',
	110	'PTAB',
	111	'PERI',
	112	'BUFFER',
[512]	113	'SCHED',
[471]	114	'HEAP',
[319]	115	]
	116
	117	VSEGMODES = [
	118	'____',
	119	'___U',
	120	'__W_',
	121	'__WU',
	122	'_X__',
	123	'_X_U',
	124	'_XW_',
	125	'_XWU',
	126	'C___',
	127	'C__U',
	128	'C_W_',
	129	'C_WU',
	130	'CX__',
	131	'CX_U',
	132	'CXW_',
	133	'CXWU',
	134	]
	135
	136	PSEGTYPES = [
	137	'RAM',
	138	'PERI',
	139	]
	140
[539]	141	###################################################################################
[305]	142	class Mapping( object ):
[539]	143	###################################################################################
[305]	144	def __init__( self,
[411]	145	name, # mapping name
	146	x_size, # number of clusters in a row
	147	y_size, # number of clusters in a column
[421]	148	nprocs, # max number of processors per cluster
[411]	149	x_width = X_WIDTH, # number of bits encoding x coordinate
	150	y_width = Y_WIDTH, # number of bits encoding y coordinate
[512]	151	p_width = P_WIDTH, # number of bits encoding lpid
[411]	152	paddr_width = PADDR_WIDTH, # number of bits for physical address
[512]	153	coherence = 1, # hardware cache coherence if non-zero
[411]	154	irq_per_proc = 1, # number or IRQs from XCU to processor
	155	use_ramdisk = False, # use ramdisk when true
	156	x_io = 0, # cluster_io x coordinate
	157	y_io = 0, # cluster_io y coordinate
	158	peri_increment = PERI_INCREMENT, # address increment for globals
	159	reset_address = RESET_ADDRESS, # Processor wired boot_address
	160	ram_base = 0, # RAM physical base in cluster[0,0]
[539]	161	ram_size = 0 ): # RAM size per cluster (bytes)
[305]	162
[411]	163	assert ( x_size <= (1<<X_WIDTH) )
	164	assert ( y_size <= (1<<Y_WIDTH) )
	165	assert ( nprocs <= (1<<P_WIDTH) )
[406]	166
[411]	167	self.signature = MAPPING_SIGNATURE
[319]	168	self.name = name
[497]	169	self.name = name
[406]	170	self.paddr_width = paddr_width
[319]	171	self.coherence = coherence
	172	self.x_size = x_size
	173	self.y_size = y_size
[441]	174	self.nprocs = nprocs
[319]	175	self.x_width = x_width
	176	self.y_width = y_width
[406]	177	self.p_width = p_width
[319]	178	self.irq_per_proc = irq_per_proc
	179	self.use_ramdisk = use_ramdisk
	180	self.x_io = x_io
	181	self.y_io = y_io
[328]	182	self.peri_increment = peri_increment
[319]	183	self.reset_address = reset_address
[356]	184	self.ram_base = ram_base
	185	self.ram_size = ram_size
[305]	186
[319]	187	self.total_vspaces = 0
	188	self.total_globals = 0
	189	self.total_psegs = 0
	190	self.total_vsegs = 0
	191	self.total_tasks = 0
	192	self.total_procs = 0
	193	self.total_irqs = 0
	194	self.total_periphs = 0
[305]	195
[319]	196	self.clusters = []
	197	self.globs = []
	198	self.vspaces = []
[305]	199
[319]	200	for x in xrange( self.x_size ):
	201	for y in xrange( self.y_size ):
	202	cluster = Cluster( x , y )
[406]	203	cluster.index = (x * self.y_size) + y
[319]	204	self.clusters.append( cluster )
[305]	205
	206	return
	207
[319]	208	########################## add a ram pseg in a cluster
[406]	209	def addRam( self,
[319]	210	name, # pseg name
	211	base, # pseg base address
	212	size ): # pseg length (bytes)
[406]	213
[497]	214	# computes cluster index and coordinates from the base address
[356]	215	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
	216	cluster_xy = base >> paddr_lsb_width
[497]	217	x = cluster_xy >> (self.y_width);
	218	y = cluster_xy & ((1 << self.y_width) - 1)
	219	cluster_id = (x * self.y_size) + y
[305]	220
[411]	221	assert (base & VPN_ANTI_MASK) == 0
[319]	222
	223	assert (x < self.x_size) and (y < self.y_size)
[406]	224
[356]	225	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
	226
	227	assert ( size == self.ram_size )
	228
[319]	229	# add one pseg in the mapping
	230	pseg = Pseg( name, base, size, x, y, 'RAM' )
	231	self.clusters[cluster_id].psegs.append( pseg )
	232	pseg.index = self.total_psegs
	233	self.total_psegs += 1
	234
	235	return pseg
	236
[512]	237	########################## add a peripheral and the associated pseg in a cluster
[406]	238	def addPeriph( self,
[319]	239	name, # associated pseg name
	240	base, # associated pseg base address
	241	size, # associated pseg length (bytes)
[406]	242	ptype, # peripheral type
[319]	243	subtype = 'NONE', # peripheral subtype
	244	channels = 1, # number of channels
[520]	245	arg0 = 0, # optional argument (semantic depends on ptype)
	246	arg1 = 0, # optional argument (semantic depends on ptype)
	247	arg2 = 0, # optional argument (semantic depends on ptype)
	248	arg3 = 0 ): # optional argument (semantic depends on ptype)
[319]	249
[497]	250	# computes cluster index and coordinates from the base address
[319]	251	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
[497]	252	x = cluster_xy >> (self.y_width);
	253	y = cluster_xy & ((1 << self.y_width) - 1)
	254	cluster_id = (x * self.y_size) + y
[305]	255
[319]	256	assert (x < self.x_size) and (y < self.y_size)
	257
[411]	258	assert (base & VPN_ANTI_MASK) == 0
[319]	259
	260	assert ptype in PERIPHTYPES
	261
[520]	262	if (ptype == 'IOC'): assert subtype in IOCSUBTYPES
	263	if (ptype == 'MWR'): assert subtype in MWRSUBTYPES
[319]	264
	265	# add one pseg into mapping
	266	pseg = Pseg( name, base, size, x, y, 'PERI' )
	267	self.clusters[cluster_id].psegs.append( pseg )
	268	pseg.index = self.total_psegs
	269	self.total_psegs += 1
	270
	271	# add one periph into mapping
[520]	272	periph = Periph( pseg, ptype, subtype, channels, arg0, arg1, arg2, arg3 )
[319]	273	self.clusters[cluster_id].periphs.append( periph )
	274	periph.index = self.total_periphs
	275	self.total_periphs += 1
	276
	277	return periph
	278
	279	################################ add an IRQ in a peripheral
	280	def addIrq( self,
	281	periph, # peripheral containing IRQ (PIC or XCU)
	282	index, # peripheral input port index
	283	isrtype, # ISR type
	284	channel = 0 ): # channel for multi-channels ISR
	285
	286	assert isrtype in ISRTYPES
	287
	288	assert index < 32
	289
[406]	290	# add one irq into mapping
[319]	291	irq = Irq( 'HWI', index , isrtype, channel )
	292	periph.irqs.append( irq )
	293	irq.index = self.total_irqs
	294	self.total_irqs += 1
	295
	296	return irq
	297
	298	########################## add a processor in a cluster
[406]	299	def addProc( self,
[319]	300	x, # cluster x coordinate
	301	y, # cluster y coordinate
[520]	302	lpid ): # processor local index
[319]	303
	304	assert (x < self.x_size) and (y < self.y_size)
	305
	306	cluster_id = (x * self.y_size) + y
	307
[406]	308	# add one proc into mapping
[520]	309	proc = Processor( x, y, lpid )
[319]	310	self.clusters[cluster_id].procs.append( proc )
	311	proc.index = self.total_procs
[305]	312	self.total_procs += 1
	313
[319]	314	return proc
	315
[411]	316	############################ add one global vseg into mapping
	317	def addGlobal( self,
	318	name, # vseg name
	319	vbase, # virtual base address
[512]	320	length, # vseg length (bytes)
[411]	321	mode, # CXWU flags
[512]	322	vtype, # vseg type
[411]	323	x, # destination x coordinate
	324	y, # destination y coordinate
	325	pseg, # destination pseg name
	326	identity = False, # identity mapping required if true
	327	local = False, # only mapped in local PTAB if true
[512]	328	big = False, # to be mapped in a big physical page
	329	binpath = '' ): # pathname for binary code if required
[319]	330
[411]	331	# two global vsegs must not overlap if they have different names
	332	for prev in self.globs:
[512]	333	if ( ((prev.vbase + prev.length) > vbase ) and
	334	((vbase + length) > prev.vbase) and
[546]	335	(prev.name[0:15] != name[0:15]) ):
[512]	336	print '[genmap error] in addGlobal()'
	337	print ' global vseg %s overlap %s' % (name, prev.name)
[546]	338	print ' %s : base = %x / size = %x' %(name, vbase, length)
	339	print ' %s : base = %x / size = %x' %(prev.name, prev.vbase, prev.length)
[411]	340	sys.exit(1)
	341
[328]	342	# add one vseg into mapping
[512]	343	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	344	identity = identity, local = local, big = big, binpath = binpath )
[348]	345
[328]	346	self.globs.append( vseg )
	347	self.total_globals += 1
[406]	348	vseg.index = self.total_vsegs
[328]	349	self.total_vsegs += 1
[406]	350
[305]	351	return
	352
[319]	353	################################ add a vspace into mapping
[406]	354	def addVspace( self,
[319]	355	name, # vspace name
[512]	356	startname ): # name of vseg containing start_vector
[319]	357
	358	# add one vspace into mapping
	359	vspace = Vspace( name, startname )
[305]	360	self.vspaces.append( vspace )
[319]	361	vspace.index = self.total_vspaces
	362	self.total_vspaces += 1
	363
	364	return vspace
[406]	365
[512]	366	################################# add a private vseg in a vspace
[319]	367	def addVseg( self,
[406]	368	vspace, # vspace containing the vseg
[319]	369	name, # vseg name
	370	vbase, # virtual base address
[512]	371	length, # vseg length (bytes)
[319]	372	mode, # CXWU flags
[512]	373	vtype, # vseg type
[319]	374	x, # destination x coordinate
	375	y, # destination y coordinate
	376	pseg, # destination pseg name
[411]	377	local = False, # only mapped in local PTAB if true
[512]	378	big = False, # to be mapped in a big physical page
	379	binpath = '' ): # pathname for binary code
[319]	380
	381	assert mode in VSEGMODES
	382
[512]	383	assert vtype in VSEGTYPES
[319]	384
	385	assert (x < self.x_size) and (y < self.y_size)
	386
	387	# add one vseg into mapping
[512]	388	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	389	identity = False, local = local, big = big, binpath = binpath )
[319]	390	vspace.vsegs.append( vseg )
	391	vseg.index = self.total_vsegs
	392	self.total_vsegs += 1
	393
	394	return vseg
	395
[406]	396	################################ add a task in a vspace
	397	def addTask( self,
[319]	398	vspace, # vspace containing task
	399	name, # task name
	400	trdid, # task index in vspace
	401	x, # destination x coordinate
	402	y, # destination y coordinate
	403	lpid, # destination processor local index
[512]	404	stackname, # name of vseg containing stack
	405	heapname, # name of vseg containing heap
[441]	406	startid ): # index in start_vector
[406]	407
[319]	408	assert (x < self.x_size) and (y < self.y_size)
[411]	409	assert lpid < self.nprocs
[319]	410
[406]	411	# add one task into mapping
[441]	412	task = Task( name, trdid, x, y, lpid, stackname, heapname, startid )
[319]	413	vspace.tasks.append( task )
	414	task.index = self.total_tasks
	415	self.total_tasks += 1
	416
	417	return task
	418
	419	#################################
	420	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	421
	422	byte_stream = bytearray()
	423	length = len( s )
	424	if length < (nbytes - 1):
	425	for b in s:
	426	byte_stream.append( b )
	427	for x in xrange(nbytes-length):
	428	byte_stream.append( '\0' )
	429	else:
[512]	430	print '[genmap error] in str2bytes()'
	431	print ' string %s too long' % s
[319]	432	sys.exit(1)
	433
	434	return byte_stream
	435
	436	###################################
[406]	437	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
[319]	438
	439	byte_stream = bytearray()
	440	for n in xrange( nbytes ):
	441	byte_stream.append( (val >> (n<<3)) & 0xFF )
	442
	443	return byte_stream
	444
[512]	445	################
[411]	446	def xml( self ): # compute string for map.xml file generation
[319]	447
[305]	448	s = '<?xml version="1.0"?>\n\n'
[319]	449	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
[305]	450	s += ' name = "%s"\n' % (self.name)
	451	s += ' x_size = "%d"\n' % (self.x_size)
	452	s += ' y_size = "%d"\n' % (self.y_size)
	453	s += ' x_width = "%d"\n' % (self.x_width)
	454	s += ' y_width = "%d"\n' % (self.y_width)
	455	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
[319]	456	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
[305]	457	s += ' x_io = "%d"\n' % (self.x_io)
	458	s += ' y_io = "%d" >\n' % (self.y_io)
[319]	459	s += '\n'
	460
[305]	461	s += ' <clusterset>\n'
	462	for x in xrange ( self.x_size ):
	463	for y in xrange ( self.y_size ):
[406]	464	cluster_id = (x * self.y_size) + y
[319]	465	s += self.clusters[cluster_id].xml()
[305]	466	s += ' </clusterset>\n'
[319]	467	s += '\n'
	468
[305]	469	s += ' <globalset>\n'
[319]	470	for vseg in self.globs: s += vseg.xml()
[305]	471	s += ' </globalset>\n'
[319]	472	s += '\n'
	473
[305]	474	s += ' <vspaceset>\n'
[319]	475	for vspace in self.vspaces: s += vspace.xml()
[305]	476	s += ' </vspaceset>\n'
[319]	477
[305]	478	s += '</mapping_info>\n'
	479	return s
[319]	480
[512]	481	##########################
[411]	482	def cbin( self, verbose ): # C binary structure for map.bin file generation
[319]	483
	484	byte_stream = bytearray()
	485
	486	# header
	487	byte_stream += self.int2bytes(4, self.signature)
[406]	488	byte_stream += self.int2bytes(4, self.x_size)
	489	byte_stream += self.int2bytes(4, self.y_size)
	490	byte_stream += self.int2bytes(4, self.x_width)
	491	byte_stream += self.int2bytes(4, self.y_width)
	492	byte_stream += self.int2bytes(4, self.x_io)
	493	byte_stream += self.int2bytes(4, self.y_io)
	494	byte_stream += self.int2bytes(4, self.irq_per_proc)
	495	byte_stream += self.int2bytes(4, self.use_ramdisk)
	496	byte_stream += self.int2bytes(4, self.total_globals)
	497	byte_stream += self.int2bytes(4, self.total_vspaces)
	498	byte_stream += self.int2bytes(4, self.total_psegs)
	499	byte_stream += self.int2bytes(4, self.total_vsegs)
	500	byte_stream += self.int2bytes(4, self.total_tasks)
	501	byte_stream += self.int2bytes(4, self.total_procs)
	502	byte_stream += self.int2bytes(4, self.total_irqs)
	503	byte_stream += self.int2bytes(4, self.total_periphs)
[546]	504	byte_stream += self.str2bytes(64, self.name)
[319]	505
	506	if ( verbose ):
[406]	507	print '\n'
[319]	508	print 'name = %s' % self.name
	509	print 'signature = %x' % self.signature
	510	print 'x_size = %d' % self.x_size
	511	print 'y_size = %d' % self.y_size
	512	print 'x_width = %d' % self.x_width
	513	print 'y_width = %d' % self.y_width
[406]	514	print 'x_io = %d' % self.x_io
	515	print 'y_io = %d' % self.y_io
[319]	516	print 'irq_per_proc = %d' % self.irq_per_proc
	517	print 'use_ramdisk = %d' % self.use_ramdisk
	518	print 'total_globals = %d' % self.total_globals
[406]	519	print 'total_psegs = %d' % self.total_psegs
	520	print 'total_vsegs = %d' % self.total_vsegs
	521	print 'total_tasks = %d' % self.total_tasks
	522	print 'total_procs = %d' % self.total_procs
	523	print 'total_irqs = %d' % self.total_irqs
[319]	524	print 'total_periphs = %d' % self.total_periphs
[406]	525	print '\n'
[319]	526
	527	# clusters array
	528	index = 0
	529	for cluster in self.clusters:
	530	byte_stream += cluster.cbin( self, verbose, index )
	531	index += 1
	532
	533	if ( verbose ): print '\n'
	534
	535	# psegs array
	536	index = 0
	537	for cluster in self.clusters:
[406]	538	for pseg in cluster.psegs:
[319]	539	byte_stream += pseg.cbin( self, verbose, index, cluster )
	540	index += 1
	541
	542	if ( verbose ): print '\n'
	543
	544	# vspaces array
	545	index = 0
[406]	546	for vspace in self.vspaces:
	547	byte_stream += vspace.cbin( self, verbose, index )
[319]	548	index += 1
	549
	550	if ( verbose ): print '\n'
	551
	552	# vsegs array
	553	index = 0
	554	for vseg in self.globs:
	555	byte_stream += vseg.cbin( self, verbose, index )
	556	index += 1
	557	for vspace in self.vspaces:
[406]	558	for vseg in vspace.vsegs:
[319]	559	byte_stream += vseg.cbin( self, verbose, index )
	560	index += 1
	561
	562	if ( verbose ): print '\n'
	563
	564	# tasks array
	565	index = 0
	566	for vspace in self.vspaces:
[406]	567	for task in vspace.tasks:
[319]	568	byte_stream += task.cbin( self, verbose, index, vspace )
	569	index += 1
	570
	571	if ( verbose ): print '\n'
	572
	573	# procs array
	574	index = 0
	575	for cluster in self.clusters:
[406]	576	for proc in cluster.procs:
[319]	577	byte_stream += proc.cbin( self, verbose, index )
	578	index += 1
[406]	579
[319]	580	if ( verbose ): print '\n'
	581
	582	# irqs array
[406]	583	index = 0
[319]	584	for cluster in self.clusters:
	585	for periph in cluster.periphs:
	586	for irq in periph.irqs:
	587	byte_stream += irq.cbin( self, verbose, index )
	588	index += 1
	589
	590	if ( verbose ): print '\n'
	591
	592	# periphs array
	593	index = 0
	594	for cluster in self.clusters:
[406]	595	for periph in cluster.periphs:
[319]	596	byte_stream += periph.cbin( self, verbose, index )
	597	index += 1
	598
	599	return byte_stream
	600	# end of cbin()
[406]	601
[539]	602	#######################################################################
	603	def giet_vsegs( self ): # compute string for giet_vsegs.ld file
[319]	604	# required by giet_vm compilation
	605
[406]	606	# search the vsegs required for the giet_vsegs.ld
[319]	607	boot_code_found = False
	608	boot_data_found = False
	609	kernel_uncdata_found = False
	610	kernel_data_found = False
	611	kernel_code_found = False
	612	kernel_init_found = False
	613	for vseg in self.globs:
[348]	614
[539]	615	if ( vseg.name[0:13] == 'seg_boot_code' ):
[406]	616	boot_code_vbase = vseg.vbase
[512]	617	boot_code_size = vseg.length
[319]	618	boot_code_found = True
	619
[539]	620	if ( vseg.name[0:13] == 'seg_boot_data' ):
[406]	621	boot_data_vbase = vseg.vbase
[512]	622	boot_data_size = vseg.length
[319]	623	boot_data_found = True
	624
[539]	625	if ( vseg.name[0:15] == 'seg_kernel_data' ):
[406]	626	kernel_data_vbase = vseg.vbase
[512]	627	kernel_data_size = vseg.length
[319]	628	kernel_data_found = True
	629
[539]	630	if ( vseg.name[0:15] == 'seg_kernel_code' ):
[406]	631	kernel_code_vbase = vseg.vbase
[512]	632	kernel_code_size = vseg.length
[319]	633	kernel_code_found = True
	634
[539]	635	if ( vseg.name[0:15] == 'seg_kernel_init' ):
[406]	636	kernel_init_vbase = vseg.vbase
[512]	637	kernel_init_size = vseg.length
[319]	638	kernel_init_found = True
	639
	640	# check if all required vsegs have been found
[406]	641	if ( boot_code_found == False ):
[512]	642	print '[genmap error] in giet_vsegs()'
	643	print ' seg_boot_code vseg missing'
[319]	644	sys.exit()
	645
[406]	646	if ( boot_data_found == False ):
[512]	647	print '[genmap error] in giet_vsegs()'
	648	print ' seg_boot_data vseg missing'
[319]	649	sys.exit()
	650
[406]	651	if ( kernel_data_found == False ):
[512]	652	print '[genmap error] in giet_vsegs()'
	653	print ' seg_kernel_data vseg missing'
[319]	654	sys.exit()
	655
	656	if ( kernel_code_found == False ):
[512]	657	print '[genmap error] in giet_vsegs()'
	658	print ' seg_kernel_code vseg missing'
[319]	659	sys.exit()
	660
	661	if ( kernel_init_found == False ):
[512]	662	print '[genmap error] in giet_vsegs()'
	663	print ' seg_kernel_init vseg missing'
[319]	664	sys.exit()
	665
	666	# build string
[406]	667	s = '/* Generated by genmap for %s */\n' % self.name
[319]	668	s += '\n'
	669
[406]	670	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
	671	s += 'boot_code_size = 0x%x;\n' % boot_code_size
[319]	672	s += '\n'
[406]	673	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
	674	s += 'boot_data_size = 0x%x;\n' % boot_data_size
[319]	675	s += '\n'
[406]	676	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
	677	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
[319]	678	s += '\n'
[406]	679	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
	680	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
[319]	681	s += '\n'
[406]	682	s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase
	683	s += 'kernel_init_size = 0x%x;\n' % kernel_init_size
[319]	684	s += '\n'
	685
	686	return s
[406]	687
[539]	688	######################################################################
	689	def hard_config( self ): # compute string for hard_config.h file
[411]	690	# required by
[319]	691	# - top.cpp compilation
	692	# - giet_vm compilation
	693	# - tsar_preloader compilation
	694
	695	nb_total_procs = 0
	696
	697	# for each peripheral type, define default values
[406]	698	# for pbase address, size, number of components, and channels
[319]	699	nb_cma = 0
	700	cma_channels = 0
	701	seg_cma_base = 0xFFFFFFFF
	702	seg_cma_size = 0
	703
	704	nb_dma = 0
	705	dma_channels = 0
	706	seg_dma_base = 0xFFFFFFFF
	707	seg_dma_size = 0
	708
	709	nb_fbf = 0
	710	fbf_channels = 0
	711	seg_fbf_base = 0xFFFFFFFF
	712	seg_fbf_size = 0
[520]	713	fbf_arg0 = 0
	714	fbf_arg1 = 0
[319]	715
	716	nb_iob = 0
	717	iob_channels = 0
	718	seg_iob_base = 0xFFFFFFFF
	719	seg_iob_size = 0
	720
	721	nb_ioc = 0
	722	ioc_channels = 0
	723	seg_ioc_base = 0xFFFFFFFF
	724	seg_ioc_size = 0
	725
	726	nb_mmc = 0
	727	mmc_channels = 0
	728	seg_mmc_base = 0xFFFFFFFF
	729	seg_mmc_size = 0
	730
	731	nb_mwr = 0
	732	mwr_channels = 0
	733	seg_mwr_base = 0xFFFFFFFF
	734	seg_mwr_size = 0
[520]	735	mwr_arg0 = 0
	736	mwr_arg1 = 0
	737	mwr_arg2 = 0
	738	mwr_arg3 = 0
[319]	739
	740	nb_nic = 0
	741	nic_channels = 0
	742	seg_nic_base = 0xFFFFFFFF
	743	seg_nic_size = 0
	744
	745	nb_pic = 0
	746	pic_channels = 0
	747	seg_pic_base = 0xFFFFFFFF
	748	seg_pic_size = 0
	749
	750	nb_rom = 0
	751	rom_channels = 0
	752	seg_rom_base = 0xFFFFFFFF
	753	seg_rom_size = 0
	754
	755	nb_sim = 0
	756	sim_channels = 0
	757	seg_sim_base = 0xFFFFFFFF
	758	seg_sim_size = 0
	759
	760	nb_tim = 0
	761	tim_channels = 0
	762	seg_tim_base = 0xFFFFFFFF
	763	seg_tim_size = 0
	764
	765	nb_tty = 0
	766	tty_channels = 0
	767	seg_tty_base = 0xFFFFFFFF
	768	seg_tty_size = 0
	769
	770	nb_xcu = 0
	771	xcu_channels = 0
	772	seg_xcu_base = 0xFFFFFFFF
	773	seg_xcu_size = 0
[520]	774	xcu_arg0 = 0
[319]	775
[491]	776	nb_drom = 0
	777	drom_channels = 0
	778	seg_drom_base = 0xFFFFFFFF
	779	seg_drom_size = 0
	780
[319]	781	use_bdv = False
[546]	782	use_sdc = False
[319]	783	use_hba = False
	784
	785	# get peripherals attributes
	786	for cluster in self.clusters:
	787	for periph in cluster.periphs:
[406]	788	if ( periph.ptype == 'CMA' ):
[319]	789	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
	790	seg_cma_size = periph.pseg.size
	791	cma_channels = periph.channels
	792	nb_cma +=1
	793
[406]	794	elif ( periph.ptype == 'DMA' ):
	795	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
[319]	796	seg_dma_size = periph.pseg.size
	797	dma_channels = periph.channels
	798	nb_dma +=1
	799
[406]	800	elif ( periph.ptype == 'FBF' ):
[319]	801	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
	802	seg_fbf_size = periph.pseg.size
	803	fbf_channels = periph.channels
[520]	804	fbf_arg0 = periph.arg0
	805	fbf_arg1 = periph.arg1
[319]	806	nb_fbf +=1
	807
	808	elif ( periph.ptype == 'IOB' ):
	809	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
	810	seg_iob_size = periph.pseg.size
	811	iob_channels = periph.channels
	812	nb_iob +=1
	813
[406]	814	elif ( periph.ptype == 'IOC' ):
[319]	815	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
	816	seg_ioc_size = periph.pseg.size
	817	ioc_channels = periph.channels
	818	nb_ioc += 1
[404]	819
	820	if self.use_ramdisk: continue
	821
[319]	822	if ( periph.subtype == 'BDV' ): use_bdv = True
	823	elif ( periph.subtype == 'HBA' ): use_hba = True
[546]	824	elif ( periph.subtype == 'SDC' ): use_sdc = True
[319]	825
	826	elif ( periph.ptype == 'MMC' ):
	827	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
	828	seg_mmc_size = periph.pseg.size
	829	mmc_channels = periph.channels
	830	nb_mmc +=1
	831
	832	elif ( periph.ptype == 'MWR' ):
	833	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
[520]	834	seg_mwr_size = periph.pseg.size
[319]	835	mwr_channels = periph.channels
[520]	836	mwr_arg0 = periph.arg0
	837	mwr_arg1 = periph.arg1
	838	mwr_arg2 = periph.arg2
	839	mwr_arg3 = periph.arg3
[319]	840	nb_mwr +=1
	841
	842	elif ( periph.ptype == 'ROM' ):
	843	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
	844	seg_rom_size = periph.pseg.size
	845	rom_channels = periph.channels
	846	nb_rom +=1
	847
[491]	848	elif ( periph.ptype == 'DROM' ):
	849	seg_drom_base = periph.pseg.base & 0xFFFFFFFF
	850	seg_drom_size = periph.pseg.size
	851	drom_channels = periph.channels
	852	nb_drom +=1
	853
[319]	854	elif ( periph.ptype == 'SIM' ):
	855	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
	856	seg_sim_size = periph.pseg.size
	857	sim_channels = periph.channels
	858	nb_sim +=1
	859
[406]	860	elif ( periph.ptype == 'NIC' ):
[319]	861	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
	862	seg_nic_size = periph.pseg.size
	863	nic_channels = periph.channels
	864	nb_nic +=1
	865
[406]	866	elif ( periph.ptype == 'PIC' ):
[319]	867	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
	868	seg_pic_size = periph.pseg.size
	869	pic_channels = periph.channels
	870	nb_pic +=1
[406]	871
	872	elif ( periph.ptype == 'TIM' ):
[319]	873	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
	874	seg_tim_size = periph.pseg.size
	875	tim_channels = periph.channels
	876	nb_tim +=1
[406]	877
[319]	878	elif ( periph.ptype == 'TTY' ):
	879	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
	880	seg_tty_size = periph.pseg.size
	881	tty_channels = periph.channels
	882	nb_tty +=1
[406]	883
	884	elif ( periph.ptype == 'XCU' ):
[319]	885	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
	886	seg_xcu_size = periph.pseg.size
	887	xcu_channels = periph.channels
[520]	888	xcu_arg0 = periph.arg0
[537]	889	xcu_arg1 = periph.arg1
	890	xcu_arg2 = periph.arg2
[319]	891	nb_xcu +=1
[406]	892
[319]	893	# no more than two access to external peripherals
[406]	894	assert ( nb_fbf <= 2 )
	895	assert ( nb_cma <= 2 )
	896	assert ( nb_ioc <= 2 )
	897	assert ( nb_nic <= 2 )
	898	assert ( nb_tim <= 2 )
	899	assert ( nb_tty <= 2 )
[319]	900	assert ( nb_pic <= 2 )
	901
	902	# one and only one type of IOC controller
[403]	903	nb_iocs = 0
	904	if use_hba : nb_iocs += 1
	905	if use_bdv : nb_iocs += 1
[546]	906	if use_sdc : nb_iocs += 1
[403]	907	if self.use_ramdisk: nb_iocs += 1
	908	assert ( nb_iocs == 1 )
[404]	909
[319]	910	# Compute total number of processors
	911	for cluster in self.clusters:
	912	nb_total_procs += len( cluster.procs )
	913
	914	# Compute physical addresses for BOOT vsegs
	915	boot_mapping_found = False
	916	boot_code_found = False
	917	boot_data_found = False
	918	boot_stack_found = False
	919
	920	for vseg in self.globs:
	921	if ( vseg.name == 'seg_boot_mapping' ):
[406]	922	boot_mapping_base = vseg.vbase
[512]	923	boot_mapping_size = vseg.length
[348]	924	boot_mapping_identity = vseg.identity
[319]	925	boot_mapping_found = True
	926
	927	if ( vseg.name == 'seg_boot_code' ):
[406]	928	boot_code_base = vseg.vbase
[512]	929	boot_code_size = vseg.length
[348]	930	boot_code_identity = vseg.identity
[319]	931	boot_code_found = True
	932
[406]	933	if ( vseg.name == 'seg_boot_data' ):
	934	boot_data_base = vseg.vbase
[512]	935	boot_data_size = vseg.length
[348]	936	boot_data_identity = vseg.identity
[319]	937	boot_data_found = True
	938
	939	if ( vseg.name == 'seg_boot_stack' ):
[406]	940	boot_stack_base = vseg.vbase
[512]	941	boot_stack_size = vseg.length
[348]	942	boot_stack_identity = vseg.identity
[319]	943	boot_stack_found = True
	944
[328]	945	# check that BOOT vsegs are found and identity mapping
[348]	946	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
[512]	947	print '[genmap error] in hard_config()'
	948	print ' seg_boot_mapping missing or not identity mapping'
[319]	949	sys.exit()
	950
[406]	951	if ( (boot_code_found == False) or (boot_code_identity == False) ):
[512]	952	print '[genmap error] in hard_config()'
	953	print ' seg_boot_code missing or not identity mapping'
[319]	954	sys.exit()
	955
[406]	956	if ( (boot_data_found == False) or (boot_data_identity == False) ):
[512]	957	print '[genmap error] in hard_config()'
	958	print ' seg_boot_data missing or not identity mapping'
[319]	959	sys.exit()
	960
[348]	961	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
[512]	962	print '[genmap error] in giet_vsegs()'
	963	print ' seg_boot_stask missing or not identity mapping'
[319]	964	sys.exit()
	965
	966	# Search RAMDISK global vseg if required
	967	seg_rdk_base = 0xFFFFFFFF
	968	seg_rdk_size = 0
	969	seg_rdk_found = False
	970
	971	if self.use_ramdisk:
	972	for vseg in self.globs:
[497]	973	if ( vseg.name == 'seg_ramdisk' ):
[319]	974	seg_rdk_base = vseg.vbase
[512]	975	seg_rdk_size = vseg.length
[319]	976	seg_rdk_found = True
	977
	978	if ( seg_rdk_found == False ):
	979	print 'Error in hard_config() "seg_ramdisk" not found'
	980	sys.exit(1)
	981
	982	# build string
[406]	983	s = '/* Generated by genmap for %s */\n' % self.name
[319]	984	s += '\n'
	985	s += '#ifndef HARD_CONFIG_H\n'
	986	s += '#define HARD_CONFIG_H\n'
	987	s += '\n'
	988
[406]	989	s += '/* General platform parameters */\n'
[319]	990	s += '\n'
	991	s += '#define X_SIZE %d\n' % self.x_size
	992	s += '#define Y_SIZE %d\n' % self.y_size
	993	s += '#define X_WIDTH %d\n' % self.x_width
	994	s += '#define Y_WIDTH %d\n' % self.y_width
[406]	995	s += '#define P_WIDTH %d\n' % self.p_width
[319]	996	s += '#define X_IO %d\n' % self.x_io
[406]	997	s += '#define Y_IO %d\n' % self.y_io
[411]	998	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
[319]	999	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
	1000	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	1001	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
	1002	s += '\n'
	1003
[406]	1004	s += '/* Peripherals */\n'
[319]	1005	s += '\n'
	1006	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
	1007	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	1008	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	1009	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
	1010	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	1011	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
	1012	s += '\n'
	1013	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
	1014	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	1015	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	1016	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
[546]	1017	s += '#define USE_NIC %d\n' % ( nb_nic != 0 )
[319]	1018	s += '\n'
	1019	s += '#define USE_IOC_BDV %d\n' % use_bdv
[546]	1020	s += '#define USE_IOC_SDC %d\n' % use_sdc
[319]	1021	s += '#define USE_IOC_HBA %d\n' % use_hba
[403]	1022	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
[319]	1023	s += '\n'
[520]	1024	s += '#define FBUF_X_SIZE %d\n' % fbf_arg0
	1025	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg1
[328]	1026	s += '\n'
[537]	1027	s += '#define XCU_NB_HWI %d\n' % xcu_arg0
	1028	s += '#define XCU_NB_PTI %d\n' % xcu_arg1
	1029	s += '#define XCU_NB_WTI %d\n' % xcu_arg2
	1030	s += '#define XCU_NB_OUT %d\n' % xcu_channels
[328]	1031	s += '\n'
[520]	1032	s += '#define MWR_TO_COPROC %d\n' % mwr_arg0
	1033	s += '#define MWR_FROM_COPROC %d\n' % mwr_arg1
	1034	s += '#define MWR_CONFIG %d\n' % mwr_arg2
	1035	s += '#define MWR_STATUS %d\n' % mwr_arg3
	1036	s += '\n'
[319]	1037
[356]	1038	s += '/* base addresses and sizes for physical segments */\n'
[319]	1039	s += '\n'
[406]	1040	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
	1041	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
[356]	1042	s += '\n'
[406]	1043	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
	1044	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
[319]	1045	s += '\n'
[406]	1046	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
	1047	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
[319]	1048	s += '\n'
[406]	1049	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
	1050	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
[319]	1051	s += '\n'
[406]	1052	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
	1053	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
[319]	1054	s += '\n'
[406]	1055	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
	1056	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
[319]	1057	s += '\n'
[406]	1058	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
	1059	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
[319]	1060	s += '\n'
[406]	1061	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
	1062	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
[319]	1063	s += '\n'
[406]	1064	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
	1065	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
[319]	1066	s += '\n'
[406]	1067	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
	1068	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
[319]	1069	s += '\n'
[406]	1070	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
	1071	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
[319]	1072	s += '\n'
[406]	1073	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
	1074	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
[319]	1075	s += '\n'
[406]	1076	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
	1077	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
[319]	1078	s += '\n'
[406]	1079	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
	1080	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
[319]	1081	s += '\n'
[406]	1082	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
	1083	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
[319]	1084	s += '\n'
	1085	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
	1086	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
	1087	s += '\n'
[491]	1088	s += '#define SEG_DROM_BASE 0x%x\n' % seg_drom_base
	1089	s += '#define SEG_DROM_SIZE 0x%x\n' % seg_drom_size
	1090	s += '\n'
[328]	1091	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
[319]	1092	s += '\n'
	1093
[326]	1094	s += '/* physical base addresses for identity mapped vsegs */\n'
	1095	s += '/* used by the GietVM OS */\n'
[319]	1096	s += '\n'
	1097	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
	1098	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
	1099	s += '\n'
	1100	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
	1101	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
	1102	s += '\n'
	1103	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
	1104	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
	1105	s += '\n'
	1106	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
	1107	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
	1108	s += '#endif\n'
[406]	1109
[319]	1110	return s
	1111
	1112	# end of hard_config()
	1113
[539]	1114	#################################################################
	1115	def linux_dts( self ): # compute string for linux.dts file
[424]	1116	# used for linux configuration
[411]	1117	# header
	1118	s = '/dts-v1/;\n'
	1119	s += '\n'
	1120	s += '/{\n'
[421]	1121	s += ' compatible = "tsar,%s";\n' % self.name
[411]	1122	s += ' #address-cells = <2>;\n' # physical address on 64 bits
	1123	s += ' #size-cells = <1>;\n' # segment size on 32 bits
	1124	s += ' model = "%s";\n' % self.name
	1125	s += '\n'
	1126
	1127	# linux globals arguments
	1128	s += ' chosen {\n'
	1129	s += ' linux,stdout-path = &tty;\n'
	1130	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
[424]	1131	s += ' };\n\n'
[411]	1132
	1133	# cpus (for each cluster)
	1134	s += ' cpus {\n'
	1135	s += ' #address-cells = <1>;\n'
	1136	s += ' #size-cells = <0>;\n'
	1137
	1138	for cluster in self.clusters:
	1139	for proc in cluster.procs:
	1140	x = cluster.x
	1141	y = cluster.y
	1142	l = proc.lpid
[421]	1143	proc_id = (((x << self.y_width) + y) << self.p_width) + l
[411]	1144	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
	1145	s += ' device_type = "cpu";\n'
	1146	s += ' compatible = "soclib,mips32el";\n'
	1147	s += ' reg = <0x%x>;\n' % proc_id
	1148	s += ' };\n'
	1149	s += '\n'
	1150
	1151	s += ' };\n\n'
	1152
	1153	# devices (ram or peripheral) are grouped per cluster
[424]	1154	# the "compatible" attribute links a peripheral device
[411]	1155	# to one or several drivers identified by ("major","minor")
	1156
	1157	for cluster in self.clusters:
	1158	x = cluster.x
	1159	y = cluster.y
	1160	found_xcu = False
	1161	found_pic = False
	1162
	1163	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
	1164
	1165	# scan all psegs to find RAM in current cluster
	1166	for pseg in cluster.psegs:
	1167	if ( pseg.segtype == 'RAM' ):
	1168	msb = pseg.base >> 32
	1169	lsb = pseg.base & 0xFFFFFFFF
	1170	size = pseg.size
	1171
[424]	1172	s += ' ram_%d_%d: ram@0x%x {\n' % (x, y, pseg.base)
[411]	1173	s += ' device_type = "memory";\n'
	1174	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1175	s += ' };\n\n'
	1176
	1177	# scan all periphs to find XCU or PIC in current cluster
	1178	for periph in cluster.periphs:
	1179	msb = periph.pseg.base >> 32
	1180	lsb = periph.pseg.base & 0xFFFFFFFF
	1181	size = periph.pseg.size
	1182
	1183	# search XCU (can be replicated)
[424]	1184	if ( (periph.ptype == 'XCU') ):
[411]	1185	found_xcu = True
	1186	xcu = periph
[424]	1187	irq_ctrl_name = 'xcu_%d_%d' % (x, y)
[411]	1188
[424]	1189	s += ' %s: xcu@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1190	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
[411]	1191	s += ' interrupt-controller;\n'
	1192	s += ' #interrupt-cells = <1>;\n'
[512]	1193	s += ' clocks = <&freq>;\n' # XCU contains a timer
[424]	1194	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[411]	1195	s += ' };\n\n'
	1196
	1197	# search PIC (non replicated)
[424]	1198	if ( periph.ptype == 'PIC' ):
[411]	1199	found_pic = True
	1200	pic = periph
	1201	irq_ctrl_name = 'pic'
	1202
[424]	1203	s += ' %s: pic@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1204	s += ' compatible = "soclib,vci_iopic";\n'
[411]	1205	s += ' interrupt-controller;\n'
	1206	s += ' #interrupt-cells = <1>;\n'
	1207	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1208	s += ' };\n\n'
	1209
	1210	# we need one interrupt controler in any cluster containing peripherals
[512]	1211	if ( (found_xcu == False) and
	1212	(found_pic == False) and
	1213	(len(cluster.periphs) > 0) ):
	1214	print '[genmap error] in linux_dts()'
	1215	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[424]	1216	sys.exit(1)
[411]	1217
	1218	if ( found_pic == True ): irq_ctrl = pic
	1219	else: irq_ctrl = xcu
[424]	1220
[411]	1221	# scan all periphs to find TTY and IOC in current cluster
	1222	for periph in cluster.periphs:
	1223	msb = periph.pseg.base >> 32
	1224	lsb = periph.pseg.base & 0xFFFFFFFF
	1225	size = periph.pseg.size
	1226
	1227	# search TTY (non replicated)
[424]	1228	if ( periph.ptype == 'TTY' ):
[411]	1229
[539]	1230	# get HWI index to XCU or PIC (only TTY0 is used by Linux)
[411]	1231	hwi_id = 0xFFFFFFFF
	1232	for irq in irq_ctrl.irqs:
[512]	1233	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ):
	1234	hwi_id = irq.srcid
	1235
[411]	1236	if ( hwi_id == 0xFFFFFFFF ):
[512]	1237	print '[genmap error] in linux.dts()'
	1238	print ' IRQ_TTY_RX not found'
[411]	1239	sys.exit(1)
	1240
[526]	1241	s += ' tty: tty@0x%x {\n' % (periph.pseg.base)
[421]	1242	s += ' compatible = "soclib,vci_multi_tty";\n'
[411]	1243	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1244	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1245	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1246	s += ' };\n\n'
	1247
	1248	# search IOC (non replicated)
[424]	1249	elif ( periph.ptype == 'IOC' ):
[411]	1250
	1251	if ( periph.subtype == 'BDV' ):
	1252
	1253	# get irq line index associated to bdv
	1254	hwi_id = 0xFFFFFFFF
	1255	for irq in irq_ctrl.irqs:
	1256	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
[512]	1257
[411]	1258	if ( hwi_id == 0xFFFFFFFF ):
[512]	1259	print '[genmap error] in linux.dts()'
	1260	print ' ISR_BDV not found'
[411]	1261	sys.exit(1)
	1262
[526]	1263	s += ' bdv: bdv@0x%x {\n' % (periph.pseg.base)
[517]	1264	s += ' compatible = "tsar,vci_block_device";\n'
[411]	1265	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1266	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1267	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1268	s += ' };\n\n'
	1269
[526]	1270	else:
[539]	1271	print '[genmap warning] in linux_dts() : '
	1272	print ' %s' % (periph.subtype),
[526]	1273	print 'peripheral not supported by LINUX'
[411]	1274
[465]	1275	# XCU or PIC have been already parsed
	1276	elif ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
	1277	pass
	1278
[411]	1279	# other peripherals
[424]	1280	else:
[539]	1281	print '[genmap warning] in linux_dts() : '
	1282	print ' %s peripheral not supported by LINUX' % (periph.ptype)
[424]	1283
	1284	# clocks
[411]	1285	s += ' /* clocks */\n\n'
	1286	s += ' clocks {\n'
[424]	1287	s += ' freq: freq@50MHZ {\n'
[411]	1288	s += ' #clock-cells = <0>;\n'
	1289	s += ' compatible = "fixed-clock";\n'
	1290	s += ' clock-frequency = <50000000>;\n'
	1291	s += ' };\n'
	1292	s += ' };\n\n'
	1293	s += ' cpuclk {\n'
[421]	1294	s += ' compatible = "soclib,mips32_clksrc";\n'
[424]	1295	s += ' clocks = <&freq>;\n'
[411]	1296	s += ' };\n'
	1297	s += '};\n'
	1298
	1299	return s
	1300	# end linux_dts()
	1301
	1302
[539]	1303	#################################################################
	1304	def netbsd_dts( self ): # compute string for netbsd.dts file
[406]	1305	# used for netbsd configuration
[319]	1306	# header
	1307	s = '/dts-v1/;\n'
	1308	s += '\n'
	1309	s += '/{\n'
[406]	1310	s += ' #address-cells = <2>;\n'
	1311	s += ' #size-cells = <1>;\n'
[319]	1312
	1313	# cpus (for each cluster)
	1314	s += ' cpus {\n'
	1315	s += ' #address-cells = <1>;\n'
	1316	s += ' #size-cells = <0>;\n'
	1317
	1318	for cluster in self.clusters:
	1319	for proc in cluster.procs:
[539]	1320	proc_id = (((cluster.x << self.y_width) + cluster.y)
	1321	<< self.p_width) + proc.lpid
[319]	1322
	1323	s += ' Mips,32@0x%x {\n' % proc_id
	1324	s += ' device_type = "cpu";\n'
	1325	s += ' icudev_type = "cpu:mips";\n'
	1326	s += ' name = "Mips,32";\n'
	1327	s += ' reg = <0x%x>;\n' % proc_id
	1328	s += ' };\n'
	1329	s += '\n'
	1330
	1331	s += ' };\n'
	1332
[411]	1333	# physical memory banks (for each cluster)
[319]	1334	for cluster in self.clusters:
	1335	for pseg in cluster.psegs:
	1336
	1337	if ( pseg.segtype == 'RAM' ):
	1338	msb = pseg.base >> 32
	1339	lsb = pseg.base & 0xFFFFFFFF
	1340	size = pseg.size
	1341
	1342	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
	1343	s += ' cached = <1>;\n'
	1344	s += ' device_type = "memory";\n'
[539]	1345	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[319]	1346	s += ' };\n'
	1347
	1348	# peripherals (for each cluster)
	1349	for cluster in self.clusters:
[411]	1350	x = cluster.x
	1351	y = cluster.y
[319]	1352
[406]	1353	# research XCU component
[319]	1354	found_xcu = False
	1355	for periph in cluster.periphs:
[406]	1356	if ( (periph.ptype == 'XCU') ):
[319]	1357	found_xcu = True
	1358	xcu = periph
	1359	msb = periph.pseg.base >> 32
	1360	lsb = periph.pseg.base & 0xFFFFFFFF
	1361	size = periph.pseg.size
	1362
	1363	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1364	s += ' device_type = "soclib:xicu:root";\n'
[539]	1365	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[400]	1366	s += ' input_lines = <%d>;\n' % periph.arg
	1367	s += ' ipis = <%d>;\n' % periph.arg
	1368	s += ' timers = <%d>;\n' % periph.arg
[319]	1369
	1370	output_id = 0 # output index from XCU
	1371	for lpid in xrange ( len(cluster.procs) ): # destination processor index
	1372	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
[406]	1373	cluster_xy = (cluster.x << self.y_width) + cluster.y
	1374	proc_id = (cluster_xy << self.p_width) + lpid
[319]	1375	s += ' out@%d {\n' % output_id
	1376	s += ' device_type = "soclib:xicu:filter";\n'
[411]	1377	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
[406]	1378	s += ' output_line = <%d>;\n' % output_id
[411]	1379	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1380	s += ' };\n'
	1381
	1382	output_id += 1
	1383
	1384	s += ' };\n'
	1385
	1386	# research PIC component
	1387	found_pic = False
	1388	for periph in cluster.periphs:
[406]	1389	if ( periph.ptype == 'PIC' ):
[319]	1390	found_pic = True
	1391	pic = periph
	1392	msb = periph.pseg.base >> 32
	1393	lsb = periph.pseg.base & 0xFFFFFFFF
	1394	size = periph.pseg.size
	1395
	1396	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1397	s += ' device_type = "soclib:pic:root";\n'
	1398	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1399	s += ' input_lines = <%d>;\n' % periph.channels
[319]	1400	s += ' };\n'
	1401
[411]	1402	# at least one interrupt controller
[319]	1403	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
[512]	1404	print '[genmap error] in netbsd_dts()'
	1405	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[406]	1406	sys.exit(1)
	1407
[319]	1408	if ( found_pic == True ): irq_tgt = pic
	1409	else: irq_tgt = xcu
[406]	1410
[319]	1411	# get all others peripherals in cluster
	1412	for periph in cluster.periphs:
	1413	msb = periph.pseg.base >> 32
	1414	lsb = periph.pseg.base & 0xFFFFFFFF
	1415	size = periph.pseg.size
	1416
	1417	# research DMA component
	1418	if ( periph.ptype == 'DMA' ):
	1419
	1420	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[411]	1421	s += ' device_type = "soclib:dma";\n'
	1422	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1423	s += ' channel_count = <%d>;\n' % periph.channels
	1424
	1425	# multi-channels : get HWI index (to XCU) for each channel
	1426	for channel in xrange( periph.channels ):
	1427	hwi_id = 0xFFFFFFFF
	1428	for irq in xcu.irqs:
[539]	1429	if ( (irq.isrtype == 'ISR_DMA') and
	1430	(irq.channel == channel) ):
[319]	1431	hwi_id = irq.srcid
[512]	1432
[319]	1433	if ( hwi_id == 0xFFFFFFFF ):
[512]	1434	print '[genmap error] in netbsd.dts()'
	1435	print ' ISR_DMA channel %d not found' % channel
[319]	1436	sys.exit(1)
	1437
	1438	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
	1439	s += ' irq@%d{\n' % channel
	1440	s += ' device_type = "soclib:periph:irq";\n'
	1441	s += ' output_line = <%d>;\n' % channel
[411]	1442	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1443	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1444	s += ' };\n'
	1445
[406]	1446	s += ' };\n'
[319]	1447
	1448	# research MMC component
	1449	elif ( periph.ptype == 'MMC' ):
	1450
	1451	# get irq line index associated to MMC in XCU
	1452	irq_in = 0xFFFFFFFF
	1453	for irq in xcu.irqs:
	1454	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
[512]	1455
[319]	1456	if ( irq_in == 0xFFFFFFFF ):
[512]	1457	print '[genmap error] in netbsd.dts()'
	1458	print ' ISR_MMC not found'
[319]	1459	sys.exit(1)
	1460
	1461	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1462	s += ' device_type = "soclib:mmc";\n'
[411]	1463	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in)
	1464	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1465	s += ' };\n'
[319]	1466
	1467	# research FBF component
[406]	1468	elif ( periph.ptype == 'FBF' ):
[319]	1469
[411]	1470	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1471	s += ' device_type = "soclib:framebuffer";\n'
[539]	1472	s += ' mode = <32>;\n' # bits par pixel
[400]	1473	s += ' width = <%d>;\n' % periph.arg
	1474	s += ' height = <%d>;\n' % periph.arg
[319]	1475	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1476	s += ' };\n'
	1477
	1478	# research IOC component
[406]	1479	elif ( periph.ptype == 'IOC' ):
[319]	1480
	1481	if ( periph.subtype == 'BDV' ):
	1482
	1483	# get irq line index associated to bdv
	1484	irq_in = 0xFFFFFFFF
	1485	for irq in irq_tgt.irqs:
	1486	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
	1487	if ( irq_in == 0xFFFFFFFF ):
[512]	1488	print '[genmap error] in netbsd.dts()'
	1489	print ' ISR_BDV not found'
[319]	1490	sys.exit(1)
	1491
[411]	1492	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1493	s += ' device_type = "soclib:blockdevice";\n'
[411]	1494	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1495	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1496	s += ' };\n'
	1497
	1498	elif ( periph.subtype == 'HBA' ):
[512]	1499	print '[genmap error] in netbsd_dts()'
	1500	print ' HBA peripheral not supported by NetBSD'
[319]	1501	sys.exit(1)
	1502
[546]	1503	elif ( periph.subtype == 'SDC' ):
[319]	1504
[546]	1505	# get irq line index associated to sdc
[319]	1506	irq_in = 0xFFFFFFFF
	1507	for irq in irq_tgt.irqs:
[546]	1508	if ( irq.isrtype == 'ISR_SDC' ): irq_in = irq.srcid
[319]	1509	if ( irq_in == 0xFFFFFFFF ):
[512]	1510	print '[genmap error] in netbsd.dts()'
[546]	1511	print ' ISR_SDC not found'
[319]	1512	sys.exit(1)
	1513
	1514	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[546]	1515	s += ' device_type = "soclib:sdc";\n'
[411]	1516	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1517	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1518	s += ' };\n'
	1519
	1520	# research ROM component
	1521	elif ( periph.ptype == 'ROM' ):
	1522
[411]	1523	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1524	s += ' device_type = "rom";\n'
[411]	1525	s += ' cached = <1>;\n'
	1526	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1527	s += ' };\n'
	1528
	1529	# research SIM component
	1530	elif ( periph.ptype == 'SIM' ):
	1531
	1532	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1533	s += ' device_type = "soclib:simhelper";\n'
	1534	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1535	s += ' };\n'
	1536
	1537	# research TTY component
	1538	elif ( periph.ptype == 'TTY' ):
	1539
[411]	1540	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1541	s += ' device_type = "soclib:tty";\n'
[406]	1542	s += ' channel_count = < %d >;\n' % periph.channels
[411]	1543	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1544
	1545	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1546	for channel in xrange( periph.channels ):
	1547	hwi_id = 0xFFFFFFFF
	1548	for irq in irq_tgt.irqs:
[406]	1549	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
[319]	1550	hwi_id = irq.srcid
	1551	if ( hwi_id == 0xFFFFFFFF ):
[512]	1552	print '[genmap error] in netbsd.dts()'
	1553	print ' ISR_TTY_RX channel %d not found' % channel
[319]	1554	sys.exit(1)
	1555
	1556	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1557	s += ' irq@%d{\n' % channel
	1558	s += ' device_type = "soclib:periph:irq";\n'
	1559	s += ' output_line = <%d>;\n' % channel
[411]	1560	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1561	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1562	s += ' };\n'
	1563
	1564	s += ' };\n'
[406]	1565
[319]	1566	# research IOB component
	1567	elif ( periph.ptype == 'IOB' ):
	1568
	1569	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1570	s += ' device_type = "soclib:iob";\n'
	1571	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1572	s += ' };\n'
	1573
	1574	# research NIC component
[406]	1575	elif ( periph.ptype == 'NIC' ):
[319]	1576
	1577	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1578	s += ' device_type = "soclib:nic";\n'
	1579	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1580	s += ' channel_count = < %d >;\n' % periph.channels
	1581
	1582	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
	1583	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
	1584	for channel in xrange( periph.channels ):
	1585	hwi_id = 0xFFFFFFFF
	1586	for irq in irq_tgt.irqs:
[406]	1587	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
[319]	1588	hwi_id = irq.srcid
	1589	if ( hwi_id == 0xFFFFFFFF ):
[512]	1590	print '[genmap error] in netbsd.dts()'
	1591	print ' ISR_NIC_RX channel %d not found' % channel
[319]	1592	sys.exit(1)
	1593
	1594	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1595	s += ' irq_rx@%d{\n' % channel
	1596	s += ' device_type = "soclib:periph:irq";\n'
	1597	s += ' output_line = <%d>;\n' % (2*channel)
	1598	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1599	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1600	s += ' };\n'
	1601
	1602	hwi_id = 0xFFFFFFFF
	1603	for irq in irq_tgt.irqs:
[406]	1604	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
[319]	1605	hwi_id = irq.srcid
	1606	if ( hwi_id == 0xFFFFFFFF ):
[512]	1607	print '[genmap error] in netbsd.dts()'
	1608	print ' ISR_NIC_TX channel %d not found' % channel
[319]	1609	sys.exit(1)
	1610
	1611	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1612	s += ' irq_tx@%d{\n' % channel
	1613	s += ' device_type = "soclib:periph:irq";\n'
	1614	s += ' output_line = <%d>;\n' % (2*channel + 1)
	1615	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1616	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1617	s += ' };\n'
[406]	1618
[319]	1619	s += ' };\n'
	1620
	1621	# research CMA component
[406]	1622	elif ( periph.ptype == 'CMA' ):
[319]	1623
	1624	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1625	s += ' device_type = "soclib:cma";\n'
	1626	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1627	s += ' channel_count = < %d >;\n' % periph.channels
	1628
	1629	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1630	for channel in xrange( periph.channels ):
	1631	hwi_id = 0xFFFFFFFF
	1632	for irq in irq_tgt.irqs:
[406]	1633	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
[319]	1634	hwi_id = irq.srcid
[512]	1635
[319]	1636	if ( hwi_id == 0xFFFFFFFF ):
[512]	1637	print '[genmap error] in netbsd.dts()'
	1638	print ' ISR_CMA channel %d not found' % channel
[319]	1639	sys.exit(1)
	1640
	1641	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1642	s += ' irq@%d{\n' % channel
	1643	s += ' device_type = "soclib:periph:irq";\n'
	1644	s += ' output_line = <%d>;\n' % channel
[411]	1645	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1646	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1647	s += ' };\n'
	1648
	1649	s += ' };\n'
	1650
	1651	# research TIM component
[406]	1652	elif ( periph.ptype == 'TIM' ):
[319]	1653
[512]	1654	print '[genmap error] in netbsd_dts()'
	1655	print ' TIM peripheral not supported by NetBSD'
[319]	1656	sys.exit(1)
	1657
	1658	# research MWR component
	1659	elif ( periph.ptype == 'MWR' ):
	1660
[512]	1661	print '[genmap error] in netbsd_dts()'
	1662	print ' MWR peripheral not supported by NetBSD'
[319]	1663	sys.exit(1)
	1664
	1665	# topology
	1666	s += '\n'
	1667	s += ' topology {\n'
	1668	s += ' #address-cells = <2>;\n'
	1669	s += ' #size-cells = <0>;\n'
	1670	for cluster in self.clusters:
[406]	1671	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
[319]	1672	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
	1673	s += ' devices = <\n'
	1674
[406]	1675	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
[319]	1676	for proc in cluster.procs:
	1677	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
	1678	for periph in cluster.periphs:
	1679	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
[492]	1680	for pseg in cluster.psegs:
	1681	if ( pseg.segtype == 'RAM' ):
	1682	s += ' &{/%s@0x%x}\n' % (pseg.name, pseg.base)
[319]	1683
	1684	s += ' >;\n'
	1685	s += ' };\n'
	1686	s += ' };\n'
	1687	s += '};\n'
	1688
	1689	return s
[411]	1690	# end netbsd_dts()
[319]	1691
[539]	1692	######################################################################
	1693	def almos_archinfo( self ): # compute string for arch.info file
[406]	1694	# used for almos configuration
[319]	1695	# header
[327]	1696	s = '# arch.info file generated by genmap for %s\n' % self.name
[319]	1697	s += '\n'
	1698	s += '[HEADER]\n'
	1699	s += ' REVISION=1\n'
	1700	s += ' ARCH=%s\n' % self.name
	1701	s += ' XMAX=%d\n' % self.x_size
	1702	s += ' YMAX=%d\n' % self.y_size
[411]	1703	s += ' CPU_NR=%d\n' % self.nprocs
[319]	1704	s += '\n'
	1705
	1706	# clusters
	1707	cluster_id = 0
	1708	for cluster in self.clusters:
	1709
	1710	ram = None
	1711	nb_cpus = len( cluster.procs )
	1712	nb_devs = len( cluster.periphs )
	1713
	1714	# search a RAM
	1715	for pseg in cluster.psegs:
[406]	1716	if ( pseg.segtype == 'RAM' ):
[319]	1717	ram = pseg
	1718	nb_devs += 1
	1719
	1720	# search XCU to get IRQs indexes if cluster contains peripherals
	1721	if ( len( cluster.periphs ) != 0 ):
	1722	tty_irq_id = None
	1723	bdv_irq_id = None
	1724	dma_irq_id = None
	1725
	1726	for periph in cluster.periphs:
[406]	1727	if ( periph.ptype == 'XCU' ):
[319]	1728	# scan irqs
	1729	for irq in periph.irqs:
[539]	1730	if (irq.isrtype=='ISR_TTY_RX'): tty_irq_id = irq.srcid
	1731	if (irq.isrtype=='ISR_BDV' ): bdv_irq_id = irq.srcid
	1732	if (irq.isrtype=='ISR_DMA' ): dma_irq_id = irq.srcid
[319]	1733
	1734	# Build the cluster description
	1735	s += '[CLUSTER]\n'
[406]	1736	s += ' CID=%d\n' % cluster_id
[539]	1737	s += ' ARCH_CID=0x%x\n' % ((cluster.x<<self.y_width)+cluster.y)
[319]	1738	s += ' CPU_NR=%d\n' % nb_cpus
	1739	s += ' DEV_NR=%d\n' % nb_devs
	1740
[406]	1741
[319]	1742	# Handling RAM when cluster contain a RAM
	1743	if (ram != None ):
	1744	base = ram.base
	1745	size = ram.size
	1746	irqid = -1
[406]	1747	s += ' DEVID=RAM'
[539]	1748	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % (base,size)
[319]	1749
	1750	# Handling peripherals
	1751	for periph in cluster.periphs:
	1752	base = periph.pseg.base
	1753	size = periph.pseg.size
	1754
[406]	1755	if ( periph.ptype == 'XCU' ):
[319]	1756
[406]	1757	s += ' DEVID=XICU'
[539]	1758	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1759
[406]	1760	elif ( (periph.ptype == 'TTY')
[319]	1761	and (tty_irq_id != None) ):
	1762
[406]	1763	s += ' DEVID=TTY'
[539]	1764	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,tty_irq_id)
[319]	1765
[406]	1766	elif ( (periph.ptype == 'DMA')
[319]	1767	and (dma_irq_id != None) ):
	1768
	1769	s += ' DEVID=DMA'
[539]	1770	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,dma_irq_id)
[319]	1771
	1772	elif ( periph.ptype == 'FBF' ):
	1773
	1774	s += ' DEVID=FB'
[539]	1775	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size )
[319]	1776
	1777	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
	1778	and (bdv_irq_id != None) ):
	1779
[406]	1780	s += ' DEVID=BLKDEV'
[539]	1781	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,bdv_irq_id)
[319]	1782
	1783	elif ( periph.ptype == 'PIC' ):
	1784
[539]	1785	s += ' DEVID=IOPIC'
	1786	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1787
	1788	else:
	1789	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
	1790	% (cluster.x, cluster.y)
	1791	print '# peripheral type %s/%s not supported yet\n' \
	1792	% ( periph.ptype, periph.subtype )
[406]	1793
[319]	1794	cluster_id += 1
	1795
	1796	return s
	1797
	1798	# end of almos_archinfo()
	1799
	1800
	1801
	1802
	1803
	1804
	1805
	1806
[539]	1807	###################################################################################
[319]	1808	class Cluster ( object ):
[539]	1809	###################################################################################
[319]	1810	def __init__( self,
[406]	1811	x,
[319]	1812	y ):
[406]	1813
[539]	1814	self.index = 0 # global index (set by Mapping constructor)
	1815	self.x = x # x coordinate
	1816	self.y = y # y coordinate
	1817	self.psegs = [] # filled by addRam() or addPeriph()
	1818	self.procs = [] # filled by addProc()
	1819	self.periphs = [] # filled by addPeriph()
[319]	1820
	1821	return
	1822
	1823	################
	1824	def xml( self ): # xml for a cluster
	1825
	1826	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
[406]	1827	for pseg in self.psegs: s += pseg.xml()
[319]	1828	for proc in self.procs: s += proc.xml()
[406]	1829	for peri in self.periphs: s += peri.xml()
[319]	1830	s += ' </cluster>\n'
	1831
	1832	return s
	1833
	1834	#############################################
[539]	1835	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
[319]	1836
	1837	if ( verbose ):
	1838	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
	1839
	1840	# check index
	1841	if (self.index != expected):
[512]	1842	print '[genmap error] in Cluster.cbin()'
[539]	1843	print ' cluster global index = %d / expected = %d' \
	1844	% (self.index,expected)
[319]	1845	sys.exit(1)
	1846
[406]	1847	# compute global index for first pseg
[319]	1848	if ( len(self.psegs) > 0 ):
	1849	pseg_id = self.psegs[0].index
	1850	else:
	1851	pseg_id = 0
	1852
[406]	1853	# compute global index for first proc
[319]	1854	if ( len(self.procs) > 0 ):
	1855	proc_id = self.procs[0].index
	1856	else:
	1857	proc_id = 0
	1858
[406]	1859	# compute global index for first periph
[319]	1860	if ( len(self.periphs) > 0 ):
	1861	periph_id = self.periphs[0].index
	1862	else:
	1863	periph_id = 0
	1864
	1865	byte_stream = bytearray()
[539]	1866	byte_stream += mapping.int2bytes(4,self.x) # x coordinate
	1867	byte_stream += mapping.int2bytes(4,self.y) # x coordinate
	1868	byte_stream += mapping.int2bytes(4,len(self.psegs)) # psegs in cluster
	1869	byte_stream += mapping.int2bytes(4,pseg_id ) # global index
	1870	byte_stream += mapping.int2bytes(4,len(self.procs)) # procs in cluster
	1871	byte_stream += mapping.int2bytes(4,proc_id ) # global index
	1872	byte_stream += mapping.int2bytes(4,len(self.periphs)) # periphs in cluster
	1873	byte_stream += mapping.int2bytes(4, periph_id ) # global index
[406]	1874
[319]	1875	if ( verbose ):
	1876	print 'nb_psegs = %d' % len( self.psegs )
	1877	print 'pseg_id = %d' % pseg_id
	1878	print 'nb_procs = %d' % len( self.procs )
	1879	print 'proc_id = %d' % proc_id
	1880	print 'nb_periphs = %d' % len( self.periphs )
	1881	print 'periph_id = %d' % periph_id
	1882
	1883	return byte_stream
	1884
[539]	1885	##################################################################################
[305]	1886	class Vspace( object ):
[539]	1887	##################################################################################
[406]	1888	def __init__( self,
	1889	name,
[319]	1890	startname ):
	1891
	1892	self.index = 0 # global index ( set by addVspace() )
	1893	self.name = name # vspace name
[512]	1894	self.startname = startname # name of vseg containing the start_vector
[406]	1895	self.vsegs = []
[305]	1896	self.tasks = []
	1897
	1898	return
	1899
[319]	1900	################
	1901	def xml( self ): # xml for one vspace
	1902
[305]	1903	s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname )
[319]	1904	for vseg in self.vsegs: s += vseg.xml()
[406]	1905	for task in self.tasks: s += task.xml()
[305]	1906	s += ' </vspace>\n'
[319]	1907
[305]	1908	return s
	1909
[319]	1910	#############################################
[539]	1911	def cbin( self, mapping, verbose, expected ): # C binary for Vspace
[319]	1912
	1913	if ( verbose ):
	1914	print '*** cbin for vspace %s' % (self.name)
	1915
	1916	# check index
	1917	if (self.index != expected):
[512]	1918	print '[genmap error] in Vspace.cbin()'
[539]	1919	print ' vspace global index = %d / expected = %d' \
	1920	%(self.index,expected)
[319]	1921	sys.exit(1)
	1922
[512]	1923	# compute global index for vseg containing start_vector
	1924	vseg_start_id = 0xFFFFFFFF
[319]	1925	for vseg in self.vsegs:
[512]	1926	if ( vseg.name == self.startname ): vseg_start_id = vseg.index
	1927
	1928	if ( vseg_start_id == 0xFFFFFFFF ):
	1929	print '[genmap error] in Vspace.cbin()'
[539]	1930	print ' startname %s not found for vspace %s' \
	1931	%(self.startname,self.name)
[319]	1932	sys.exit(1)
[406]	1933
[512]	1934	# compute first vseg and first task global index
[319]	1935	first_vseg_id = self.vsegs[0].index
	1936	first_task_id = self.tasks[0].index
[406]	1937
[512]	1938	# compute number of tasks and number of vsegs
[319]	1939	nb_vsegs = len( self.vsegs )
	1940	nb_tasks = len( self.tasks )
	1941
	1942	byte_stream = bytearray()
[539]	1943	byte_stream += mapping.str2bytes(32,self.name) # vspace name
	1944	byte_stream += mapping.int2bytes(4, vseg_start_id) # vseg start_vector
	1945	byte_stream += mapping.int2bytes(4, nb_vsegs) # number of vsegs
	1946	byte_stream += mapping.int2bytes(4, nb_tasks) # number of tasks
	1947	byte_stream += mapping.int2bytes(4, first_vseg_id) # global index
	1948	byte_stream += mapping.int2bytes(4, first_task_id) # global index
[319]	1949
	1950	if ( verbose ):
[512]	1951	print 'start_id = %d' % vseg_start_id
[319]	1952	print 'nb_vsegs = %d' % nb_vsegs
	1953	print 'nb_tasks = %d' % nb_tasks
	1954	print 'vseg_id = %d' % first_vseg_id
	1955	print 'task_id = %d' % first_task_id
	1956
	1957	return byte_stream
	1958
[539]	1959	##################################################################################
[305]	1960	class Task( object ):
[539]	1961	##################################################################################
[406]	1962	def __init__( self,
	1963	name,
	1964	trdid,
	1965	x,
[319]	1966	y,
[406]	1967	p,
	1968	stackname,
	1969	heapname,
[441]	1970	startid ):
[319]	1971
	1972	self.index = 0 # global index value set by addTask()
	1973	self.name = name # tsk name
	1974	self.trdid = trdid # task index (unique in vspace)
[406]	1975	self.x = x # cluster x coordinate
	1976	self.y = y # cluster y coordinate
	1977	self.p = p # processor local index
[512]	1978	self.stackname = stackname # name of vseg containing the stack
	1979	self.heapname = heapname # name of vseg containing the heap
[319]	1980	self.startid = startid # index in start_vector
[305]	1981	return
	1982
[539]	1983	######################################
[319]	1984	def xml( self ): # xml for one task
	1985
	1986	s = ' <task name="%s"' % self.name
	1987	s += ' trdid="%d"' % self.trdid
	1988	s += ' x="%d"' % self.x
	1989	s += ' y="%d"' % self.y
	1990	s += ' p="%d"' % self.p
[512]	1991	s += '\n '
[319]	1992	s += ' stackname="%s"' % self.stackname
	1993	s += ' heapname="%s"' % self.heapname
	1994	s += ' startid="%d"' % self.startid
[406]	1995	s += ' />\n'
[319]	1996
[305]	1997	return s
	1998
[539]	1999	##########################################################################
	2000	def cbin( self, mapping, verbose, expected, vspace ): # C binary for Task
[319]	2001
	2002	if ( verbose ):
[539]	2003	print '*** cbin for task %s in vspace %s' \
	2004	% (self.name, vspace.name)
[319]	2005
	2006	# check index
	2007	if (self.index != expected):
[512]	2008	print '[genmap error] in Task.cbin()'
[539]	2009	print ' task global index = %d / expected = %d' \
	2010	%(self.index,expected)
[319]	2011	sys.exit(1)
	2012
	2013	# compute cluster global index
	2014	cluster_id = (self.x * mapping.y_size) + self.y
	2015
[512]	2016	# compute vseg index for stack
	2017	vseg_stack_id = 0xFFFFFFFF
[319]	2018	for vseg in vspace.vsegs:
[512]	2019	if ( vseg.name == self.stackname ): vseg_stack_id = vseg.index
	2020
	2021	if ( vseg_stack_id == 0xFFFFFFFF ):
	2022	print '[genmap error] in Task.cbin()'
	2023	print ' stackname %s not found for task %s in vspace %s' \
[319]	2024	% ( self.stackname, self.name, vspace.name )
	2025	sys.exit(1)
	2026
[512]	2027	# compute vseg index for heap
[453]	2028	if ( self.heapname == '' ):
[512]	2029	vseg_heap_id = 0
[453]	2030	else:
[512]	2031	vseg_heap_id = 0xFFFFFFFF
[453]	2032	for vseg in vspace.vsegs:
[512]	2033	if ( vseg.name == self.heapname ): vseg_heap_id = vseg.index
	2034
	2035	if ( vseg_heap_id == 0xFFFFFFFF ):
	2036	print '[genmap error] in Task.cbin()'
	2037	print ' heapname %s not found for task %s in vspace %s' \
[453]	2038	% ( self.heapname, self.name, vspace.name )
	2039	sys.exit(1)
[319]	2040
	2041	byte_stream = bytearray()
[539]	2042	byte_stream += mapping.str2bytes(32,self.name) # task name in vspace
	2043	byte_stream += mapping.int2bytes(4, cluster_id) # cluster global index
	2044	byte_stream += mapping.int2bytes(4, self.p) # processor local index
	2045	byte_stream += mapping.int2bytes(4, self.trdid) # thread index in vspace
	2046	byte_stream += mapping.int2bytes(4, vseg_stack_id) # stack vseg local index
	2047	byte_stream += mapping.int2bytes(4, vseg_heap_id) # heap vseg local index
	2048	byte_stream += mapping.int2bytes(4, self.startid) # index in start vector
[319]	2049
	2050	if ( verbose ):
	2051	print 'clusterid = %d' % cluster_id
	2052	print 'lpid = %d' % self.p
[406]	2053	print 'trdid = %d' % self.trdid
[512]	2054	print 'stackid = %d' % vseg_stack_id
	2055	print 'heapid = %d' % vseg_heap_id
[406]	2056	print 'startid = %d' % self.startid
	2057
[319]	2058	return byte_stream
	2059
[539]	2060	##################################################################################
[305]	2061	class Vseg( object ):
[539]	2062	##################################################################################
[406]	2063	def __init__( self,
	2064	name,
	2065	vbase,
[512]	2066	length,
[406]	2067	mode,
[512]	2068	vtype,
[406]	2069	x,
	2070	y,
[512]	2071	pseg,
[348]	2072	identity = False,
[411]	2073	local = False,
[512]	2074	big = False,
	2075	binpath = '' ):
[305]	2076
[512]	2077	assert (vbase & 0xFFFFFFFF) == vbase
	2078
	2079	assert (length & 0xFFFFFFFF) == length
	2080
[319]	2081	assert mode in VSEGMODES
	2082
[512]	2083	assert vtype in VSEGTYPES
	2084
	2085	assert (vtype != 'ELF') or (binpath != '')
	2086
[348]	2087	self.index = 0 # global index ( set by addVseg() )
[512]	2088	self.name = name # vseg name (unique in vspace)
	2089	self.vbase = vbase # virtual base address in vspace
	2090	self.length = length # vseg length (bytes)
	2091	self.vtype = vtype # vseg type (defined in VSEGTYPES)
[348]	2092	self.mode = mode # CXWU access rights
[406]	2093	self.x = x # x coordinate of destination cluster
[348]	2094	self.y = y # y coordinate of destination cluster
[512]	2095	self.psegname = pseg # name of pseg in destination cluster
[348]	2096	self.identity = identity # identity mapping required
[411]	2097	self.local = local # only mapped in local PTAB when true
	2098	self.big = big # to be mapped in a big physical page
[539]	2099	self.binpath = binpath # pathname for binary file (ELF or BLOB)
[512]	2100
[305]	2101	return
	2102
[539]	2103	##################################
	2104	def xml( self ): # xml for a vseg
[319]	2105
[512]	2106	s = ' <vseg name="%s"' %(self.name)
	2107	s += ' vbase="0x%x"' %(self.vbase)
	2108	s += ' length="0x%x"' %(self.length)
	2109	s += ' type="%s"' %(self.vtype)
	2110	s += ' mode="%s"' %(self.mode)
	2111	s += '\n '
	2112	s += ' x="%d"' %(self.x)
	2113	s += ' y="%d"' %(self.y)
	2114	s += ' psegname="%s"' %(self.psegname)
	2115	if ( self.identity ): s += ' ident="1"'
	2116	if ( self.local ): s += ' local="1"'
	2117	if ( self.big ): s += ' big="1"'
	2118	if ( self.binpath != '' ): s += ' binpath="%s"' %(self.binpath)
	2119	s += ' />\n'
[319]	2120
[305]	2121	return s
	2122
[539]	2123	#####################################################################
	2124	def cbin( self, mapping, verbose, expected ): # C binary for Vseg
[319]	2125
	2126	if ( verbose ):
	2127	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
	2128
	2129	# check index
	2130	if (self.index != expected):
[512]	2131	print '[genmap error] in Vseg.cbin()'
	2132	print ' vseg global index = %d / expected = %d' \
[319]	2133	% (self.index, expected )
	2134	sys.exit(1)
	2135
	2136	# compute pseg_id
	2137	pseg_id = 0xFFFFFFFF
	2138	cluster_id = (self.x * mapping.y_size) + self.y
	2139	cluster = mapping.clusters[cluster_id]
	2140	for pseg in cluster.psegs:
	2141	if (self.psegname == pseg.name):
	2142	pseg_id = pseg.index
	2143	if (pseg_id == 0xFFFFFFFF):
[512]	2144	print '[genmap error] in Vseg.cbin() : '
	2145	print ' psegname %s not found for vseg %s in cluster %d' \
[319]	2146	% ( self.psegname, self.name, cluster_id )
	2147	sys.exit(1)
	2148
	2149	# compute numerical value for mode
	2150	mode_id = 0xFFFFFFFF
[406]	2151	for x in xrange( len(VSEGMODES) ):
	2152	if ( self.mode == VSEGMODES[x] ):
[319]	2153	mode_id = x
	2154	if ( mode_id == 0xFFFFFFFF ):
[512]	2155	print '[genmap error] in Vseg.cbin() : '
	2156	print ' undefined vseg mode %s' % self.mode
[319]	2157	sys.exit(1)
	2158
[512]	2159	# compute numerical value for vtype
	2160	vtype_id = 0xFFFFFFFF
	2161	for x in xrange( len(VSEGTYPES) ):
	2162	if ( self.vtype == VSEGTYPES[x] ):
	2163	vtype_id = x
	2164	if ( vtype_id == 0xFFFFFFFF ):
	2165	print '[genmap error] in Vseg.cbin()'
	2166	print ' undefined vseg type %s' % self.vtype
	2167	sys.exit(1)
[319]	2168
	2169	byte_stream = bytearray()
[539]	2170	byte_stream += mapping.str2bytes(32,self.name ) # vseg name
	2171	byte_stream += mapping.str2bytes(64,self.binpath ) # binpath
	2172	byte_stream += mapping.int2bytes(4, self.vbase ) # virtual base address
	2173	byte_stream += mapping.int2bytes(8, 0 ) # physical base address
	2174	byte_stream += mapping.int2bytes(4, self.length ) # vseg size (bytes)
	2175	byte_stream += mapping.int2bytes(4, pseg_id ) # pseg global index
	2176	byte_stream += mapping.int2bytes(4, mode_id ) # CXWU flags
	2177	byte_stream += mapping.int2bytes(4, vtype_id ) # vseg type
	2178	byte_stream += mapping.int2bytes(1, 0 ) # mapped when non zero
	2179	byte_stream += mapping.int2bytes(1, self.identity ) # identity mapping
	2180	byte_stream += mapping.int2bytes(1, self.local ) # only in local PTAB
	2181	byte_stream += mapping.int2bytes(1, self.big ) # to be mapped in BPP
[319]	2182
	2183	if ( verbose ):
[512]	2184	print 'binpath = %s' % self.binpath
[319]	2185	print 'vbase = %x' % self.vbase
[512]	2186	print 'pbase = 0'
	2187	print 'length = %x' % self.length
[319]	2188	print 'pseg_id = %d' % pseg_id
[512]	2189	print 'mode = %d' % mode_id
	2190	print 'type = %d' % vtype_id
	2191	print 'mapped = 0'
	2192	print 'ident = %d' % self.identity
	2193	print 'local = %d' % self.local
	2194	print 'big = %d' % self.big
[406]	2195
[319]	2196	return byte_stream
	2197
[539]	2198	##################################################################################
[305]	2199	class Processor ( object ):
[539]	2200	##################################################################################
[319]	2201	def __init__( self,
[406]	2202	x,
	2203	y,
[319]	2204	lpid ):
	2205
	2206	self.index = 0 # global index ( set by addProc() )
	2207	self.x = x # x cluster coordinate
	2208	self.y = y # y cluster coordinate
	2209	self.lpid = lpid # processor local index
	2210
[305]	2211	return
	2212
[539]	2213	########################################
[406]	2214	def xml( self ): # xml for a processor
[305]	2215	return ' <proc index="%d" />\n' % (self.lpid)
	2216
[539]	2217	####################################################################
	2218	def cbin( self, mapping, verbose, expected ): # C binary for Proc
[319]	2219
	2220	if ( verbose ):
[539]	2221	print '*** cbin for proc %d in cluster (%d,%d)' \
	2222	% (self.lpid, self.x, self.y)
[319]	2223
	2224	# check index
	2225	if (self.index != expected):
[512]	2226	print '[genmap error] in Proc.cbin()'
[539]	2227	print ' proc global index = %d / expected = %d' \
	2228	% (self.index,expected)
[319]	2229	sys.exit(1)
	2230
	2231	byte_stream = bytearray()
	2232	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
[406]	2233
[319]	2234	return byte_stream
	2235
[539]	2236	##################################################################################
[305]	2237	class Pseg ( object ):
[539]	2238	##################################################################################
[406]	2239	def __init__( self,
	2240	name,
	2241	base,
	2242	size,
[319]	2243	x,
	2244	y,
	2245	segtype ):
	2246
	2247	assert( segtype in PSEGTYPES )
	2248
	2249	self.index = 0 # global index ( set by addPseg() )
	2250	self.name = name # pseg name (unique in cluster)
	2251	self.base = base # physical base address
	2252	self.size = size # segment size (bytes)
[406]	2253	self.x = x # cluster x coordinate
	2254	self.y = y # cluster y coordinate
[319]	2255	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
	2256
[305]	2257	return
[406]	2258
[539]	2259	###################################
[319]	2260	def xml( self ): # xml for a pseg
	2261
[539]	2262	s = ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
	2263	% (self.name, self.segtype, self.base, self.size)
	2264	return s
[305]	2265
[539]	2266	###########################################################################
	2267	def cbin( self, mapping, verbose, expected, cluster ): # C binary for Pseg
[319]	2268
	2269	if ( verbose ):
	2270	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
	2271	% (self.index, self.name, cluster.x, cluster.y)
	2272
	2273	# check index
	2274	if (self.index != expected):
[512]	2275	print '[genmap error] in Pseg.cbin()'
[539]	2276	print ' pseg global index = %d / expected = %d' \
	2277	% (self.index,expected)
[319]	2278	sys.exit(1)
[406]	2279
[319]	2280	# compute numerical value for segtype
	2281	segtype_int = 0xFFFFFFFF
[406]	2282	for x in xrange( len(PSEGTYPES) ):
[512]	2283	if ( self.segtype == PSEGTYPES[x] ): segtype_int = x
	2284
[319]	2285	if ( segtype_int == 0xFFFFFFFF ):
[512]	2286	print '[genmap error] in Pseg.cbin()'
	2287	print ' undefined segment type %s' % self.segtype
[319]	2288	sys.exit(1)
	2289
	2290	byte_stream = bytearray()
[539]	2291	byte_stream += mapping.str2bytes(32,self.name) # pseg name
	2292	byte_stream += mapping.int2bytes(8 ,self.base) # physical base address
	2293	byte_stream += mapping.int2bytes(8 ,self.size) # segment length
	2294	byte_stream += mapping.int2bytes(4 ,segtype_int) # segment type
	2295	byte_stream += mapping.int2bytes(4 ,cluster.index) # cluster global index
	2296	byte_stream += mapping.int2bytes(4 ,0) # linked list of vsegs
[319]	2297
	2298	if ( verbose ):
	2299	print 'pbase = %x' % self.base
	2300	print 'size = %x' % self.size
	2301	print 'type = %s' % self.segtype
[406]	2302
[319]	2303	return byte_stream
	2304
[539]	2305	##################################################################################
[319]	2306	class Periph ( object ):
[539]	2307	##################################################################################
[406]	2308	def __init__( self,
[319]	2309	pseg, # associated pseg
	2310	ptype, # peripheral type
	2311	subtype = 'NONE', # peripheral subtype
	2312	channels = 1, # for multi-channels peripherals
[539]	2313	arg0 = 0, # optional (semantic depends on ptype)
	2314	arg1 = 0, # optional (semantic depends on ptype)
	2315	arg2 = 0, # optional (semantic depends on ptype)
	2316	arg3 = 0 ): # optional (semantic depends on ptype)
[319]	2317
	2318	self.index = 0 # global index ( set by addPeriph() )
[406]	2319	self.channels = channels
	2320	self.ptype = ptype
	2321	self.subtype = subtype
[520]	2322	self.arg0 = arg0
	2323	self.arg1 = arg1
	2324	self.arg2 = arg2
	2325	self.arg3 = arg3
[319]	2326	self.pseg = pseg
	2327	self.irqs = []
[305]	2328	return
	2329
[539]	2330	######################################
[319]	2331	def xml( self ): # xml for a periph
	2332
	2333	s = ' <periph type="%s"' % self.ptype
	2334	s += ' subtype="%s"' % self.subtype
	2335	s += ' psegname="%s"' % self.pseg.name
	2336	s += ' channels="%d"' % self.channels
[520]	2337	s += ' arg0="%d"' % self.arg0
	2338	s += ' arg1="%d"' % self.arg1
	2339	s += ' arg2="%d"' % self.arg2
	2340	s += ' arg3="%d"' % self.arg3
[441]	2341	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
[520]	2342	s += ' >\n'
[319]	2343	for irq in self.irqs: s += irq.xml()
[520]	2344	s += ' </periph>\n'
	2345	else:
	2346	s += ' />\n'
[305]	2347	return s
	2348
[539]	2349	######################################################################
	2350	def cbin( self, mapping, verbose, expected ): # C binary for Periph
[305]	2351
[319]	2352	if ( verbose ):
	2353	print '*** cbin for periph %s in cluster [%d,%d]' \
	2354	% (self.ptype, self.pseg.x, self.pseg.y)
[305]	2355
[319]	2356	# check index
	2357	if (self.index != expected):
[512]	2358	print '[genmap error] in Periph.cbin()'
[539]	2359	print ' periph global index = %d / expected = %d' \
	2360	% (self.index,expected)
[319]	2361	sys.exit(1)
[305]	2362
[319]	2363	# compute pseg global index
	2364	pseg_id = self.pseg.index
[305]	2365
[319]	2366	# compute first irq global index
	2367	if ( len(self.irqs) > 0 ):
	2368	irq_id = self.irqs[0].index
	2369	else:
	2370	irq_id = 0
[305]	2371
[319]	2372	# compute numerical value for ptype
	2373	ptype_id = 0xFFFFFFFF
[406]	2374	for x in xrange( len(PERIPHTYPES) ):
[319]	2375	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
[512]	2376
[319]	2377	if ( ptype_id == 0xFFFFFFFF ):
[512]	2378	print '[genmap error] in Periph.cbin()'
	2379	print ' undefined peripheral type %s' % self.ptype
[319]	2380	sys.exit(1)
[305]	2381
[319]	2382	# compute numerical value for subtype
	2383	subtype_id = 0xFFFFFFFF
[520]	2384	if (self.ptype == 'IOC'):
	2385	for x in xrange( len(IOCSUBTYPES) ):
	2386	if ( self.subtype == IOCSUBTYPES[x] ): subtype_id = x
	2387	if (self.ptype == 'MWR'):
	2388	for x in xrange( len(MWRSUBTYPES) ):
	2389	if ( self.subtype == MWRSUBTYPES[x] ): subtype_id = x
	2390
[319]	2391	byte_stream = bytearray()
[539]	2392	byte_stream += mapping.int2bytes(4,ptype_id) # peripheral type
	2393	byte_stream += mapping.int2bytes(4,subtype_id) # peripheral subtype
	2394	byte_stream += mapping.int2bytes(4,pseg_id) # pseg global index
	2395	byte_stream += mapping.int2bytes(4,self.channels) # number of channels
	2396	byte_stream += mapping.int2bytes(4,self.arg0) # optionnal arg0
	2397	byte_stream += mapping.int2bytes(4,self.arg1) # optionnal arg1
	2398	byte_stream += mapping.int2bytes(4,self.arg2) # optionnal arg2
	2399	byte_stream += mapping.int2bytes(4,self.arg3) # optionnal arg3
	2400	byte_stream += mapping.int2bytes(4,len(self.irqs)) # number of input irqs
	2401	byte_stream += mapping.int2bytes( 4 , irq_id ) # global index
[305]	2402
[319]	2403	if ( verbose ):
	2404	print 'ptype = %d' % ptype_id
[520]	2405	print 'subtype = %d' % subtype_id
[319]	2406	print 'pseg_id = %d' % pseg_id
	2407	print 'nb_irqs = %d' % len( self.irqs )
[406]	2408	print 'irq_id = %d' % irq_id
[319]	2409	return byte_stream
[305]	2410
[539]	2411	##################################################################################
[319]	2412	class Irq ( object ):
[539]	2413	##################################################################################
[406]	2414	def __init__( self,
[319]	2415	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
	2416	srcid, # input IRQ index (for XCU or PIC)
	2417	isrtype, # Type of ISR to be executed
	2418	channel = 0 ): # channel index for multi-channel ISR
[305]	2419
[319]	2420	assert irqtype in IRQTYPES
	2421	assert isrtype in ISRTYPES
	2422	assert srcid < 32
[305]	2423
[319]	2424	self.index = 0 # global index ( set by addIrq() )
[406]	2425	self.irqtype = irqtype # IRQ type
[319]	2426	self.srcid = srcid # source IRQ index
[406]	2427	self.isrtype = isrtype # ISR type
[319]	2428	self.channel = channel # channel index (for multi-channels ISR)
[305]	2429	return
	2430
[539]	2431	################################
[319]	2432	def xml( self ): # xml for Irq
[305]	2433
[539]	2434	s = ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
[319]	2435	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
[539]	2436	return s
[305]	2437
[539]	2438	####################################################################
	2439	def cbin( self, mapping, verbose, expected ): # C binary for Irq
[305]	2440
[319]	2441	if ( verbose ):
[406]	2442	print '*** cbin for irq[%d]' % (self.index)
[305]	2443
[319]	2444	# check index
	2445	if (self.index != expected):
[512]	2446	print '[genmap error] in Irq.cbin()'
[539]	2447	print ' irq global index = %d / expected = %d' \
	2448	% (self.index,expected)
[319]	2449	sys.exit(1)
[305]	2450
[319]	2451	# compute numerical value for irqtype
	2452	irqtype_id = 0xFFFFFFFF
	2453	for x in xrange( len(IRQTYPES) ):
[512]	2454	if ( self.irqtype == IRQTYPES[x] ): irqtype_id = x
	2455
[319]	2456	if ( irqtype_id == 0xFFFFFFFF ):
[512]	2457	print '[genmap error] in Irq.cbin()'
	2458	print ' undefined irqtype %s' % self.irqtype
[319]	2459	sys.exit(1)
[305]	2460
[319]	2461	# compute numerical value for isrtype
	2462	isrtype_id = 0xFFFFFFFF
[406]	2463	for x in xrange( len(ISRTYPES) ):
[512]	2464	if ( self.isrtype == ISRTYPES[x] ): isrtype_id = x
	2465
[319]	2466	if ( isrtype_id == 0xFFFFFFFF ):
[512]	2467	print '[genmap error] in Irq.cbin()'
	2468	print ' undefined isrtype %s' % self.isrtype
[319]	2469	sys.exit(1)
	2470
	2471	byte_stream = bytearray()
	2472	byte_stream += mapping.int2bytes( 4, irqtype_id )
	2473	byte_stream += mapping.int2bytes( 4, self.srcid )
	2474	byte_stream += mapping.int2bytes( 4, isrtype_id )
	2475	byte_stream += mapping.int2bytes( 4, self.channel )
	2476	byte_stream += mapping.int2bytes( 4, 0 )
	2477	byte_stream += mapping.int2bytes( 4, 0 )
	2478
	2479	if ( verbose ):
	2480	print 'irqtype = %s' % self.irqtype
	2481	print 'srcid = %d' % self.srcid
	2482	print 'isrtype = %s' % self.isrtype
	2483	print 'channel = %d' % self.channel
	2484
	2485	return byte_stream
	2486
[305]	2487	# Local Variables:
	2488	# tab-width: 4;
	2489	# c-basic-offset: 4;
	2490	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	2491	# indent-tabs-mode: nil;
	2492	# End:
	2493	#
	2494	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	2495

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